Lines Matching +full:rx +full:- +full:sample +full:- +full:delay +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Addy Ke <addy.ke@rock-chips.com>
9 #include <linux/delay.h>
22 #define DRIVER_NAME "rockchip-spi"
71 /* ss_n to sclk_out delay */
164 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However,
169 /* 2 for native cs, 2 for cs-gpio */
198 void *rx; member
223 bool cs_high_supported; /* native CS supports active-high polarity */
236 writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); in spi_enable_chip()
246 if (slave_mode && rs->version == ROCKCHIP_SPI_VER2_TYPE2) { in wait_for_tx_idle()
255 if ((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & bit_filed) == idle_val) { in wait_for_tx_idle()
257 speed = rs->speed_hz; in wait_for_tx_idle()
265 dev_warn(rs->dev, "spi controller is in busy state!\n"); in wait_for_tx_idle()
270 switch (rs->version) { in get_fifo_len()
281 struct spi_controller *ctlr = spi->controller; in rockchip_spi_set_cs()
283 bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; in rockchip_spi_set_cs()
285 /* Return immediately for no-op */ in rockchip_spi_set_cs()
286 if (cs_asserted == rs->cs_asserted[spi->chip_select]) in rockchip_spi_set_cs()
291 pm_runtime_get_sync(rs->dev); in rockchip_spi_set_cs()
293 if (spi->cs_gpiod) in rockchip_spi_set_cs()
294 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
296 ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select)); in rockchip_spi_set_cs()
298 if (spi->cs_gpiod) in rockchip_spi_set_cs()
299 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); in rockchip_spi_set_cs()
301 ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select)); in rockchip_spi_set_cs()
304 pm_runtime_put(rs->dev); in rockchip_spi_set_cs()
307 rs->cs_asserted[spi->chip_select] = cs_asserted; in rockchip_spi_set_cs()
315 dev_err(rs->dev, "state=%x\n", atomic_read(&rs->state)); in rockchip_spi_handle_err()
316 dev_err(rs->dev, "tx_left=%x\n", rs->tx_left); in rockchip_spi_handle_err()
317 dev_err(rs->dev, "rx_left=%x\n", rs->rx_left); in rockchip_spi_handle_err()
318 print_hex_dump(KERN_ERR, "regs ", DUMP_PREFIX_OFFSET, 4, 4, rs->regs, 0x4c, 0); in rockchip_spi_handle_err()
321 * this also flushes both rx and tx fifos in rockchip_spi_handle_err()
326 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_handle_err()
327 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_handle_err()
329 if (atomic_read(&rs->state) & TXDMA) in rockchip_spi_handle_err()
330 dmaengine_terminate_async(ctlr->dma_tx); in rockchip_spi_handle_err()
332 if (atomic_read(&rs->state) & RXDMA) in rockchip_spi_handle_err()
333 dmaengine_terminate_async(ctlr->dma_rx); in rockchip_spi_handle_err()
334 atomic_set(&rs->state, 0); in rockchip_spi_handle_err()
339 u32 tx_free = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR); in rockchip_spi_pio_writer()
340 u32 words = min(rs->tx_left, tx_free); in rockchip_spi_pio_writer()
342 rs->tx_left -= words; in rockchip_spi_pio_writer()
343 for (; words; words--) { in rockchip_spi_pio_writer()
346 if (rs->n_bytes == 1) in rockchip_spi_pio_writer()
347 txw = *(u8 *)rs->tx; in rockchip_spi_pio_writer()
349 txw = *(u16 *)rs->tx; in rockchip_spi_pio_writer()
351 writel_relaxed(txw, rs->regs + ROCKCHIP_SPI_TXDR); in rockchip_spi_pio_writer()
352 rs->tx += rs->n_bytes; in rockchip_spi_pio_writer()
358 u32 words = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_pio_reader()
359 u32 rx_left = (rs->rx_left > words) ? rs->rx_left - words : 0; in rockchip_spi_pio_reader()
363 * enough words in the rx fifo to get the last interrupt in rockchip_spi_pio_reader()
367 u32 ftl = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFTLR) + 1; in rockchip_spi_pio_reader()
371 words = rs->rx_left - rx_left; in rockchip_spi_pio_reader()
375 rs->rx_left = rx_left; in rockchip_spi_pio_reader()
376 for (; words; words--) { in rockchip_spi_pio_reader()
377 u32 rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_pio_reader()
379 if (!rs->rx) in rockchip_spi_pio_reader()
382 if (rs->n_bytes == 1) in rockchip_spi_pio_reader()
383 *(u8 *)rs->rx = (u8)rxw; in rockchip_spi_pio_reader()
385 *(u16 *)rs->rx = (u16)rxw; in rockchip_spi_pio_reader()
386 rs->rx += rs->n_bytes; in rockchip_spi_pio_reader()
396 if (rs->cs_inactive && readl_relaxed(rs->regs + ROCKCHIP_SPI_ISR) & INT_CS_INACTIVE) { in rockchip_spi_isr()
397 ctlr->slave_abort(ctlr); in rockchip_spi_isr()
398 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
399 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
404 if (rs->tx_left) in rockchip_spi_isr()
408 if (!rs->rx_left) { in rockchip_spi_isr()
410 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_isr()
411 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_isr()
412 complete(&rs->xfer_done); in rockchip_spi_isr()
422 rs->tx_left = rs->tx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_prepare_irq()
423 rs->rx_left = xfer->len / rs->n_bytes; in rockchip_spi_prepare_irq()
425 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_prepare_irq()
429 if (rs->tx_left) in rockchip_spi_prepare_irq()
432 if (rs->cs_inactive) in rockchip_spi_prepare_irq()
433 writel_relaxed(INT_RF_FULL | INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
435 writel_relaxed(INT_RF_FULL, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_irq()
445 int state = atomic_fetch_andnot(RXDMA, &rs->state); in rockchip_spi_dma_rxcb()
447 if (state & TXDMA && !rs->slave_aborted) in rockchip_spi_dma_rxcb()
450 if (rs->cs_inactive) in rockchip_spi_dma_rxcb()
451 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_dma_rxcb()
454 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_dma_rxcb()
455 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_dma_rxcb()
456 complete(&rs->xfer_done); in rockchip_spi_dma_rxcb()
463 int state = atomic_fetch_andnot(TXDMA, &rs->state); in rockchip_spi_dma_txcb()
465 if (state & RXDMA && !rs->slave_aborted) in rockchip_spi_dma_txcb()
469 wait_for_tx_idle(rs, ctlr->slave); in rockchip_spi_dma_txcb()
472 writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_dma_txcb()
473 writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); in rockchip_spi_dma_txcb()
474 complete(&rs->xfer_done); in rockchip_spi_dma_txcb()
495 atomic_set(&rs->state, 0); in rockchip_spi_prepare_dma()
498 if (xfer->rx_buf) { in rockchip_spi_prepare_dma()
501 .src_addr = rs->dma_addr_rx, in rockchip_spi_prepare_dma()
502 .src_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
503 .src_maxburst = rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes), in rockchip_spi_prepare_dma()
506 dmaengine_slave_config(ctlr->dma_rx, &rxconf); in rockchip_spi_prepare_dma()
509 ctlr->dma_rx, in rockchip_spi_prepare_dma()
510 xfer->rx_sg.sgl, xfer->rx_sg.nents, in rockchip_spi_prepare_dma()
513 return -EINVAL; in rockchip_spi_prepare_dma()
515 rxdesc->callback = rockchip_spi_dma_rxcb; in rockchip_spi_prepare_dma()
516 rxdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
520 if (xfer->tx_buf) { in rockchip_spi_prepare_dma()
523 .dst_addr = rs->dma_addr_tx, in rockchip_spi_prepare_dma()
524 .dst_addr_width = rs->n_bytes, in rockchip_spi_prepare_dma()
525 .dst_maxburst = rs->fifo_len / 4, in rockchip_spi_prepare_dma()
528 dmaengine_slave_config(ctlr->dma_tx, &txconf); in rockchip_spi_prepare_dma()
531 ctlr->dma_tx, in rockchip_spi_prepare_dma()
532 xfer->tx_sg.sgl, xfer->tx_sg.nents, in rockchip_spi_prepare_dma()
536 dmaengine_terminate_sync(ctlr->dma_rx); in rockchip_spi_prepare_dma()
537 return -EINVAL; in rockchip_spi_prepare_dma()
540 txdesc->callback = rockchip_spi_dma_txcb; in rockchip_spi_prepare_dma()
541 txdesc->callback_param = ctlr; in rockchip_spi_prepare_dma()
544 /* rx must be started before tx due to spi instinct */ in rockchip_spi_prepare_dma()
546 atomic_or(RXDMA, &rs->state); in rockchip_spi_prepare_dma()
547 ctlr->dma_rx->cookie = dmaengine_submit(rxdesc); in rockchip_spi_prepare_dma()
548 dma_async_issue_pending(ctlr->dma_rx); in rockchip_spi_prepare_dma()
551 if (rs->cs_inactive) in rockchip_spi_prepare_dma()
552 writel_relaxed(INT_CS_INACTIVE, rs->regs + ROCKCHIP_SPI_IMR); in rockchip_spi_prepare_dma()
557 atomic_or(TXDMA, &rs->state); in rockchip_spi_prepare_dma()
559 dma_async_issue_pending(ctlr->dma_tx); in rockchip_spi_prepare_dma()
570 u32 speed_hz = xfer->speed_hz; in rockchip_spi_pio_transfer()
577 ms = 8LL * 1000LL * xfer->len; in rockchip_spi_pio_transfer()
581 if (ms > UINT_MAX || ctlr->slave) in rockchip_spi_pio_transfer()
586 rs->tx_left = rs->tx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_pio_transfer()
587 rs->rx_left = rs->rx ? xfer->len / rs->n_bytes : 0; in rockchip_spi_pio_transfer()
591 while (rs->tx_left || rs->rx_left) { in rockchip_spi_pio_transfer()
592 if (rs->tx) in rockchip_spi_pio_transfer()
595 if (rs->rx) in rockchip_spi_pio_transfer()
601 ret = -EIO; in rockchip_spi_pio_transfer()
607 if (rs->tx) in rockchip_spi_pio_transfer()
608 wait_for_tx_idle(rs, ctlr->slave); in rockchip_spi_pio_transfer()
629 rs->slave_aborted = false; in rockchip_spi_config()
631 cr0 |= rs->rsd << CR0_RSD_OFFSET; in rockchip_spi_config()
632 cr0 |= rs->csm << CR0_CSM_OFFSET; in rockchip_spi_config()
633 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; in rockchip_spi_config()
634 if (spi->mode & SPI_LSB_FIRST) in rockchip_spi_config()
636 if (spi->mode & SPI_CS_HIGH) in rockchip_spi_config()
637 cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; in rockchip_spi_config()
639 if (xfer->rx_buf && xfer->tx_buf) { in rockchip_spi_config()
641 } else if (xfer->rx_buf) { in rockchip_spi_config()
643 } else if (xfer->tx_buf) { in rockchip_spi_config()
645 * Use the water line of rx fifo in full duplex mode to trigger in rockchip_spi_config()
653 dev_err(rs->dev, "no transmission buffer\n"); in rockchip_spi_config()
654 return -EINVAL; in rockchip_spi_config()
657 switch (xfer->bits_per_word) { in rockchip_spi_config()
660 cr1 = xfer->len - 1; in rockchip_spi_config()
664 cr1 = xfer->len - 1; in rockchip_spi_config()
668 cr1 = xfer->len / 2 - 1; in rockchip_spi_config()
672 * ctlr->bits_per_word_mask, so this shouldn't in rockchip_spi_config()
675 dev_err(rs->dev, "unknown bits per word: %d\n", in rockchip_spi_config()
676 xfer->bits_per_word); in rockchip_spi_config()
677 return -EINVAL; in rockchip_spi_config()
681 if (xfer->tx_buf) in rockchip_spi_config()
683 if (xfer->rx_buf) in rockchip_spi_config()
691 if (rs->high_speed_state) { in rockchip_spi_config()
692 if (rs->freq > IO_DRIVER_4MA_MAX_SCLK_OUT) in rockchip_spi_config()
693 pinctrl_select_state(rs->dev->pins->p, in rockchip_spi_config()
694 rs->high_speed_state); in rockchip_spi_config()
696 pinctrl_select_state(rs->dev->pins->p, in rockchip_spi_config()
697 rs->dev->pins->default_state); in rockchip_spi_config()
700 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_config()
701 writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1); in rockchip_spi_config()
707 if ((xfer->len / rs->n_bytes) < rs->fifo_len) in rockchip_spi_config()
708 writel_relaxed(xfer->len / rs->n_bytes - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
710 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); in rockchip_spi_config()
712 writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR); in rockchip_spi_config()
713 writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1, in rockchip_spi_config()
714 rs->regs + ROCKCHIP_SPI_DMARDLR); in rockchip_spi_config()
715 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
717 if (rs->max_baud_div_in_cpha && xfer->speed_hz != rs->speed_hz) { in rockchip_spi_config()
719 if (rs->freq < 2 * xfer->speed_hz) { in rockchip_spi_config()
720 clk_set_rate(rs->spiclk, 2 * xfer->speed_hz); in rockchip_spi_config()
721 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_config()
724 …if ((spi->mode & SPI_CPHA) && (DIV_ROUND_UP(rs->freq, xfer->speed_hz) > rs->max_baud_div_in_cpha))… in rockchip_spi_config()
725 clk_set_rate(rs->spiclk, rs->max_baud_div_in_cpha * xfer->speed_hz); in rockchip_spi_config()
726 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_config()
734 writel_relaxed(2 * DIV_ROUND_UP(rs->freq, 2 * xfer->speed_hz), in rockchip_spi_config()
735 rs->regs + ROCKCHIP_SPI_BAUDR); in rockchip_spi_config()
736 rs->speed_hz = xfer->speed_hz; in rockchip_spi_config()
751 /* Flush rx fifo */ in rockchip_spi_slave_abort()
752 rx_fifo_left = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); in rockchip_spi_slave_abort()
753 for (; rx_fifo_left; rx_fifo_left--) in rockchip_spi_slave_abort()
754 readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); in rockchip_spi_slave_abort()
756 rs->slave_aborted = true; in rockchip_spi_slave_abort()
757 complete(&rs->xfer_done); in rockchip_spi_slave_abort()
766 u32 speed_hz = xfer->speed_hz; in rockchip_spi_transfer_wait()
770 if (wait_for_completion_interruptible(&rs->xfer_done)) { in rockchip_spi_transfer_wait()
771 dev_dbg(rs->dev, "RK SPI transfer interrupted\n"); in rockchip_spi_transfer_wait()
772 return -EINTR; in rockchip_spi_transfer_wait()
775 if (rs->slave_aborted) { in rockchip_spi_transfer_wait()
776 dev_err(rs->dev, "RK SPI transfer slave abort\n"); in rockchip_spi_transfer_wait()
777 return -EIO; in rockchip_spi_transfer_wait()
783 ms = 8LL * 1000LL * xfer->len; in rockchip_spi_transfer_wait()
790 ms = wait_for_completion_timeout(&rs->xfer_done, in rockchip_spi_transfer_wait()
794 dev_err(rs->dev, "RK SPI transfer timed out\n"); in rockchip_spi_transfer_wait()
795 return -ETIMEDOUT; in rockchip_spi_transfer_wait()
813 if (!xfer->len) { in rockchip_spi_transfer_one()
814 complete(&rs->xfer_done); in rockchip_spi_transfer_one()
818 WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && in rockchip_spi_transfer_one()
819 (readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)); in rockchip_spi_transfer_one()
821 if (!xfer->tx_buf && !xfer->rx_buf) { in rockchip_spi_transfer_one()
822 dev_err(rs->dev, "No buffer for transfer\n"); in rockchip_spi_transfer_one()
823 return -EINVAL; in rockchip_spi_transfer_one()
826 if (xfer->len > ROCKCHIP_SPI_MAX_TRANLEN) { in rockchip_spi_transfer_one()
827 dev_err(rs->dev, "Transfer is too long (%d)\n", xfer->len); in rockchip_spi_transfer_one()
828 return -EINVAL; in rockchip_spi_transfer_one()
831 rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_transfer_one()
832 rs->xfer = xfer; in rockchip_spi_transfer_one()
833 if (rs->poll) { in rockchip_spi_transfer_one()
836 use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; in rockchip_spi_transfer_one()
843 ret = rockchip_spi_config(rs, spi, xfer, xfer_mode, ctlr->slave); in rockchip_spi_transfer_one()
847 rs->tx = xfer->tx_buf; in rockchip_spi_transfer_one()
848 rs->rx = xfer->rx_buf; in rockchip_spi_transfer_one()
850 reinit_completion(&rs->xfer_done); in rockchip_spi_transfer_one()
863 if (rs->ready) { in rockchip_spi_transfer_one()
864 gpiod_set_value(rs->ready, 0); in rockchip_spi_transfer_one()
866 gpiod_set_value(rs->ready, 1); in rockchip_spi_transfer_one()
872 if (rs->ready) in rockchip_spi_transfer_one()
873 gpiod_set_value(rs->ready, 0); in rockchip_spi_transfer_one()
883 unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2; in rockchip_spi_can_dma()
889 return xfer->len / bytes_per_word >= rs->fifo_len; in rockchip_spi_can_dma()
894 struct rockchip_spi *rs = spi_controller_get_devdata(spi->controller); in rockchip_spi_setup()
897 if (!spi->cs_gpiod && (spi->mode & SPI_CS_HIGH) && !rs->cs_high_supported) { in rockchip_spi_setup()
898 dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); in rockchip_spi_setup()
899 return -EINVAL; in rockchip_spi_setup()
902 pm_runtime_get_sync(rs->dev); in rockchip_spi_setup()
904 cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
906 cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET); in rockchip_spi_setup()
907 if (spi->mode & SPI_CS_HIGH) in rockchip_spi_setup()
908 cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; in rockchip_spi_setup()
910 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
912 pm_runtime_put(rs->dev); in rockchip_spi_setup()
919 struct miscdevice *misc = filp->private_data; in rockchip_spi_misc_open()
920 struct spi_controller *ctlr = dev_get_drvdata(misc->parent); in rockchip_spi_misc_open()
923 pm_runtime_get_sync(rs->dev); in rockchip_spi_misc_open()
930 struct miscdevice *misc = filp->private_data; in rockchip_spi_misc_release()
931 struct spi_controller *ctlr = dev_get_drvdata(misc->parent); in rockchip_spi_misc_release()
934 pm_runtime_put(rs->dev); in rockchip_spi_misc_release()
941 struct miscdevice *misc = filp->private_data; in rockchip_spi_mmap()
942 struct spi_controller *ctlr = dev_get_drvdata(misc->parent); in rockchip_spi_mmap()
944 size_t size = vma->vm_end - vma->vm_start; in rockchip_spi_mmap()
948 dev_warn(misc->parent, "mmap size is out of limitation\n"); in rockchip_spi_mmap()
949 return -EINVAL; in rockchip_spi_mmap()
952 vma->vm_flags |= VM_IO; in rockchip_spi_mmap()
953 vma->vm_flags |= (VM_DONTEXPAND | VM_DONTDUMP); in rockchip_spi_mmap()
954 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); in rockchip_spi_mmap()
956 err = remap_pfn_range(vma, vma->vm_start, in rockchip_spi_mmap()
957 __phys_to_pfn(rs->base_addr_phy), in rockchip_spi_mmap()
958 size, vma->vm_page_prot); in rockchip_spi_mmap()
960 return -EAGAIN; in rockchip_spi_mmap()
977 struct device_node *np = pdev->dev.of_node; in rockchip_spi_probe()
983 slave_mode = of_property_read_bool(np, "spi-slave"); in rockchip_spi_probe()
986 ctlr = spi_alloc_slave(&pdev->dev, in rockchip_spi_probe()
989 ctlr = spi_alloc_master(&pdev->dev, in rockchip_spi_probe()
993 return -ENOMEM; in rockchip_spi_probe()
998 ctlr->slave = slave_mode; in rockchip_spi_probe()
1002 rs->regs = devm_ioremap_resource(&pdev->dev, mem); in rockchip_spi_probe()
1003 if (IS_ERR(rs->regs)) { in rockchip_spi_probe()
1004 ret = PTR_ERR(rs->regs); in rockchip_spi_probe()
1007 rs->base_addr_phy = mem->start; in rockchip_spi_probe()
1009 if (!has_acpi_companion(&pdev->dev)) in rockchip_spi_probe()
1010 rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk"); in rockchip_spi_probe()
1011 if (IS_ERR(rs->apb_pclk)) { in rockchip_spi_probe()
1012 dev_err(&pdev->dev, "Failed to get apb_pclk\n"); in rockchip_spi_probe()
1013 ret = PTR_ERR(rs->apb_pclk); in rockchip_spi_probe()
1017 if (!has_acpi_companion(&pdev->dev)) in rockchip_spi_probe()
1018 rs->spiclk = devm_clk_get(&pdev->dev, "spiclk"); in rockchip_spi_probe()
1019 if (IS_ERR(rs->spiclk)) { in rockchip_spi_probe()
1020 dev_err(&pdev->dev, "Failed to get spi_pclk\n"); in rockchip_spi_probe()
1021 ret = PTR_ERR(rs->spiclk); in rockchip_spi_probe()
1025 rs->sclk_in = devm_clk_get_optional(&pdev->dev, "sclk_in"); in rockchip_spi_probe()
1026 if (IS_ERR(rs->sclk_in)) { in rockchip_spi_probe()
1027 dev_err(&pdev->dev, "Failed to get sclk_in\n"); in rockchip_spi_probe()
1028 ret = PTR_ERR(rs->sclk_in); in rockchip_spi_probe()
1032 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_probe()
1034 dev_err(&pdev->dev, "Failed to enable apb_pclk\n"); in rockchip_spi_probe()
1038 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_probe()
1040 dev_err(&pdev->dev, "Failed to enable spi_clk\n"); in rockchip_spi_probe()
1044 ret = clk_prepare_enable(rs->sclk_in); in rockchip_spi_probe()
1046 dev_err(&pdev->dev, "Failed to enable sclk_in\n"); in rockchip_spi_probe()
1056 ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL, in rockchip_spi_probe()
1057 IRQF_ONESHOT, dev_name(&pdev->dev), ctlr); in rockchip_spi_probe()
1061 rs->dev = &pdev->dev; in rockchip_spi_probe()
1063 rs->freq = clk_get_rate(rs->spiclk); in rockchip_spi_probe()
1064 if (!rs->freq) { in rockchip_spi_probe()
1065 ret = device_property_read_u32(&pdev->dev, "clock-frequency", &rs->freq); in rockchip_spi_probe()
1067 dev_warn(rs->dev, "Failed to get clock or clock-frequency property\n"); in rockchip_spi_probe()
1072 if (!device_property_read_u32(&pdev->dev, "rx-sample-delay-ns", &rsd_nsecs)) { in rockchip_spi_probe()
1073 /* rx sample delay is expressed in parent clock cycles (max 3) */ in rockchip_spi_probe()
1074 u32 rsd = DIV_ROUND_CLOSEST(rsd_nsecs * (rs->freq >> 8), in rockchip_spi_probe()
1077 dev_warn(rs->dev, "%u Hz are too slow to express %u ns delay\n", in rockchip_spi_probe()
1078 rs->freq, rsd_nsecs); in rockchip_spi_probe()
1081 dev_warn(rs->dev, "%u Hz are too fast to express %u ns delay, clamping at %u ns\n", in rockchip_spi_probe()
1082 rs->freq, rsd_nsecs, in rockchip_spi_probe()
1083 CR0_RSD_MAX * 1000000000U / rs->freq); in rockchip_spi_probe()
1085 rs->rsd = rsd; in rockchip_spi_probe()
1088 if (!device_property_read_u32(&pdev->dev, "csm", &csm)) { in rockchip_spi_probe()
1090 dev_warn(rs->dev, "The csm value %u exceeds the limit, clamping at %u\n", in rockchip_spi_probe()
1094 rs->csm = csm; in rockchip_spi_probe()
1097 rs->version = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION); in rockchip_spi_probe()
1098 rs->fifo_len = get_fifo_len(rs); in rockchip_spi_probe()
1099 if (!rs->fifo_len) { in rockchip_spi_probe()
1100 dev_err(&pdev->dev, "Failed to get fifo length\n"); in rockchip_spi_probe()
1101 ret = -EINVAL; in rockchip_spi_probe()
1104 quirks_cfg = device_get_match_data(&pdev->dev); in rockchip_spi_probe()
1106 rs->max_baud_div_in_cpha = quirks_cfg->max_baud_div_in_cpha; in rockchip_spi_probe()
1108 pm_runtime_set_active(&pdev->dev); in rockchip_spi_probe()
1109 pm_runtime_enable(&pdev->dev); in rockchip_spi_probe()
1111 ctlr->auto_runtime_pm = true; in rockchip_spi_probe()
1112 ctlr->bus_num = pdev->id; in rockchip_spi_probe()
1113 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; in rockchip_spi_probe()
1115 ctlr->mode_bits |= SPI_NO_CS; in rockchip_spi_probe()
1116 ctlr->slave_abort = rockchip_spi_slave_abort; in rockchip_spi_probe()
1118 ctlr->flags = SPI_MASTER_GPIO_SS; in rockchip_spi_probe()
1119 ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; in rockchip_spi_probe()
1122 * if num-cs is missing in the dts, default to 1 in rockchip_spi_probe()
1124 if (device_property_read_u32(&pdev->dev, "num-cs", &num_cs)) in rockchip_spi_probe()
1126 ctlr->num_chipselect = num_cs; in rockchip_spi_probe()
1127 ctlr->use_gpio_descriptors = true; in rockchip_spi_probe()
1129 ctlr->dev.of_node = pdev->dev.of_node; in rockchip_spi_probe()
1130 ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4); in rockchip_spi_probe()
1131 ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX; in rockchip_spi_probe()
1132 ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT); in rockchip_spi_probe()
1134 ctlr->setup = rockchip_spi_setup; in rockchip_spi_probe()
1135 ctlr->set_cs = rockchip_spi_set_cs; in rockchip_spi_probe()
1136 ctlr->transfer_one = rockchip_spi_transfer_one; in rockchip_spi_probe()
1137 ctlr->max_transfer_size = rockchip_spi_max_transfer_size; in rockchip_spi_probe()
1138 ctlr->handle_err = rockchip_spi_handle_err; in rockchip_spi_probe()
1140 ctlr->dma_tx = dma_request_chan(rs->dev, "tx"); in rockchip_spi_probe()
1141 if (IS_ERR(ctlr->dma_tx)) { in rockchip_spi_probe()
1143 if (PTR_ERR(ctlr->dma_tx) == -EPROBE_DEFER) { in rockchip_spi_probe()
1144 ret = -EPROBE_DEFER; in rockchip_spi_probe()
1147 dev_warn(rs->dev, "Failed to request TX DMA channel\n"); in rockchip_spi_probe()
1148 ctlr->dma_tx = NULL; in rockchip_spi_probe()
1151 ctlr->dma_rx = dma_request_chan(rs->dev, "rx"); in rockchip_spi_probe()
1152 if (IS_ERR(ctlr->dma_rx)) { in rockchip_spi_probe()
1153 if (PTR_ERR(ctlr->dma_rx) == -EPROBE_DEFER) { in rockchip_spi_probe()
1154 ret = -EPROBE_DEFER; in rockchip_spi_probe()
1157 dev_warn(rs->dev, "Failed to request RX DMA channel\n"); in rockchip_spi_probe()
1158 ctlr->dma_rx = NULL; in rockchip_spi_probe()
1161 if (ctlr->dma_tx && ctlr->dma_rx) { in rockchip_spi_probe()
1162 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR; in rockchip_spi_probe()
1163 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR; in rockchip_spi_probe()
1164 ctlr->can_dma = rockchip_spi_can_dma; in rockchip_spi_probe()
1167 rs->poll = device_property_read_bool(&pdev->dev, "rockchip,poll-only"); in rockchip_spi_probe()
1168 init_completion(&rs->xfer_done); in rockchip_spi_probe()
1169 if (rs->poll && slave_mode) { in rockchip_spi_probe()
1170 dev_err(rs->dev, "only support rockchip,poll-only property in master mode\n"); in rockchip_spi_probe()
1171 ret = -EINVAL; in rockchip_spi_probe()
1175 switch (rs->version) { in rockchip_spi_probe()
1177 rs->cs_high_supported = true; in rockchip_spi_probe()
1178 ctlr->mode_bits |= SPI_CS_HIGH; in rockchip_spi_probe()
1180 rs->cs_inactive = true; in rockchip_spi_probe()
1182 rs->cs_inactive = false; in rockchip_spi_probe()
1185 rs->cs_inactive = false; in rockchip_spi_probe()
1188 if (device_property_read_bool(&pdev->dev, "rockchip,cs-inactive-disable")) in rockchip_spi_probe()
1189 rs->cs_inactive = false; in rockchip_spi_probe()
1191 pinctrl = devm_pinctrl_get(&pdev->dev); in rockchip_spi_probe()
1193 rs->high_speed_state = pinctrl_lookup_state(pinctrl, "high_speed"); in rockchip_spi_probe()
1194 if (IS_ERR_OR_NULL(rs->high_speed_state)) { in rockchip_spi_probe()
1195 dev_warn(&pdev->dev, "no high_speed pinctrl state\n"); in rockchip_spi_probe()
1196 rs->high_speed_state = NULL; in rockchip_spi_probe()
1200 rs->ready = devm_gpiod_get_optional(&pdev->dev, "ready", GPIOD_OUT_HIGH); in rockchip_spi_probe()
1201 if (IS_ERR(rs->ready)) { in rockchip_spi_probe()
1202 ret = dev_err_probe(&pdev->dev, PTR_ERR(rs->ready), in rockchip_spi_probe()
1203 "invalid ready-gpios property in node\n"); in rockchip_spi_probe()
1207 ret = devm_spi_register_controller(&pdev->dev, ctlr); in rockchip_spi_probe()
1209 dev_err(&pdev->dev, "Failed to register controller\n"); in rockchip_spi_probe()
1216 snprintf(misc_name, sizeof(misc_name), "rkspi-dev%d", ctlr->bus_num); in rockchip_spi_probe()
1217 rs->miscdev.minor = MISC_DYNAMIC_MINOR; in rockchip_spi_probe()
1218 rs->miscdev.name = misc_name; in rockchip_spi_probe()
1219 rs->miscdev.fops = &rockchip_spi_misc_fops; in rockchip_spi_probe()
1220 rs->miscdev.parent = &pdev->dev; in rockchip_spi_probe()
1222 ret = misc_register(&rs->miscdev); in rockchip_spi_probe()
1224 dev_err(&pdev->dev, "failed to register misc device %s\n", misc_name); in rockchip_spi_probe()
1226 dev_info(&pdev->dev, "register misc device %s\n", misc_name); in rockchip_spi_probe()
1229 dev_info(rs->dev, "probed, poll=%d, rsd=%d, cs-inactive=%d, ready=%d\n", in rockchip_spi_probe()
1230 rs->poll, rs->rsd, rs->cs_inactive, rs->ready ? 1 : 0); in rockchip_spi_probe()
1235 if (ctlr->dma_rx) in rockchip_spi_probe()
1236 dma_release_channel(ctlr->dma_rx); in rockchip_spi_probe()
1238 if (ctlr->dma_tx) in rockchip_spi_probe()
1239 dma_release_channel(ctlr->dma_tx); in rockchip_spi_probe()
1241 pm_runtime_disable(&pdev->dev); in rockchip_spi_probe()
1243 clk_disable_unprepare(rs->sclk_in); in rockchip_spi_probe()
1245 clk_disable_unprepare(rs->spiclk); in rockchip_spi_probe()
1247 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_probe()
1260 misc_deregister(&rs->miscdev); in rockchip_spi_remove()
1262 pm_runtime_get_sync(&pdev->dev); in rockchip_spi_remove()
1264 clk_disable_unprepare(rs->sclk_in); in rockchip_spi_remove()
1265 clk_disable_unprepare(rs->spiclk); in rockchip_spi_remove()
1266 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_remove()
1268 pm_runtime_put_noidle(&pdev->dev); in rockchip_spi_remove()
1269 pm_runtime_disable(&pdev->dev); in rockchip_spi_remove()
1270 pm_runtime_set_suspended(&pdev->dev); in rockchip_spi_remove()
1272 if (ctlr->dma_tx) in rockchip_spi_remove()
1273 dma_release_channel(ctlr->dma_tx); in rockchip_spi_remove()
1274 if (ctlr->dma_rx) in rockchip_spi_remove()
1275 dma_release_channel(ctlr->dma_rx); in rockchip_spi_remove()
1288 clk_disable_unprepare(rs->spiclk); in rockchip_spi_runtime_suspend()
1289 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_suspend()
1300 ret = clk_prepare_enable(rs->apb_pclk); in rockchip_spi_runtime_resume()
1304 ret = clk_prepare_enable(rs->spiclk); in rockchip_spi_runtime_resume()
1306 clk_disable_unprepare(rs->apb_pclk); in rockchip_spi_runtime_resume()
1364 .compatible = "rockchip,px30-spi",
1367 { .compatible = "rockchip,rk3036-spi", },
1368 { .compatible = "rockchip,rk3066-spi", },
1369 { .compatible = "rockchip,rk3188-spi", },
1370 { .compatible = "rockchip,rk3228-spi", },
1371 { .compatible = "rockchip,rk3288-spi", },
1372 { .compatible = "rockchip,rk3308-spi", },
1373 { .compatible = "rockchip,rk3328-spi", },
1374 { .compatible = "rockchip,rk3368-spi", },
1375 { .compatible = "rockchip,rk3399-spi", },
1376 { .compatible = "rockchip,rv1106-spi", },
1377 { .compatible = "rockchip,rv1108-spi", },
1378 { .compatible = "rockchip,rv1126-spi", },
1395 MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>");