Lines Matching refs:pic32s
123 static inline void pic32_spi_enable(struct pic32_spi *pic32s) in pic32_spi_enable() argument
125 writel(CTRL_ON | CTRL_SIDL, &pic32s->regs->ctrl_set); in pic32_spi_enable()
128 static inline void pic32_spi_disable(struct pic32_spi *pic32s) in pic32_spi_disable() argument
130 writel(CTRL_ON | CTRL_SIDL, &pic32s->regs->ctrl_clr); in pic32_spi_disable()
136 static void pic32_spi_set_clk_rate(struct pic32_spi *pic32s, u32 spi_ck) in pic32_spi_set_clk_rate() argument
141 div = DIV_ROUND_CLOSEST(clk_get_rate(pic32s->clk), 2 * spi_ck) - 1; in pic32_spi_set_clk_rate()
143 writel(div & BAUD_MASK, &pic32s->regs->baud); in pic32_spi_set_clk_rate()
146 static inline u32 pic32_rx_fifo_level(struct pic32_spi *pic32s) in pic32_rx_fifo_level() argument
148 u32 sr = readl(&pic32s->regs->status); in pic32_rx_fifo_level()
153 static inline u32 pic32_tx_fifo_level(struct pic32_spi *pic32s) in pic32_tx_fifo_level() argument
155 u32 sr = readl(&pic32s->regs->status); in pic32_tx_fifo_level()
161 static u32 pic32_tx_max(struct pic32_spi *pic32s, int n_bytes) in pic32_tx_max() argument
165 tx_left = (pic32s->tx_end - pic32s->tx) / n_bytes; in pic32_tx_max()
166 tx_room = pic32s->fifo_n_elm - pic32_tx_fifo_level(pic32s); in pic32_tx_max()
176 rxtx_gap = ((pic32s->rx_end - pic32s->rx) - in pic32_tx_max()
177 (pic32s->tx_end - pic32s->tx)) / n_bytes; in pic32_tx_max()
178 return min3(tx_left, tx_room, (u32)(pic32s->fifo_n_elm - rxtx_gap)); in pic32_tx_max()
182 static u32 pic32_rx_max(struct pic32_spi *pic32s, int n_bytes) in pic32_rx_max() argument
184 u32 rx_left = (pic32s->rx_end - pic32s->rx) / n_bytes; in pic32_rx_max()
186 return min_t(u32, rx_left, pic32_rx_fifo_level(pic32s)); in pic32_rx_max()
190 static void pic32_spi_rx_##__name(struct pic32_spi *pic32s) \
193 u32 mx = pic32_rx_max(pic32s, sizeof(__type)); \
195 v = read##__bwl(&pic32s->regs->buf); \
196 if (pic32s->rx_end - pic32s->len) \
197 *(__type *)(pic32s->rx) = v; \
198 pic32s->rx += sizeof(__type); \
202 static void pic32_spi_tx_##__name(struct pic32_spi *pic32s) \
205 u32 mx = pic32_tx_max(pic32s, sizeof(__type)); \
208 if (pic32s->tx_end - pic32s->len) \
209 v = *(__type *)(pic32s->tx); \
210 write##__bwl(v, &pic32s->regs->buf); \
211 pic32s->tx += sizeof(__type); \
219 static void pic32_err_stop(struct pic32_spi *pic32s, const char *msg) in pic32_err_stop() argument
222 disable_irq_nosync(pic32s->fault_irq); in pic32_err_stop()
223 disable_irq_nosync(pic32s->rx_irq); in pic32_err_stop()
224 disable_irq_nosync(pic32s->tx_irq); in pic32_err_stop()
227 dev_err(&pic32s->master->dev, "%s\n", msg); in pic32_err_stop()
228 if (pic32s->master->cur_msg) in pic32_err_stop()
229 pic32s->master->cur_msg->status = -EIO; in pic32_err_stop()
230 complete(&pic32s->xfer_done); in pic32_err_stop()
235 struct pic32_spi *pic32s = dev_id; in pic32_spi_fault_irq() local
238 status = readl(&pic32s->regs->status); in pic32_spi_fault_irq()
242 writel(STAT_RX_OV, &pic32s->regs->status_clr); in pic32_spi_fault_irq()
243 writel(STAT_TX_UR, &pic32s->regs->status_clr); in pic32_spi_fault_irq()
244 pic32_err_stop(pic32s, "err_irq: fifo ov/ur-run\n"); in pic32_spi_fault_irq()
249 pic32_err_stop(pic32s, "err_irq: frame error"); in pic32_spi_fault_irq()
253 if (!pic32s->master->cur_msg) { in pic32_spi_fault_irq()
254 pic32_err_stop(pic32s, "err_irq: no mesg"); in pic32_spi_fault_irq()
263 struct pic32_spi *pic32s = dev_id; in pic32_spi_rx_irq() local
265 pic32s->rx_fifo(pic32s); in pic32_spi_rx_irq()
268 if (pic32s->rx_end == pic32s->rx) { in pic32_spi_rx_irq()
270 disable_irq_nosync(pic32s->fault_irq); in pic32_spi_rx_irq()
271 disable_irq_nosync(pic32s->rx_irq); in pic32_spi_rx_irq()
274 complete(&pic32s->xfer_done); in pic32_spi_rx_irq()
282 struct pic32_spi *pic32s = dev_id; in pic32_spi_tx_irq() local
284 pic32s->tx_fifo(pic32s); in pic32_spi_tx_irq()
287 if (pic32s->tx_end == pic32s->tx) in pic32_spi_tx_irq()
288 disable_irq_nosync(pic32s->tx_irq); in pic32_spi_tx_irq()
295 struct pic32_spi *pic32s = data; in pic32_spi_dma_rx_notify() local
297 complete(&pic32s->xfer_done); in pic32_spi_dma_rx_notify()
300 static int pic32_spi_dma_transfer(struct pic32_spi *pic32s, in pic32_spi_dma_transfer() argument
303 struct spi_master *master = pic32s->master; in pic32_spi_dma_transfer()
334 desc_rx->callback_param = pic32s; in pic32_spi_dma_transfer()
357 static int pic32_spi_dma_config(struct pic32_spi *pic32s, u32 dma_width) in pic32_spi_dma_config() argument
360 struct spi_master *master = pic32s->master; in pic32_spi_dma_config()
366 cfg.src_addr = pic32s->dma_base + buf_offset; in pic32_spi_dma_config()
367 cfg.dst_addr = pic32s->dma_base + buf_offset; in pic32_spi_dma_config()
368 cfg.src_maxburst = pic32s->fifo_n_elm / 2; /* fill one-half */ in pic32_spi_dma_config()
369 cfg.dst_maxburst = pic32s->fifo_n_elm / 2; /* drain one-half */ in pic32_spi_dma_config()
373 cfg.slave_id = pic32s->tx_irq; in pic32_spi_dma_config()
381 cfg.slave_id = pic32s->rx_irq; in pic32_spi_dma_config()
390 static int pic32_spi_set_word_size(struct pic32_spi *pic32s, u8 bits_per_word) in pic32_spi_set_word_size() argument
397 pic32s->rx_fifo = pic32_spi_rx_byte; in pic32_spi_set_word_size()
398 pic32s->tx_fifo = pic32_spi_tx_byte; in pic32_spi_set_word_size()
403 pic32s->rx_fifo = pic32_spi_rx_word; in pic32_spi_set_word_size()
404 pic32s->tx_fifo = pic32_spi_tx_word; in pic32_spi_set_word_size()
409 pic32s->rx_fifo = pic32_spi_rx_dword; in pic32_spi_set_word_size()
410 pic32s->tx_fifo = pic32_spi_tx_dword; in pic32_spi_set_word_size()
420 pic32s->fifo_n_elm = DIV_ROUND_UP(pic32s->fifo_n_byte, in pic32_spi_set_word_size()
423 v = readl(&pic32s->regs->ctrl); in pic32_spi_set_word_size()
426 writel(v, &pic32s->regs->ctrl); in pic32_spi_set_word_size()
429 if (test_bit(PIC32F_DMA_PREP, &pic32s->flags)) in pic32_spi_set_word_size()
430 pic32_spi_dma_config(pic32s, dmawidth); in pic32_spi_set_word_size()
437 struct pic32_spi *pic32s = spi_master_get_devdata(master); in pic32_spi_prepare_hardware() local
439 pic32_spi_enable(pic32s); in pic32_spi_prepare_hardware()
447 struct pic32_spi *pic32s = spi_master_get_devdata(master); in pic32_spi_prepare_message() local
452 if (pic32s->bits_per_word != spi->bits_per_word) { in pic32_spi_prepare_message()
453 pic32_spi_set_word_size(pic32s, spi->bits_per_word); in pic32_spi_prepare_message()
454 pic32s->bits_per_word = spi->bits_per_word; in pic32_spi_prepare_message()
458 if (pic32s->speed_hz != spi->max_speed_hz) { in pic32_spi_prepare_message()
459 pic32_spi_set_clk_rate(pic32s, spi->max_speed_hz); in pic32_spi_prepare_message()
460 pic32s->speed_hz = spi->max_speed_hz; in pic32_spi_prepare_message()
464 if (pic32s->mode != spi->mode) { in pic32_spi_prepare_message()
465 val = readl(&pic32s->regs->ctrl); in pic32_spi_prepare_message()
479 writel(val, &pic32s->regs->ctrl); in pic32_spi_prepare_message()
480 pic32s->mode = spi->mode; in pic32_spi_prepare_message()
490 struct pic32_spi *pic32s = spi_master_get_devdata(master); in pic32_spi_can_dma() local
494 test_bit(PIC32F_DMA_PREP, &pic32s->flags); in pic32_spi_can_dma()
501 struct pic32_spi *pic32s; in pic32_spi_one_transfer() local
506 pic32s = spi_master_get_devdata(master); in pic32_spi_one_transfer()
510 (transfer->bits_per_word != pic32s->bits_per_word)) { in pic32_spi_one_transfer()
511 ret = pic32_spi_set_word_size(pic32s, transfer->bits_per_word); in pic32_spi_one_transfer()
514 pic32s->bits_per_word = transfer->bits_per_word; in pic32_spi_one_transfer()
518 if (transfer->speed_hz && (transfer->speed_hz != pic32s->speed_hz)) { in pic32_spi_one_transfer()
519 pic32_spi_set_clk_rate(pic32s, transfer->speed_hz); in pic32_spi_one_transfer()
520 pic32s->speed_hz = transfer->speed_hz; in pic32_spi_one_transfer()
523 reinit_completion(&pic32s->xfer_done); in pic32_spi_one_transfer()
527 ret = pic32_spi_dma_transfer(pic32s, transfer); in pic32_spi_one_transfer()
537 pic32s->tx = (const void *)transfer->tx_buf; in pic32_spi_one_transfer()
538 pic32s->rx = (const void *)transfer->rx_buf; in pic32_spi_one_transfer()
539 pic32s->tx_end = pic32s->tx + transfer->len; in pic32_spi_one_transfer()
540 pic32s->rx_end = pic32s->rx + transfer->len; in pic32_spi_one_transfer()
541 pic32s->len = transfer->len; in pic32_spi_one_transfer()
544 enable_irq(pic32s->fault_irq); in pic32_spi_one_transfer()
545 enable_irq(pic32s->rx_irq); in pic32_spi_one_transfer()
546 enable_irq(pic32s->tx_irq); in pic32_spi_one_transfer()
550 timeout = wait_for_completion_timeout(&pic32s->xfer_done, 2 * HZ); in pic32_spi_one_transfer()
574 struct pic32_spi *pic32s = spi_master_get_devdata(master); in pic32_spi_unprepare_hardware() local
576 pic32_spi_disable(pic32s); in pic32_spi_unprepare_hardware()
610 static int pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev) in pic32_spi_dma_prep() argument
612 struct spi_master *master = pic32s->master; in pic32_spi_dma_prep()
637 if (pic32_spi_dma_config(pic32s, DMA_SLAVE_BUSWIDTH_1_BYTE)) in pic32_spi_dma_prep()
641 set_bit(PIC32F_DMA_PREP, &pic32s->flags); in pic32_spi_dma_prep()
659 static void pic32_spi_dma_unprep(struct pic32_spi *pic32s) in pic32_spi_dma_unprep() argument
661 if (!test_bit(PIC32F_DMA_PREP, &pic32s->flags)) in pic32_spi_dma_unprep()
664 clear_bit(PIC32F_DMA_PREP, &pic32s->flags); in pic32_spi_dma_unprep()
665 if (pic32s->master->dma_rx) in pic32_spi_dma_unprep()
666 dma_release_channel(pic32s->master->dma_rx); in pic32_spi_dma_unprep()
668 if (pic32s->master->dma_tx) in pic32_spi_dma_unprep()
669 dma_release_channel(pic32s->master->dma_tx); in pic32_spi_dma_unprep()
672 static void pic32_spi_hw_init(struct pic32_spi *pic32s) in pic32_spi_hw_init() argument
677 pic32_spi_disable(pic32s); in pic32_spi_hw_init()
679 ctrl = readl(&pic32s->regs->ctrl); in pic32_spi_hw_init()
682 pic32s->fifo_n_byte = 16; in pic32_spi_hw_init()
704 writel(ctrl, &pic32s->regs->ctrl); in pic32_spi_hw_init()
708 writel(ctrl, &pic32s->regs->ctrl2_set); in pic32_spi_hw_init()
712 struct pic32_spi *pic32s) in pic32_spi_hw_probe() argument
718 pic32s->regs = devm_ioremap_resource(&pdev->dev, mem); in pic32_spi_hw_probe()
719 if (IS_ERR(pic32s->regs)) in pic32_spi_hw_probe()
720 return PTR_ERR(pic32s->regs); in pic32_spi_hw_probe()
722 pic32s->dma_base = mem->start; in pic32_spi_hw_probe()
725 pic32s->fault_irq = platform_get_irq_byname(pdev, "fault"); in pic32_spi_hw_probe()
726 if (pic32s->fault_irq < 0) in pic32_spi_hw_probe()
727 return pic32s->fault_irq; in pic32_spi_hw_probe()
729 pic32s->rx_irq = platform_get_irq_byname(pdev, "rx"); in pic32_spi_hw_probe()
730 if (pic32s->rx_irq < 0) in pic32_spi_hw_probe()
731 return pic32s->rx_irq; in pic32_spi_hw_probe()
733 pic32s->tx_irq = platform_get_irq_byname(pdev, "tx"); in pic32_spi_hw_probe()
734 if (pic32s->tx_irq < 0) in pic32_spi_hw_probe()
735 return pic32s->tx_irq; in pic32_spi_hw_probe()
738 pic32s->clk = devm_clk_get(&pdev->dev, "mck0"); in pic32_spi_hw_probe()
739 if (IS_ERR(pic32s->clk)) { in pic32_spi_hw_probe()
741 ret = PTR_ERR(pic32s->clk); in pic32_spi_hw_probe()
745 ret = clk_prepare_enable(pic32s->clk); in pic32_spi_hw_probe()
749 pic32_spi_hw_init(pic32s); in pic32_spi_hw_probe()
761 struct pic32_spi *pic32s; in pic32_spi_probe() local
764 master = spi_alloc_master(&pdev->dev, sizeof(*pic32s)); in pic32_spi_probe()
768 pic32s = spi_master_get_devdata(master); in pic32_spi_probe()
769 pic32s->master = master; in pic32_spi_probe()
771 ret = pic32_spi_hw_probe(pdev, pic32s); in pic32_spi_probe()
778 master->max_speed_hz = clk_get_rate(pic32s->clk); in pic32_spi_probe()
791 ret = pic32_spi_dma_prep(pic32s, &pdev->dev); in pic32_spi_probe()
795 if (test_bit(PIC32F_DMA_PREP, &pic32s->flags)) in pic32_spi_probe()
798 init_completion(&pic32s->xfer_done); in pic32_spi_probe()
799 pic32s->mode = -1; in pic32_spi_probe()
802 irq_set_status_flags(pic32s->fault_irq, IRQ_NOAUTOEN); in pic32_spi_probe()
803 ret = devm_request_irq(&pdev->dev, pic32s->fault_irq, in pic32_spi_probe()
805 dev_name(&pdev->dev), pic32s); in pic32_spi_probe()
807 dev_err(&pdev->dev, "request fault-irq %d\n", pic32s->rx_irq); in pic32_spi_probe()
812 irq_set_status_flags(pic32s->rx_irq, IRQ_NOAUTOEN); in pic32_spi_probe()
813 ret = devm_request_irq(&pdev->dev, pic32s->rx_irq, in pic32_spi_probe()
815 dev_name(&pdev->dev), pic32s); in pic32_spi_probe()
817 dev_err(&pdev->dev, "request rx-irq %d\n", pic32s->rx_irq); in pic32_spi_probe()
822 irq_set_status_flags(pic32s->tx_irq, IRQ_NOAUTOEN); in pic32_spi_probe()
823 ret = devm_request_irq(&pdev->dev, pic32s->tx_irq, in pic32_spi_probe()
825 dev_name(&pdev->dev), pic32s); in pic32_spi_probe()
827 dev_err(&pdev->dev, "request tx-irq %d\n", pic32s->tx_irq); in pic32_spi_probe()
838 platform_set_drvdata(pdev, pic32s); in pic32_spi_probe()
843 pic32_spi_dma_unprep(pic32s); in pic32_spi_probe()
844 clk_disable_unprepare(pic32s->clk); in pic32_spi_probe()
852 struct pic32_spi *pic32s; in pic32_spi_remove() local
854 pic32s = platform_get_drvdata(pdev); in pic32_spi_remove()
855 pic32_spi_disable(pic32s); in pic32_spi_remove()
856 clk_disable_unprepare(pic32s->clk); in pic32_spi_remove()
857 pic32_spi_dma_unprep(pic32s); in pic32_spi_remove()