96 #define CLK_TO_US(sp, clkcnt)		DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000)  argument
113 static inline void mtk_nor_rmw(struct mtk_nor *sp, u32 reg, u32 set, u32 clr)  in mtk_nor_rmw()  argument
115 	u32 val = readl(sp->base + reg);  in mtk_nor_rmw()
119 	writel(val, sp->base + reg);  in mtk_nor_rmw()
122 static inline int mtk_nor_cmd_exec(struct mtk_nor *sp, u32 cmd, ulong clk)  in mtk_nor_cmd_exec()  argument
124 	ulong delay = CLK_TO_US(sp, clk);  in mtk_nor_cmd_exec()
128 	writel(cmd, sp->base + MTK_NOR_REG_CMD);  in mtk_nor_cmd_exec()
129 	ret = readl_poll_timeout(sp->base + MTK_NOR_REG_CMD, reg, !(reg & cmd),  in mtk_nor_cmd_exec()
132 		dev_err(sp->dev, "command %u timeout.\n", cmd);  in mtk_nor_cmd_exec()
136 static void mtk_nor_set_addr(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_set_addr()  argument
142 		writeb(addr & 0xff, sp->base + MTK_NOR_REG_RADR(i));  in mtk_nor_set_addr()
146 		writeb(addr & 0xff, sp->base + MTK_NOR_REG_RADR3);  in mtk_nor_set_addr()
147 		mtk_nor_rmw(sp, MTK_NOR_REG_BUSCFG, MTK_NOR_4B_ADDR, 0);  in mtk_nor_set_addr()
149 		mtk_nor_rmw(sp, MTK_NOR_REG_BUSCFG, 0, MTK_NOR_4B_ADDR);  in mtk_nor_set_addr()
153 static bool need_bounce(struct mtk_nor *sp, const struct spi_mem_op *op)  in need_bounce()  argument
251 	struct mtk_nor *sp = spi_controller_get_devdata(mem->spi->master);  in mtk_nor_adjust_op_size()  local
266 			else if (!need_bounce(sp, op))  in mtk_nor_adjust_op_size()
313 static void mtk_nor_setup_bus(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_setup_bus()  argument
322 		writeb(op->cmd.opcode, sp->base + MTK_NOR_REG_PRGDATA(4));  in mtk_nor_setup_bus()
327 		writeb(op->cmd.opcode, sp->base + MTK_NOR_REG_PRGDATA(3));  in mtk_nor_setup_bus()
332 			mtk_nor_rmw(sp, MTK_NOR_REG_CFG1, MTK_NOR_FAST_READ, 0);  in mtk_nor_setup_bus()
334 			mtk_nor_rmw(sp, MTK_NOR_REG_CFG1, 0, MTK_NOR_FAST_READ);  in mtk_nor_setup_bus()
336 	mtk_nor_rmw(sp, MTK_NOR_REG_BUSCFG, reg, MTK_NOR_BUS_MODE_MASK);  in mtk_nor_setup_bus()
339 static int mtk_nor_dma_exec(struct mtk_nor *sp, u32 from, unsigned int length,  in mtk_nor_dma_exec()  argument
346 	writel(from, sp->base + MTK_NOR_REG_DMA_FADR);  in mtk_nor_dma_exec()
347 	writel(dma_addr, sp->base + MTK_NOR_REG_DMA_DADR);  in mtk_nor_dma_exec()
348 	writel(dma_addr + length, sp->base + MTK_NOR_REG_DMA_END_DADR);  in mtk_nor_dma_exec()
350 	if (sp->high_dma) {  in mtk_nor_dma_exec()
352 		       sp->base + MTK_NOR_REG_DMA_DADR_HB);  in mtk_nor_dma_exec()
354 		       sp->base + MTK_NOR_REG_DMA_END_DADR_HB);  in mtk_nor_dma_exec()
357 	if (sp->has_irq) {  in mtk_nor_dma_exec()
358 		reinit_completion(&sp->op_done);  in mtk_nor_dma_exec()
359 		mtk_nor_rmw(sp, MTK_NOR_REG_IRQ_EN, MTK_NOR_IRQ_DMA, 0);  in mtk_nor_dma_exec()
362 	mtk_nor_rmw(sp, MTK_NOR_REG_DMA_CTL, MTK_NOR_DMA_START, 0);  in mtk_nor_dma_exec()
364 	delay = CLK_TO_US(sp, (length + 5) * BITS_PER_BYTE);  in mtk_nor_dma_exec()
366 	if (sp->has_irq) {  in mtk_nor_dma_exec()
367 		if (!wait_for_completion_timeout(&sp->op_done,  in mtk_nor_dma_exec()
371 		ret = readl_poll_timeout(sp->base + MTK_NOR_REG_DMA_CTL, reg,  in mtk_nor_dma_exec()
377 		dev_err(sp->dev, "dma read timeout.\n");  in mtk_nor_dma_exec()
382 static int mtk_nor_read_bounce(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_read_bounce()  argument
392 	ret = mtk_nor_dma_exec(sp, op->addr.val, rdlen, sp->buffer_dma);  in mtk_nor_read_bounce()
395 		memcpy(op->data.buf.in, sp->buffer, op->data.nbytes);  in mtk_nor_read_bounce()
400 static int mtk_nor_read_dma(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_read_dma()  argument
405 	if (need_bounce(sp, op))  in mtk_nor_read_dma()
406 		return mtk_nor_read_bounce(sp, op);  in mtk_nor_read_dma()
408 	dma_addr = dma_map_single(sp->dev, op->data.buf.in,  in mtk_nor_read_dma()
411 	if (dma_mapping_error(sp->dev, dma_addr))  in mtk_nor_read_dma()
414 	ret = mtk_nor_dma_exec(sp, op->addr.val, op->data.nbytes, dma_addr);  in mtk_nor_read_dma()
416 	dma_unmap_single(sp->dev, dma_addr, op->data.nbytes, DMA_FROM_DEVICE);  in mtk_nor_read_dma()
421 static int mtk_nor_read_pio(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_read_pio()  argument
426 	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_READ, 6 * BITS_PER_BYTE);  in mtk_nor_read_pio()
428 		buf[0] = readb(sp->base + MTK_NOR_REG_RDATA);  in mtk_nor_read_pio()
432 static int mtk_nor_write_buffer_enable(struct mtk_nor *sp)  in mtk_nor_write_buffer_enable()  argument
437 	if (sp->wbuf_en)  in mtk_nor_write_buffer_enable()
440 	val = readl(sp->base + MTK_NOR_REG_CFG2);  in mtk_nor_write_buffer_enable()
441 	writel(val | MTK_NOR_WR_BUF_EN, sp->base + MTK_NOR_REG_CFG2);  in mtk_nor_write_buffer_enable()
442 	ret = readl_poll_timeout(sp->base + MTK_NOR_REG_CFG2, val,  in mtk_nor_write_buffer_enable()
445 		sp->wbuf_en = true;  in mtk_nor_write_buffer_enable()
449 static int mtk_nor_write_buffer_disable(struct mtk_nor *sp)  in mtk_nor_write_buffer_disable()  argument
454 	if (!sp->wbuf_en)  in mtk_nor_write_buffer_disable()
456 	val = readl(sp->base + MTK_NOR_REG_CFG2);  in mtk_nor_write_buffer_disable()
457 	writel(val & ~MTK_NOR_WR_BUF_EN, sp->base + MTK_NOR_REG_CFG2);  in mtk_nor_write_buffer_disable()
458 	ret = readl_poll_timeout(sp->base + MTK_NOR_REG_CFG2, val,  in mtk_nor_write_buffer_disable()
461 		sp->wbuf_en = false;  in mtk_nor_write_buffer_disable()
465 static int mtk_nor_pp_buffered(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_pp_buffered()  argument
471 	ret = mtk_nor_write_buffer_enable(sp);  in mtk_nor_pp_buffered()
478 		writel(val, sp->base + MTK_NOR_REG_PP_DATA);  in mtk_nor_pp_buffered()
480 	return mtk_nor_cmd_exec(sp, MTK_NOR_CMD_WRITE,  in mtk_nor_pp_buffered()
484 static int mtk_nor_pp_unbuffered(struct mtk_nor *sp,  in mtk_nor_pp_unbuffered()  argument
490 	ret = mtk_nor_write_buffer_disable(sp);  in mtk_nor_pp_unbuffered()
493 	writeb(buf[0], sp->base + MTK_NOR_REG_WDATA);  in mtk_nor_pp_unbuffered()
494 	return mtk_nor_cmd_exec(sp, MTK_NOR_CMD_WRITE, 6 * BITS_PER_BYTE);  in mtk_nor_pp_unbuffered()
497 static int mtk_nor_spi_mem_prg(struct mtk_nor *sp, const struct spi_mem_op *op)  in mtk_nor_spi_mem_prg()  argument
527 		reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_spi_mem_prg()
533 		reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_spi_mem_prg()
540 			reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_spi_mem_prg()
545 			reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_spi_mem_prg()
551 		reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_spi_mem_prg()
556 	writel(prg_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);  in mtk_nor_spi_mem_prg()
557 	ret = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,  in mtk_nor_spi_mem_prg()
566 			reg = sp->base + MTK_NOR_REG_SHIFT(reg_offset);  in mtk_nor_spi_mem_prg()
576 	struct mtk_nor *sp = spi_controller_get_devdata(mem->spi->master);  in mtk_nor_exec_op()  local
581 		return mtk_nor_spi_mem_prg(sp, op);  in mtk_nor_exec_op()
584 		mtk_nor_set_addr(sp, op);  in mtk_nor_exec_op()
585 		writeb(op->cmd.opcode, sp->base + MTK_NOR_REG_PRGDATA0);  in mtk_nor_exec_op()
587 			return mtk_nor_pp_buffered(sp, op);  in mtk_nor_exec_op()
588 		return mtk_nor_pp_unbuffered(sp, op);  in mtk_nor_exec_op()
592 		ret = mtk_nor_write_buffer_disable(sp);  in mtk_nor_exec_op()
595 		mtk_nor_setup_bus(sp, op);  in mtk_nor_exec_op()
597 			mtk_nor_set_addr(sp, op);  in mtk_nor_exec_op()
598 			return mtk_nor_read_pio(sp, op);  in mtk_nor_exec_op()
600 			return mtk_nor_read_dma(sp, op);  in mtk_nor_exec_op()
604 	return mtk_nor_spi_mem_prg(sp, op);  in mtk_nor_exec_op()
609 	struct mtk_nor *sp = spi_controller_get_devdata(spi->master);  in mtk_nor_setup()  local
611 	if (spi->max_speed_hz && (spi->max_speed_hz < sp->spi_freq)) {  in mtk_nor_setup()
613 			sp->spi_freq);  in mtk_nor_setup()
616 	spi->max_speed_hz = sp->spi_freq;  in mtk_nor_setup()
624 	struct mtk_nor *sp = spi_controller_get_devdata(master);  in mtk_nor_transfer_one_message()  local
637 			reg = sp->base + MTK_NOR_REG_PRGDATA(reg_offset);  in mtk_nor_transfer_one_message()
646 	writel(trx_len * BITS_PER_BYTE, sp->base + MTK_NOR_REG_PRG_CNT);  in mtk_nor_transfer_one_message()
648 	stat = mtk_nor_cmd_exec(sp, MTK_NOR_CMD_PROGRAM,  in mtk_nor_transfer_one_message()
657 			reg = sp->base + MTK_NOR_REG_SHIFT(reg_offset);  in mtk_nor_transfer_one_message()
671 static void mtk_nor_disable_clk(struct mtk_nor *sp)  in mtk_nor_disable_clk()  argument
673 	clk_disable_unprepare(sp->spi_clk);  in mtk_nor_disable_clk()
674 	clk_disable_unprepare(sp->ctlr_clk);  in mtk_nor_disable_clk()
677 static int mtk_nor_enable_clk(struct mtk_nor *sp)  in mtk_nor_enable_clk()  argument
681 	ret = clk_prepare_enable(sp->spi_clk);  in mtk_nor_enable_clk()
685 	ret = clk_prepare_enable(sp->ctlr_clk);  in mtk_nor_enable_clk()
687 		clk_disable_unprepare(sp->spi_clk);  in mtk_nor_enable_clk()
694 static void mtk_nor_init(struct mtk_nor *sp)  in mtk_nor_init()  argument
696 	writel(0, sp->base + MTK_NOR_REG_IRQ_EN);  in mtk_nor_init()
697 	writel(MTK_NOR_IRQ_MASK, sp->base + MTK_NOR_REG_IRQ_STAT);  in mtk_nor_init()
699 	writel(MTK_NOR_ENABLE_SF_CMD, sp->base + MTK_NOR_REG_WP);  in mtk_nor_init()
700 	mtk_nor_rmw(sp, MTK_NOR_REG_CFG2, MTK_NOR_WR_CUSTOM_OP_EN, 0);  in mtk_nor_init()
701 	mtk_nor_rmw(sp, MTK_NOR_REG_CFG3,  in mtk_nor_init()
707 	struct mtk_nor *sp = data;  in mtk_nor_irq_handler()  local
710 	irq_status = readl(sp->base + MTK_NOR_REG_IRQ_STAT);  in mtk_nor_irq_handler()
711 	irq_enabled = readl(sp->base + MTK_NOR_REG_IRQ_EN);  in mtk_nor_irq_handler()
713 	writel(irq_status, sp->base + MTK_NOR_REG_IRQ_STAT);  in mtk_nor_irq_handler()
719 		complete(&sp->op_done);  in mtk_nor_irq_handler()
720 		writel(0, sp->base + MTK_NOR_REG_IRQ_EN);  in mtk_nor_irq_handler()
747 	struct mtk_nor *sp;  in mtk_nor_probe()  local
771 	ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*sp));  in mtk_nor_probe()
789 	sp = spi_controller_get_devdata(ctlr);  in mtk_nor_probe()
790 	sp->base = base;  in mtk_nor_probe()
791 	sp->has_irq = false;  in mtk_nor_probe()
792 	sp->wbuf_en = false;  in mtk_nor_probe()
793 	sp->ctlr = ctlr;  in mtk_nor_probe()
794 	sp->dev = &pdev->dev;  in mtk_nor_probe()
795 	sp->spi_clk = spi_clk;  in mtk_nor_probe()
796 	sp->ctlr_clk = ctlr_clk;  in mtk_nor_probe()
797 	sp->high_dma = (dma_bits > 32);  in mtk_nor_probe()
798 	sp->buffer = dmam_alloc_coherent(&pdev->dev,  in mtk_nor_probe()
800 				&sp->buffer_dma, GFP_KERNEL);  in mtk_nor_probe()
801 	if (!sp->buffer)  in mtk_nor_probe()
804 	if ((uintptr_t)sp->buffer & MTK_NOR_DMA_ALIGN_MASK) {  in mtk_nor_probe()
805 		dev_err(sp->dev, "misaligned allocation of internal buffer.\n");  in mtk_nor_probe()
809 	ret = mtk_nor_enable_clk(sp);  in mtk_nor_probe()
813 	sp->spi_freq = clk_get_rate(sp->spi_clk);  in mtk_nor_probe()
815 	mtk_nor_init(sp);  in mtk_nor_probe()
820 		dev_warn(sp->dev, "IRQ not available.");  in mtk_nor_probe()
822 		ret = devm_request_irq(sp->dev, irq, mtk_nor_irq_handler, 0,  in mtk_nor_probe()
823 				       pdev->name, sp);  in mtk_nor_probe()
825 			dev_warn(sp->dev, "failed to request IRQ.");  in mtk_nor_probe()
827 			init_completion(&sp->op_done);  in mtk_nor_probe()
828 			sp->has_irq = true;  in mtk_nor_probe()
845 	dev_info(&pdev->dev, "spi frequency: %d Hz\n", sp->spi_freq);  in mtk_nor_probe()
854 	mtk_nor_disable_clk(sp);  in mtk_nor_probe()
862 	struct mtk_nor *sp = spi_controller_get_devdata(ctlr);  in mtk_nor_remove()  local
868 	mtk_nor_disable_clk(sp);  in mtk_nor_remove()
876 	struct mtk_nor *sp = spi_controller_get_devdata(ctlr);  in mtk_nor_runtime_suspend()  local
878 	mtk_nor_disable_clk(sp);  in mtk_nor_runtime_suspend()
886 	struct mtk_nor *sp = spi_controller_get_devdata(ctlr);  in mtk_nor_runtime_resume()  local
888 	return mtk_nor_enable_clk(sp);  in mtk_nor_runtime_resume()
899 	struct mtk_nor *sp = spi_controller_get_devdata(ctlr);  in mtk_nor_resume()  local
906 	mtk_nor_init(sp);  in mtk_nor_resume()