Lines Matching +full:spi +full:- +full:rdy +full:- +full:drctl
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi_bitbang.h>
27 #include <linux/platform_data/dma-imx.h>
123 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
128 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
133 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
138 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
144 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
146 if (spi_imx->rx_buf) { \
147 *(type *)spi_imx->rx_buf = val; \
148 spi_imx->rx_buf += sizeof(type); \
151 spi_imx->remainder -= sizeof(type); \
159 if (spi_imx->tx_buf) { \
160 val = *(type *)spi_imx->tx_buf; \
161 spi_imx->tx_buf += sizeof(type); \
164 spi_imx->count -= sizeof(type); \
166 writel(val, spi_imx->base + MXC_CSPITXDATA); \
223 static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, in spi_imx_can_dma() argument
228 if (!use_dma || master->fallback) in spi_imx_can_dma()
231 if (!master->dma_rx) in spi_imx_can_dma()
234 if (spi_imx->slave_mode) in spi_imx_can_dma()
237 if (transfer->len < spi_imx->devtype_data->fifo_size) in spi_imx_can_dma()
240 spi_imx->dynamic_burst = 0; in spi_imx_can_dma()
250 #define MX51_ECSPI_CTRL_DRCTL(drctl) ((drctl) << 16) argument
286 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap_u32()
291 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap_u32()
293 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_rx_swap_u32()
299 *(u32 *)spi_imx->rx_buf = val; in spi_imx_buf_rx_swap_u32()
300 spi_imx->rx_buf += sizeof(u32); in spi_imx_buf_rx_swap_u32()
303 spi_imx->remainder -= sizeof(u32); in spi_imx_buf_rx_swap_u32()
311 unaligned = spi_imx->remainder % 4; in spi_imx_buf_rx_swap()
318 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_rx_swap()
323 val = readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_buf_rx_swap()
325 while (unaligned--) { in spi_imx_buf_rx_swap()
326 if (spi_imx->rx_buf) { in spi_imx_buf_rx_swap()
327 *(u8 *)spi_imx->rx_buf = (val >> (8 * unaligned)) & 0xff; in spi_imx_buf_rx_swap()
328 spi_imx->rx_buf++; in spi_imx_buf_rx_swap()
330 spi_imx->remainder--; in spi_imx_buf_rx_swap()
341 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap_u32()
342 val = *(u32 *)spi_imx->tx_buf; in spi_imx_buf_tx_swap_u32()
343 spi_imx->tx_buf += sizeof(u32); in spi_imx_buf_tx_swap_u32()
346 spi_imx->count -= sizeof(u32); in spi_imx_buf_tx_swap_u32()
348 bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_buf_tx_swap_u32()
355 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap_u32()
363 unaligned = spi_imx->count % 4; in spi_imx_buf_tx_swap()
370 if (spi_imx_bytes_per_word(spi_imx->bits_per_word) == 2) { in spi_imx_buf_tx_swap()
375 while (unaligned--) { in spi_imx_buf_tx_swap()
376 if (spi_imx->tx_buf) { in spi_imx_buf_tx_swap()
377 val |= *(u8 *)spi_imx->tx_buf << (8 * unaligned); in spi_imx_buf_tx_swap()
378 spi_imx->tx_buf++; in spi_imx_buf_tx_swap()
380 spi_imx->count--; in spi_imx_buf_tx_swap()
383 writel(val, spi_imx->base + MXC_CSPITXDATA); in spi_imx_buf_tx_swap()
388 u32 val = be32_to_cpu(readl(spi_imx->base + MXC_CSPIRXDATA)); in mx53_ecspi_rx_slave()
390 if (spi_imx->rx_buf) { in mx53_ecspi_rx_slave()
391 int n_bytes = spi_imx->slave_burst % sizeof(val); in mx53_ecspi_rx_slave()
396 memcpy(spi_imx->rx_buf, in mx53_ecspi_rx_slave()
397 ((u8 *)&val) + sizeof(val) - n_bytes, n_bytes); in mx53_ecspi_rx_slave()
399 spi_imx->rx_buf += n_bytes; in mx53_ecspi_rx_slave()
400 spi_imx->slave_burst -= n_bytes; in mx53_ecspi_rx_slave()
403 spi_imx->remainder -= sizeof(u32); in mx53_ecspi_rx_slave()
409 int n_bytes = spi_imx->count % sizeof(val); in mx53_ecspi_tx_slave()
414 if (spi_imx->tx_buf) { in mx53_ecspi_tx_slave()
415 memcpy(((u8 *)&val) + sizeof(val) - n_bytes, in mx53_ecspi_tx_slave()
416 spi_imx->tx_buf, n_bytes); in mx53_ecspi_tx_slave()
418 spi_imx->tx_buf += n_bytes; in mx53_ecspi_tx_slave()
421 spi_imx->count -= n_bytes; in mx53_ecspi_tx_slave()
423 writel(val, spi_imx->base + MXC_CSPITXDATA); in mx53_ecspi_tx_slave()
431 * there are two 4-bit dividers, the pre-divider divides by in mx51_ecspi_clkdiv()
432 * $pre, the post-divider by 2^$post in mx51_ecspi_clkdiv()
435 unsigned int fin = spi_imx->spi_clk; in mx51_ecspi_clkdiv()
439 post = fls(fin) - fls(fspi); in mx51_ecspi_clkdiv()
445 post = max(4U, post) - 4; in mx51_ecspi_clkdiv()
447 dev_err(spi_imx->dev, "cannot set clock freq: %u (base freq: %u)\n", in mx51_ecspi_clkdiv()
452 pre = DIV_ROUND_UP(fin, fspi << post) - 1; in mx51_ecspi_clkdiv()
454 dev_dbg(spi_imx->dev, "%s: fin: %u, fspi: %u, post: %u, pre: %u\n", in mx51_ecspi_clkdiv()
477 writel(val, spi_imx->base + MX51_ECSPI_INT); in mx51_ecspi_intctrl()
484 reg = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
486 writel(reg, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
491 writel(0, spi_imx->base + MX51_ECSPI_DMA); in mx51_disable_dma()
498 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
500 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_disable()
506 struct spi_device *spi = msg->spi; in mx51_ecspi_prepare_message() local
511 u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
514 if (spi_imx->slave_mode) in mx51_ecspi_prepare_message()
522 if (spi->mode & SPI_READY) in mx51_ecspi_prepare_message()
523 ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); in mx51_ecspi_prepare_message()
526 ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select); in mx51_ecspi_prepare_message()
532 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_message()
534 testreg = readl(spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
535 if (spi->mode & SPI_LOOP) in mx51_ecspi_prepare_message()
539 writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG); in mx51_ecspi_prepare_message()
543 * is not functional for imx53 Soc, config SPI burst completed when in mx51_ecspi_prepare_message()
546 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_message()
547 cfg &= ~MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
549 cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select); in mx51_ecspi_prepare_message()
551 if (spi->mode & SPI_CPHA) in mx51_ecspi_prepare_message()
552 cfg |= MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
554 cfg &= ~MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select); in mx51_ecspi_prepare_message()
556 if (spi->mode & SPI_CPOL) { in mx51_ecspi_prepare_message()
557 cfg |= MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
558 cfg |= MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
560 cfg &= ~MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select); in mx51_ecspi_prepare_message()
561 cfg &= ~MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select); in mx51_ecspi_prepare_message()
564 if (spi->mode & SPI_CS_HIGH) in mx51_ecspi_prepare_message()
565 cfg |= MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
567 cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select); in mx51_ecspi_prepare_message()
569 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_prepare_message()
579 * the SPI communication as the device on the other end would consider in mx51_ecspi_prepare_message()
582 * Because spi_imx->spi_bus_clk is only set in bitbang prepare_message in mx51_ecspi_prepare_message()
588 list_for_each_entry(xfer, &msg->transfers, transfer_list) { in mx51_ecspi_prepare_message()
589 if (!xfer->speed_hz) in mx51_ecspi_prepare_message()
591 min_speed_hz = min(xfer->speed_hz, min_speed_hz); in mx51_ecspi_prepare_message()
604 struct spi_device *spi) in mx51_ecspi_prepare_transfer() argument
606 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
611 if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) in mx51_ecspi_prepare_transfer()
612 ctrl |= (spi_imx->slave_burst * 8 - 1) in mx51_ecspi_prepare_transfer()
615 ctrl |= (spi_imx->bits_per_word - 1) in mx51_ecspi_prepare_transfer()
621 ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk); in mx51_ecspi_prepare_transfer()
622 spi_imx->spi_bus_clk = clk; in mx51_ecspi_prepare_transfer()
624 if (spi_imx->usedma) in mx51_ecspi_prepare_transfer()
627 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_prepare_transfer()
638 writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) | in mx51_setup_wml()
639 MX51_ECSPI_DMA_TX_WML(spi_imx->wml) | in mx51_setup_wml()
640 MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | in mx51_setup_wml()
642 MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); in mx51_setup_wml()
647 return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; in mx51_ecspi_rx_available()
654 readl(spi_imx->base + MXC_CSPIRXDATA); in mx51_ecspi_reset()
697 writel(val, spi_imx->base + MXC_CSPIINT); in mx31_intctrl()
704 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
706 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
716 struct spi_device *spi) in mx31_prepare_transfer() argument
721 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx31_prepare_transfer()
723 spi_imx->spi_bus_clk = clk; in mx31_prepare_transfer()
726 reg |= (spi_imx->bits_per_word - 1) << MX35_CSPICTRL_BL_SHIFT; in mx31_prepare_transfer()
729 reg |= (spi_imx->bits_per_word - 1) << MX31_CSPICTRL_BC_SHIFT; in mx31_prepare_transfer()
732 if (spi->mode & SPI_CPHA) in mx31_prepare_transfer()
734 if (spi->mode & SPI_CPOL) in mx31_prepare_transfer()
736 if (spi->mode & SPI_CS_HIGH) in mx31_prepare_transfer()
738 if (!spi->cs_gpiod) in mx31_prepare_transfer()
739 reg |= (spi->chip_select) << in mx31_prepare_transfer()
743 if (spi_imx->usedma) in mx31_prepare_transfer()
746 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_prepare_transfer()
748 reg = readl(spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
749 if (spi->mode & SPI_LOOP) in mx31_prepare_transfer()
753 writel(reg, spi_imx->base + MX31_CSPI_TESTREG); in mx31_prepare_transfer()
755 if (spi_imx->usedma) { in mx31_prepare_transfer()
761 spi_imx->base + MX31_CSPI_DMAREG); in mx31_prepare_transfer()
769 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; in mx31_rx_available()
775 while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) in mx31_reset()
776 readl(spi_imx->base + MXC_CSPIRXDATA); in mx31_reset()
801 writel(val, spi_imx->base + MXC_CSPIINT); in mx21_intctrl()
808 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
810 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
820 struct spi_device *spi) in mx21_prepare_transfer() argument
826 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk) in mx21_prepare_transfer()
828 spi_imx->spi_bus_clk = clk; in mx21_prepare_transfer()
830 reg |= spi_imx->bits_per_word - 1; in mx21_prepare_transfer()
832 if (spi->mode & SPI_CPHA) in mx21_prepare_transfer()
834 if (spi->mode & SPI_CPOL) in mx21_prepare_transfer()
836 if (spi->mode & SPI_CS_HIGH) in mx21_prepare_transfer()
838 if (!spi->cs_gpiod) in mx21_prepare_transfer()
839 reg |= spi->chip_select << MX21_CSPICTRL_CS_SHIFT; in mx21_prepare_transfer()
841 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_prepare_transfer()
848 return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; in mx21_rx_available()
853 writel(1, spi_imx->base + MXC_RESET); in mx21_reset()
876 writel(val, spi_imx->base + MXC_CSPIINT); in mx1_intctrl()
883 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
885 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
895 struct spi_device *spi) in mx1_prepare_transfer() argument
900 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << in mx1_prepare_transfer()
902 spi_imx->spi_bus_clk = clk; in mx1_prepare_transfer()
904 reg |= spi_imx->bits_per_word - 1; in mx1_prepare_transfer()
906 if (spi->mode & SPI_CPHA) in mx1_prepare_transfer()
908 if (spi->mode & SPI_CPOL) in mx1_prepare_transfer()
911 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_prepare_transfer()
918 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; in mx1_rx_available()
923 writel(1, spi_imx->base + MXC_RESET); in mx1_reset()
1032 .name = "imx1-cspi",
1035 .name = "imx21-cspi",
1038 .name = "imx27-cspi",
1041 .name = "imx31-cspi",
1044 .name = "imx35-cspi",
1047 .name = "imx51-ecspi",
1050 .name = "imx53-ecspi",
1058 { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
1059 { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
1060 { .compatible = "fsl,imx27-cspi", .data = &imx27_cspi_devtype_data, },
1061 { .compatible = "fsl,imx31-cspi", .data = &imx31_cspi_devtype_data, },
1062 { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
1063 { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
1064 { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
1073 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1075 ctrl |= ((n_bits - 1) << MX51_ECSPI_CTRL_BL_OFFSET); in spi_imx_set_burst_len()
1076 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in spi_imx_set_burst_len()
1083 if (spi_imx->dynamic_burst) in spi_imx_push()
1086 fifo_words = spi_imx_bytes_per_word(spi_imx->bits_per_word); in spi_imx_push()
1092 if (!spi_imx->remainder) { in spi_imx_push()
1093 if (spi_imx->dynamic_burst) { in spi_imx_push()
1096 burst_len = spi_imx->count % MX51_ECSPI_CTRL_MAX_BURST; in spi_imx_push()
1103 spi_imx->remainder = burst_len; in spi_imx_push()
1105 spi_imx->remainder = fifo_words; in spi_imx_push()
1109 while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) { in spi_imx_push()
1110 if (!spi_imx->count) in spi_imx_push()
1112 if (spi_imx->dynamic_burst && in spi_imx_push()
1113 spi_imx->txfifo >= DIV_ROUND_UP(spi_imx->remainder, in spi_imx_push()
1116 spi_imx->tx(spi_imx); in spi_imx_push()
1117 spi_imx->txfifo++; in spi_imx_push()
1120 if (!spi_imx->slave_mode) in spi_imx_push()
1121 spi_imx->devtype_data->trigger(spi_imx); in spi_imx_push()
1128 while (spi_imx->txfifo && in spi_imx_isr()
1129 spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_isr()
1130 spi_imx->rx(spi_imx); in spi_imx_isr()
1131 spi_imx->txfifo--; in spi_imx_isr()
1134 if (spi_imx->count) { in spi_imx_isr()
1139 if (spi_imx->txfifo) { in spi_imx_isr()
1143 spi_imx->devtype_data->intctrl( in spi_imx_isr()
1148 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_isr()
1149 complete(&spi_imx->xfer_done); in spi_imx_isr()
1161 switch (spi_imx_bytes_per_word(spi_imx->bits_per_word)) { in spi_imx_dma_configure()
1172 return -EINVAL; in spi_imx_dma_configure()
1176 tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA; in spi_imx_dma_configure()
1178 tx.dst_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1179 ret = dmaengine_slave_config(master->dma_tx, &tx); in spi_imx_dma_configure()
1181 dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1186 rx.src_addr = spi_imx->base_phys + MXC_CSPIRXDATA; in spi_imx_dma_configure()
1188 rx.src_maxburst = spi_imx->wml; in spi_imx_dma_configure()
1189 ret = dmaengine_slave_config(master->dma_rx, &rx); in spi_imx_dma_configure()
1191 dev_err(spi_imx->dev, "RX dma configuration failed with %d\n", ret); in spi_imx_dma_configure()
1198 static int spi_imx_setupxfer(struct spi_device *spi, in spi_imx_setupxfer() argument
1201 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_setupxfer()
1206 if (!t->speed_hz) { in spi_imx_setupxfer()
1207 if (!spi->max_speed_hz) { in spi_imx_setupxfer()
1208 dev_err(&spi->dev, "no speed_hz provided!\n"); in spi_imx_setupxfer()
1209 return -EINVAL; in spi_imx_setupxfer()
1211 dev_dbg(&spi->dev, "using spi->max_speed_hz!\n"); in spi_imx_setupxfer()
1212 spi_imx->spi_bus_clk = spi->max_speed_hz; in spi_imx_setupxfer()
1214 spi_imx->spi_bus_clk = t->speed_hz; in spi_imx_setupxfer()
1216 spi_imx->bits_per_word = t->bits_per_word; in spi_imx_setupxfer()
1219 * Initialize the functions for transfer. To transfer non byte-aligned in spi_imx_setupxfer()
1220 * words, we have to use multiple word-size bursts, we can't use in spi_imx_setupxfer()
1223 if (spi_imx->devtype_data->dynamic_burst && !spi_imx->slave_mode && in spi_imx_setupxfer()
1224 (spi_imx->bits_per_word == 8 || in spi_imx_setupxfer()
1225 spi_imx->bits_per_word == 16 || in spi_imx_setupxfer()
1226 spi_imx->bits_per_word == 32)) { in spi_imx_setupxfer()
1228 spi_imx->rx = spi_imx_buf_rx_swap; in spi_imx_setupxfer()
1229 spi_imx->tx = spi_imx_buf_tx_swap; in spi_imx_setupxfer()
1230 spi_imx->dynamic_burst = 1; in spi_imx_setupxfer()
1233 if (spi_imx->bits_per_word <= 8) { in spi_imx_setupxfer()
1234 spi_imx->rx = spi_imx_buf_rx_u8; in spi_imx_setupxfer()
1235 spi_imx->tx = spi_imx_buf_tx_u8; in spi_imx_setupxfer()
1236 } else if (spi_imx->bits_per_word <= 16) { in spi_imx_setupxfer()
1237 spi_imx->rx = spi_imx_buf_rx_u16; in spi_imx_setupxfer()
1238 spi_imx->tx = spi_imx_buf_tx_u16; in spi_imx_setupxfer()
1240 spi_imx->rx = spi_imx_buf_rx_u32; in spi_imx_setupxfer()
1241 spi_imx->tx = spi_imx_buf_tx_u32; in spi_imx_setupxfer()
1243 spi_imx->dynamic_burst = 0; in spi_imx_setupxfer()
1246 if (spi_imx_can_dma(spi_imx->bitbang.master, spi, t)) in spi_imx_setupxfer()
1247 spi_imx->usedma = true; in spi_imx_setupxfer()
1249 spi_imx->usedma = false; in spi_imx_setupxfer()
1251 if (is_imx53_ecspi(spi_imx) && spi_imx->slave_mode) { in spi_imx_setupxfer()
1252 spi_imx->rx = mx53_ecspi_rx_slave; in spi_imx_setupxfer()
1253 spi_imx->tx = mx53_ecspi_tx_slave; in spi_imx_setupxfer()
1254 spi_imx->slave_burst = t->len; in spi_imx_setupxfer()
1257 spi_imx->devtype_data->prepare_transfer(spi_imx, spi); in spi_imx_setupxfer()
1264 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_sdma_exit()
1266 if (master->dma_rx) { in spi_imx_sdma_exit()
1267 dma_release_channel(master->dma_rx); in spi_imx_sdma_exit()
1268 master->dma_rx = NULL; in spi_imx_sdma_exit()
1271 if (master->dma_tx) { in spi_imx_sdma_exit()
1272 dma_release_channel(master->dma_tx); in spi_imx_sdma_exit()
1273 master->dma_tx = NULL; in spi_imx_sdma_exit()
1286 spi_imx->wml = spi_imx->devtype_data->fifo_size / 2; in spi_imx_sdma_init()
1289 master->dma_tx = dma_request_chan(dev, "tx"); in spi_imx_sdma_init()
1290 if (IS_ERR(master->dma_tx)) { in spi_imx_sdma_init()
1291 ret = PTR_ERR(master->dma_tx); in spi_imx_sdma_init()
1293 master->dma_tx = NULL; in spi_imx_sdma_init()
1298 master->dma_rx = dma_request_chan(dev, "rx"); in spi_imx_sdma_init()
1299 if (IS_ERR(master->dma_rx)) { in spi_imx_sdma_init()
1300 ret = PTR_ERR(master->dma_rx); in spi_imx_sdma_init()
1302 master->dma_rx = NULL; in spi_imx_sdma_init()
1306 init_completion(&spi_imx->dma_rx_completion); in spi_imx_sdma_init()
1307 init_completion(&spi_imx->dma_tx_completion); in spi_imx_sdma_init()
1308 master->can_dma = spi_imx_can_dma; in spi_imx_sdma_init()
1309 master->max_dma_len = MAX_SDMA_BD_BYTES; in spi_imx_sdma_init()
1310 spi_imx->bitbang.master->flags = SPI_MASTER_MUST_RX | in spi_imx_sdma_init()
1323 complete(&spi_imx->dma_rx_completion); in spi_imx_dma_rx_callback()
1330 complete(&spi_imx->dma_tx_completion); in spi_imx_dma_tx_callback()
1338 timeout = (8 + 4) * size / spi_imx->spi_bus_clk; in spi_imx_calculate_timeout()
1353 struct spi_master *master = spi_imx->bitbang.master; in spi_imx_dma_transfer()
1354 struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; in spi_imx_dma_transfer()
1355 struct scatterlist *last_sg = sg_last(rx->sgl, rx->nents); in spi_imx_dma_transfer()
1360 bytes_per_word = spi_imx_bytes_per_word(transfer->bits_per_word); in spi_imx_dma_transfer()
1361 for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) { in spi_imx_dma_transfer()
1369 spi_imx->wml = i; in spi_imx_dma_transfer()
1375 if (!spi_imx->devtype_data->setup_wml) { in spi_imx_dma_transfer()
1376 dev_err(spi_imx->dev, "No setup_wml()?\n"); in spi_imx_dma_transfer()
1377 ret = -EINVAL; in spi_imx_dma_transfer()
1380 spi_imx->devtype_data->setup_wml(spi_imx); in spi_imx_dma_transfer()
1386 desc_rx = dmaengine_prep_slave_sg(master->dma_rx, in spi_imx_dma_transfer()
1387 rx->sgl, rx->nents, DMA_DEV_TO_MEM, in spi_imx_dma_transfer()
1390 ret = -EINVAL; in spi_imx_dma_transfer()
1394 desc_rx->callback = spi_imx_dma_rx_callback; in spi_imx_dma_transfer()
1395 desc_rx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1397 reinit_completion(&spi_imx->dma_rx_completion); in spi_imx_dma_transfer()
1398 dma_async_issue_pending(master->dma_rx); in spi_imx_dma_transfer()
1400 desc_tx = dmaengine_prep_slave_sg(master->dma_tx, in spi_imx_dma_transfer()
1401 tx->sgl, tx->nents, DMA_MEM_TO_DEV, in spi_imx_dma_transfer()
1404 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1405 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1406 return -EINVAL; in spi_imx_dma_transfer()
1409 desc_tx->callback = spi_imx_dma_tx_callback; in spi_imx_dma_transfer()
1410 desc_tx->callback_param = (void *)spi_imx; in spi_imx_dma_transfer()
1412 reinit_completion(&spi_imx->dma_tx_completion); in spi_imx_dma_transfer()
1413 dma_async_issue_pending(master->dma_tx); in spi_imx_dma_transfer()
1415 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_dma_transfer()
1418 timeout = wait_for_completion_timeout(&spi_imx->dma_tx_completion, in spi_imx_dma_transfer()
1421 dev_err(spi_imx->dev, "I/O Error in DMA TX\n"); in spi_imx_dma_transfer()
1422 dmaengine_terminate_all(master->dma_tx); in spi_imx_dma_transfer()
1423 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1424 return -ETIMEDOUT; in spi_imx_dma_transfer()
1427 timeout = wait_for_completion_timeout(&spi_imx->dma_rx_completion, in spi_imx_dma_transfer()
1430 dev_err(&master->dev, "I/O Error in DMA RX\n"); in spi_imx_dma_transfer()
1431 spi_imx->devtype_data->reset(spi_imx); in spi_imx_dma_transfer()
1432 dmaengine_terminate_all(master->dma_rx); in spi_imx_dma_transfer()
1433 return -ETIMEDOUT; in spi_imx_dma_transfer()
1436 return transfer->len; in spi_imx_dma_transfer()
1439 transfer->error |= SPI_TRANS_FAIL_NO_START; in spi_imx_dma_transfer()
1443 static int spi_imx_pio_transfer(struct spi_device *spi, in spi_imx_pio_transfer() argument
1446 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer()
1450 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer()
1451 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer()
1452 spi_imx->count = transfer->len; in spi_imx_pio_transfer()
1453 spi_imx->txfifo = 0; in spi_imx_pio_transfer()
1454 spi_imx->remainder = 0; in spi_imx_pio_transfer()
1456 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer()
1460 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); in spi_imx_pio_transfer()
1462 transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len); in spi_imx_pio_transfer()
1464 timeout = wait_for_completion_timeout(&spi_imx->xfer_done, in spi_imx_pio_transfer()
1467 dev_err(&spi->dev, "I/O Error in PIO\n"); in spi_imx_pio_transfer()
1468 spi_imx->devtype_data->reset(spi_imx); in spi_imx_pio_transfer()
1469 return -ETIMEDOUT; in spi_imx_pio_transfer()
1472 return transfer->len; in spi_imx_pio_transfer()
1475 static int spi_imx_pio_transfer_slave(struct spi_device *spi, in spi_imx_pio_transfer_slave() argument
1478 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_pio_transfer_slave()
1479 int ret = transfer->len; in spi_imx_pio_transfer_slave()
1482 transfer->len > MX53_MAX_TRANSFER_BYTES) { in spi_imx_pio_transfer_slave()
1483 dev_err(&spi->dev, "Transaction too big, max size is %d bytes\n", in spi_imx_pio_transfer_slave()
1485 return -EMSGSIZE; in spi_imx_pio_transfer_slave()
1488 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_pio_transfer_slave()
1489 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_pio_transfer_slave()
1490 spi_imx->count = transfer->len; in spi_imx_pio_transfer_slave()
1491 spi_imx->txfifo = 0; in spi_imx_pio_transfer_slave()
1492 spi_imx->remainder = 0; in spi_imx_pio_transfer_slave()
1494 reinit_completion(&spi_imx->xfer_done); in spi_imx_pio_transfer_slave()
1495 spi_imx->slave_aborted = false; in spi_imx_pio_transfer_slave()
1499 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE | MXC_INT_RDR); in spi_imx_pio_transfer_slave()
1501 if (wait_for_completion_interruptible(&spi_imx->xfer_done) || in spi_imx_pio_transfer_slave()
1502 spi_imx->slave_aborted) { in spi_imx_pio_transfer_slave()
1503 dev_dbg(&spi->dev, "interrupted\n"); in spi_imx_pio_transfer_slave()
1504 ret = -EINTR; in spi_imx_pio_transfer_slave()
1513 if (spi_imx->devtype_data->disable) in spi_imx_pio_transfer_slave()
1514 spi_imx->devtype_data->disable(spi_imx); in spi_imx_pio_transfer_slave()
1519 static int spi_imx_transfer(struct spi_device *spi, in spi_imx_transfer() argument
1522 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_transfer()
1524 transfer->effective_speed_hz = spi_imx->spi_bus_clk; in spi_imx_transfer()
1527 while (spi_imx->devtype_data->rx_available(spi_imx)) in spi_imx_transfer()
1528 readl(spi_imx->base + MXC_CSPIRXDATA); in spi_imx_transfer()
1530 if (spi_imx->slave_mode) in spi_imx_transfer()
1531 return spi_imx_pio_transfer_slave(spi, transfer); in spi_imx_transfer()
1533 if (spi_imx->usedma) in spi_imx_transfer()
1536 return spi_imx_pio_transfer(spi, transfer); in spi_imx_transfer()
1539 static int spi_imx_setup(struct spi_device *spi) in spi_imx_setup() argument
1541 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, in spi_imx_setup()
1542 spi->mode, spi->bits_per_word, spi->max_speed_hz); in spi_imx_setup()
1547 static void spi_imx_cleanup(struct spi_device *spi) in spi_imx_cleanup() argument
1557 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_prepare_message()
1559 pm_runtime_put_noidle(spi_imx->dev); in spi_imx_prepare_message()
1560 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_prepare_message()
1564 ret = spi_imx->devtype_data->prepare_message(spi_imx, msg); in spi_imx_prepare_message()
1566 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_prepare_message()
1567 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_prepare_message()
1578 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_unprepare_message()
1579 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_unprepare_message()
1587 spi_imx->slave_aborted = true; in spi_imx_slave_abort()
1588 complete(&spi_imx->xfer_done); in spi_imx_slave_abort()
1595 struct device_node *np = pdev->dev.of_node; in spi_imx_probe()
1597 of_match_device(spi_imx_dt_ids, &pdev->dev); in spi_imx_probe()
1602 const struct spi_imx_devtype_data *devtype_data = of_id ? of_id->data : in spi_imx_probe()
1603 (struct spi_imx_devtype_data *)pdev->id_entry->driver_data; in spi_imx_probe()
1607 slave_mode = devtype_data->has_slavemode && in spi_imx_probe()
1608 of_property_read_bool(np, "spi-slave"); in spi_imx_probe()
1610 master = spi_alloc_slave(&pdev->dev, in spi_imx_probe()
1613 master = spi_alloc_master(&pdev->dev, in spi_imx_probe()
1616 return -ENOMEM; in spi_imx_probe()
1618 ret = of_property_read_u32(np, "fsl,spi-rdy-drctl", &spi_drctl); in spi_imx_probe()
1626 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); in spi_imx_probe()
1627 master->bus_num = np ? -1 : pdev->id; in spi_imx_probe()
1628 master->use_gpio_descriptors = true; in spi_imx_probe()
1631 spi_imx->bitbang.master = master; in spi_imx_probe()
1632 spi_imx->dev = &pdev->dev; in spi_imx_probe()
1633 spi_imx->slave_mode = slave_mode; in spi_imx_probe()
1635 spi_imx->devtype_data = devtype_data; in spi_imx_probe()
1643 if (!device_property_read_u32(&pdev->dev, "num-cs", &val)) in spi_imx_probe()
1644 master->num_chipselect = val; in spi_imx_probe()
1646 master->num_chipselect = 3; in spi_imx_probe()
1648 spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; in spi_imx_probe()
1649 spi_imx->bitbang.txrx_bufs = spi_imx_transfer; in spi_imx_probe()
1650 spi_imx->bitbang.master->setup = spi_imx_setup; in spi_imx_probe()
1651 spi_imx->bitbang.master->cleanup = spi_imx_cleanup; in spi_imx_probe()
1652 spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; in spi_imx_probe()
1653 spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; in spi_imx_probe()
1654 spi_imx->bitbang.master->slave_abort = spi_imx_slave_abort; in spi_imx_probe()
1655 spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \ in spi_imx_probe()
1659 spi_imx->bitbang.master->mode_bits |= SPI_LOOP | SPI_READY; in spi_imx_probe()
1661 spi_imx->spi_drctl = spi_drctl; in spi_imx_probe()
1663 init_completion(&spi_imx->xfer_done); in spi_imx_probe()
1666 spi_imx->base = devm_ioremap_resource(&pdev->dev, res); in spi_imx_probe()
1667 if (IS_ERR(spi_imx->base)) { in spi_imx_probe()
1668 ret = PTR_ERR(spi_imx->base); in spi_imx_probe()
1671 spi_imx->base_phys = res->start; in spi_imx_probe()
1679 ret = devm_request_irq(&pdev->dev, irq, spi_imx_isr, 0, in spi_imx_probe()
1680 dev_name(&pdev->dev), spi_imx); in spi_imx_probe()
1682 dev_err(&pdev->dev, "can't get irq%d: %d\n", irq, ret); in spi_imx_probe()
1686 spi_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in spi_imx_probe()
1687 if (IS_ERR(spi_imx->clk_ipg)) { in spi_imx_probe()
1688 ret = PTR_ERR(spi_imx->clk_ipg); in spi_imx_probe()
1692 spi_imx->clk_per = devm_clk_get(&pdev->dev, "per"); in spi_imx_probe()
1693 if (IS_ERR(spi_imx->clk_per)) { in spi_imx_probe()
1694 ret = PTR_ERR(spi_imx->clk_per); in spi_imx_probe()
1698 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_probe()
1702 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_probe()
1706 pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT); in spi_imx_probe()
1707 pm_runtime_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1708 pm_runtime_get_noresume(spi_imx->dev); in spi_imx_probe()
1709 pm_runtime_set_active(spi_imx->dev); in spi_imx_probe()
1710 pm_runtime_enable(spi_imx->dev); in spi_imx_probe()
1712 spi_imx->spi_clk = clk_get_rate(spi_imx->clk_per); in spi_imx_probe()
1717 if (spi_imx->devtype_data->has_dmamode) { in spi_imx_probe()
1718 ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master); in spi_imx_probe()
1719 if (ret == -EPROBE_DEFER) in spi_imx_probe()
1723 dev_dbg(&pdev->dev, "dma setup error %d, use pio\n", in spi_imx_probe()
1727 spi_imx->devtype_data->reset(spi_imx); in spi_imx_probe()
1729 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_probe()
1731 master->dev.of_node = pdev->dev.of_node; in spi_imx_probe()
1732 ret = spi_bitbang_start(&spi_imx->bitbang); in spi_imx_probe()
1734 dev_err_probe(&pdev->dev, ret, "bitbang start failed\n"); in spi_imx_probe()
1738 pm_runtime_mark_last_busy(spi_imx->dev); in spi_imx_probe()
1739 pm_runtime_put_autosuspend(spi_imx->dev); in spi_imx_probe()
1744 if (spi_imx->devtype_data->has_dmamode) in spi_imx_probe()
1747 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_probe()
1748 pm_runtime_set_suspended(&pdev->dev); in spi_imx_probe()
1749 pm_runtime_disable(spi_imx->dev); in spi_imx_probe()
1751 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_probe()
1753 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_probe()
1766 spi_bitbang_stop(&spi_imx->bitbang); in spi_imx_remove()
1768 ret = pm_runtime_get_sync(spi_imx->dev); in spi_imx_remove()
1770 pm_runtime_put_noidle(spi_imx->dev); in spi_imx_remove()
1771 dev_err(spi_imx->dev, "failed to enable clock\n"); in spi_imx_remove()
1775 writel(0, spi_imx->base + MXC_CSPICTRL); in spi_imx_remove()
1777 pm_runtime_dont_use_autosuspend(spi_imx->dev); in spi_imx_remove()
1778 pm_runtime_put_sync(spi_imx->dev); in spi_imx_remove()
1779 pm_runtime_disable(spi_imx->dev); in spi_imx_remove()
1795 ret = clk_prepare_enable(spi_imx->clk_per); in spi_imx_runtime_resume()
1799 ret = clk_prepare_enable(spi_imx->clk_ipg); in spi_imx_runtime_resume()
1801 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_resume()
1815 clk_disable_unprepare(spi_imx->clk_per); in spi_imx_runtime_suspend()
1816 clk_disable_unprepare(spi_imx->clk_ipg); in spi_imx_runtime_suspend()
1851 MODULE_DESCRIPTION("SPI Controller driver");