Lines Matching refs:mpc8xxx_spi
91 struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master); in fsl_spi_change_mode()
116 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); in fsl_spi_chipselect() local
128 mpc8xxx_spi->rx_shift = cs->rx_shift; in fsl_spi_chipselect()
129 mpc8xxx_spi->tx_shift = cs->tx_shift; in fsl_spi_chipselect()
130 mpc8xxx_spi->get_rx = cs->get_rx; in fsl_spi_chipselect()
131 mpc8xxx_spi->get_tx = cs->get_tx; in fsl_spi_chipselect()
176 struct mpc8xxx_spi *mpc8xxx_spi, in mspi_apply_cpu_mode_quirks() argument
193 if (mpc8xxx_spi->set_shifts) in mspi_apply_cpu_mode_quirks()
194 mpc8xxx_spi->set_shifts(&cs->rx_shift, &cs->tx_shift, in mspi_apply_cpu_mode_quirks()
198 mpc8xxx_spi->rx_shift = cs->rx_shift; in mspi_apply_cpu_mode_quirks()
199 mpc8xxx_spi->tx_shift = cs->tx_shift; in mspi_apply_cpu_mode_quirks()
200 mpc8xxx_spi->get_rx = cs->get_rx; in mspi_apply_cpu_mode_quirks()
201 mpc8xxx_spi->get_tx = cs->get_tx; in mspi_apply_cpu_mode_quirks()
227 struct mpc8xxx_spi *mpc8xxx_spi; in fsl_spi_setup_transfer() local
233 mpc8xxx_spi = spi_master_get_devdata(spi->master); in fsl_spi_setup_transfer()
247 if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) in fsl_spi_setup_transfer()
249 mpc8xxx_spi, in fsl_spi_setup_transfer()
251 else if (mpc8xxx_spi->flags & SPI_QE) in fsl_spi_setup_transfer()
269 if ((mpc8xxx_spi->spibrg / hz) > 64) { in fsl_spi_setup_transfer()
271 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1; in fsl_spi_setup_transfer()
274 dev_name(&spi->dev), hz, mpc8xxx_spi->spibrg / 1024); in fsl_spi_setup_transfer()
278 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1; in fsl_spi_setup_transfer()
289 static int fsl_spi_cpu_bufs(struct mpc8xxx_spi *mspi, in fsl_spi_cpu_bufs()
310 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); in fsl_spi_bufs() local
316 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_bufs()
334 mpc8xxx_spi->tx = t->tx_buf; in fsl_spi_bufs()
335 mpc8xxx_spi->rx = t->rx_buf; in fsl_spi_bufs()
337 reinit_completion(&mpc8xxx_spi->done); in fsl_spi_bufs()
339 if (mpc8xxx_spi->flags & SPI_CPM_MODE) in fsl_spi_bufs()
340 ret = fsl_spi_cpm_bufs(mpc8xxx_spi, t, is_dma_mapped); in fsl_spi_bufs()
342 ret = fsl_spi_cpu_bufs(mpc8xxx_spi, t, len); in fsl_spi_bufs()
346 wait_for_completion(&mpc8xxx_spi->done); in fsl_spi_bufs()
351 if (mpc8xxx_spi->flags & SPI_CPM_MODE) in fsl_spi_bufs()
352 fsl_spi_cpm_bufs_complete(mpc8xxx_spi); in fsl_spi_bufs()
354 return mpc8xxx_spi->count; in fsl_spi_bufs()
360 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); in fsl_spi_do_one_msg() local
371 if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) { in fsl_spi_do_one_msg()
441 struct mpc8xxx_spi *mpc8xxx_spi; in fsl_spi_setup() local
458 mpc8xxx_spi = spi_master_get_devdata(spi->master); in fsl_spi_setup()
460 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_setup()
499 static void fsl_spi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events) in fsl_spi_cpu_irq()
533 struct mpc8xxx_spi *mspi = context_data; in fsl_spi_irq()
555 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); in fsl_spi_grlib_cs_control() local
556 struct fsl_spi_reg __iomem *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_cs_control()
562 } else if (cs < mpc8xxx_spi->native_chipselects) { in fsl_spi_grlib_cs_control()
573 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); in fsl_spi_grlib_probe() local
574 struct fsl_spi_reg __iomem *reg_base = mpc8xxx_spi->reg_base; in fsl_spi_grlib_probe()
580 mpc8xxx_spi->set_shifts = fsl_spi_grlib_set_shifts; in fsl_spi_grlib_probe()
583 mpc8xxx_spi->max_bits_per_word = mbits + 1; in fsl_spi_grlib_probe()
585 mpc8xxx_spi->native_chipselects = 0; in fsl_spi_grlib_probe()
587 mpc8xxx_spi->native_chipselects = SPCAP_SSSZ(capabilities); in fsl_spi_grlib_probe()
590 master->num_chipselect = mpc8xxx_spi->native_chipselects; in fsl_spi_grlib_probe()
599 struct mpc8xxx_spi *mpc8xxx_spi; in fsl_spi_probe() local
604 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi)); in fsl_spi_probe()
619 mpc8xxx_spi = spi_master_get_devdata(master); in fsl_spi_probe()
620 mpc8xxx_spi->max_bits_per_word = 32; in fsl_spi_probe()
621 mpc8xxx_spi->type = fsl_spi_get_type(dev); in fsl_spi_probe()
623 ret = fsl_spi_cpm_init(mpc8xxx_spi); in fsl_spi_probe()
627 mpc8xxx_spi->reg_base = devm_ioremap_resource(dev, mem); in fsl_spi_probe()
628 if (IS_ERR(mpc8xxx_spi->reg_base)) { in fsl_spi_probe()
629 ret = PTR_ERR(mpc8xxx_spi->reg_base); in fsl_spi_probe()
633 if (mpc8xxx_spi->type == TYPE_GRLIB) in fsl_spi_probe()
638 SPI_BPW_RANGE_MASK(1, mpc8xxx_spi->max_bits_per_word); in fsl_spi_probe()
640 if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) in fsl_spi_probe()
641 mpc8xxx_spi->set_shifts = fsl_spi_qe_cpu_set_shifts; in fsl_spi_probe()
643 if (mpc8xxx_spi->set_shifts) in fsl_spi_probe()
645 mpc8xxx_spi->set_shifts(&mpc8xxx_spi->rx_shift, in fsl_spi_probe()
646 &mpc8xxx_spi->tx_shift, 8, 1); in fsl_spi_probe()
649 ret = devm_request_irq(dev, mpc8xxx_spi->irq, fsl_spi_irq, in fsl_spi_probe()
650 0, "fsl_spi", mpc8xxx_spi); in fsl_spi_probe()
655 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_probe()
665 if (mpc8xxx_spi->max_bits_per_word < 8) { in fsl_spi_probe()
667 regval |= SPMODE_LEN(mpc8xxx_spi->max_bits_per_word - 1); in fsl_spi_probe()
669 if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) in fsl_spi_probe()
679 mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags)); in fsl_spi_probe()
684 fsl_spi_cpm_free(mpc8xxx_spi); in fsl_spi_probe()
780 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); in of_fsl_spi_remove() local
782 fsl_spi_cpm_free(mpc8xxx_spi); in of_fsl_spi_remove()
827 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); in plat_mpc8xxx_spi_remove() local
829 fsl_spi_cpm_free(mpc8xxx_spi); in plat_mpc8xxx_spi_remove()