117 static u32 spireg_read(struct a3700_spi *a3700_spi, u32 offset)  in spireg_read()  function
131 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_auto_cs_unset()
140 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_activate_cs()
150 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_deactivate_cs()
160 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_pin_mode_set()
190 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_mode_set()
203 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_mode_set()
233 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_clock_set()
240 		val = spireg_read(a3700_spi, A3700_SPI_IF_TIME_REG);  in a3700_spi_clock_set()
250 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_bytelen_set()
265 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_flush()
270 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_flush()
286 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_init()
292 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_init()
325 	cause = spireg_read(a3700_spi, A3700_SPI_INT_STAT_REG);  in a3700_spi_interrupt()
355 	ctrl_reg = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_wait_completion()
381 	ctrl_reg = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_wait_completion()
407 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_thres_set()
490 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_is_wfifo_full()
510 	u32 val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_is_rfifo_empty()
520 		val = spireg_read(a3700_spi, A3700_SPI_DATA_IN_REG);  in a3700_spi_fifo_read()
551 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_abort_fifo()
556 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_abort_fifo()
630 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
636 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
710 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
716 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
766 		while (!(spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG) &  in a3700_spi_transfer_one_full_duplex()
770 		val = spireg_read(a3700_spi, A3700_SPI_DATA_IN_REG);  in a3700_spi_transfer_one_full_duplex()