586 		 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,  in ufshcd_print_pwr_info()
587 		 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,  in ufshcd_print_pwr_info()
588 		 names[hba->pwr_info.pwr_rx],  in ufshcd_print_pwr_info()
589 		 names[hba->pwr_info.pwr_tx],  in ufshcd_print_pwr_info()
590 		 hba->pwr_info.hs_rate);  in ufshcd_print_pwr_info()
1139 		memcpy(&new_pwr_info, &hba->pwr_info,  in ufshcd_scale_gear()
1142 		if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||  in ufshcd_scale_gear()
1143 		    hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {  in ufshcd_scale_gear()
1146 				&hba->pwr_info,  in ufshcd_scale_gear()
1160 			hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,  in ufshcd_scale_gear()
3870 		orig_pwr_info = hba->pwr_info;  in ufshcd_dme_get_attr()
4178 	hba->pwr_info.gear_rx = UFS_PWM_G1;  in ufshcd_init_pwr_info()
4179 	hba->pwr_info.gear_tx = UFS_PWM_G1;  in ufshcd_init_pwr_info()
4180 	hba->pwr_info.lane_rx = 1;  in ufshcd_init_pwr_info()
4181 	hba->pwr_info.lane_tx = 1;  in ufshcd_init_pwr_info()
4182 	hba->pwr_info.pwr_rx = SLOWAUTO_MODE;  in ufshcd_init_pwr_info()
4183 	hba->pwr_info.pwr_tx = SLOWAUTO_MODE;  in ufshcd_init_pwr_info()
4184 	hba->pwr_info.hs_rate = 0;  in ufshcd_init_pwr_info()
4193 	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;  in ufshcd_get_max_pwr_mode()  local
4198 	pwr_info->pwr_tx = FAST_MODE;  in ufshcd_get_max_pwr_mode()
4199 	pwr_info->pwr_rx = FAST_MODE;  in ufshcd_get_max_pwr_mode()
4200 	pwr_info->hs_rate = PA_HS_MODE_B;  in ufshcd_get_max_pwr_mode()
4204 			&pwr_info->lane_rx);  in ufshcd_get_max_pwr_mode()
4206 			&pwr_info->lane_tx);  in ufshcd_get_max_pwr_mode()
4208 	if (!pwr_info->lane_rx || !pwr_info->lane_tx) {  in ufshcd_get_max_pwr_mode()
4211 				pwr_info->lane_rx,  in ufshcd_get_max_pwr_mode()
4212 				pwr_info->lane_tx);  in ufshcd_get_max_pwr_mode()
4221 	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4222 	if (!pwr_info->gear_rx) {  in ufshcd_get_max_pwr_mode()
4224 				&pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4225 		if (!pwr_info->gear_rx) {  in ufshcd_get_max_pwr_mode()
4227 				__func__, pwr_info->gear_rx);  in ufshcd_get_max_pwr_mode()
4230 		pwr_info->pwr_rx = SLOW_MODE;  in ufshcd_get_max_pwr_mode()
4234 			&pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4235 	if (!pwr_info->gear_tx) {  in ufshcd_get_max_pwr_mode()
4237 				&pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4238 		if (!pwr_info->gear_tx) {  in ufshcd_get_max_pwr_mode()
4240 				__func__, pwr_info->gear_tx);  in ufshcd_get_max_pwr_mode()
4243 		pwr_info->pwr_tx = SLOW_MODE;  in ufshcd_get_max_pwr_mode()
4257 	    pwr_mode->gear_rx == hba->pwr_info.gear_rx &&  in ufshcd_change_power_mode()
4258 	    pwr_mode->gear_tx == hba->pwr_info.gear_tx &&  in ufshcd_change_power_mode()
4259 	    pwr_mode->lane_rx == hba->pwr_info.lane_rx &&  in ufshcd_change_power_mode()
4260 	    pwr_mode->lane_tx == hba->pwr_info.lane_tx &&  in ufshcd_change_power_mode()
4261 	    pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&  in ufshcd_change_power_mode()
4262 	    pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&  in ufshcd_change_power_mode()
4263 	    pwr_mode->hs_rate == hba->pwr_info.hs_rate) {  in ufshcd_change_power_mode()
4331 		memcpy(&hba->pwr_info, pwr_mode,  in ufshcd_change_power_mode()
5986 	struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;  in ufshcd_is_pwr_mode_restore_needed()  local
5991 	if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))  in ufshcd_is_pwr_mode_restore_needed()
5994 	if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))  in ufshcd_is_pwr_mode_restore_needed()
6137 		pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));  in ufshcd_err_handler()
7848 			&hba->pwr_info,  in ufshcd_add_lus()