Lines Matching +full:ufs +full:- +full:2
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * UFS Host Controller driver for Exynos specific extensions
5 * Copyright (C) 2014-2015 Samsung Electronics Co., Ltd.
85 #define UNIPRO_PCLK_PERIOD(ufs) (NSEC_PER_SEC / ufs->pclk_rate) argument
89 /* vendor specific pre-defined parameters */
91 #define FAST 2
93 #define UFS_EXYNOS_LIMIT_NUM_LANES_RX 2
94 #define UFS_EXYNOS_LIMIT_NUM_LANES_TX 2
163 int (*drv_init)(struct device *dev, struct exynos_ufs *ufs);
164 int (*pre_link)(struct exynos_ufs *ufs);
165 int (*post_link)(struct exynos_ufs *ufs);
166 int (*pre_pwr_change)(struct exynos_ufs *ufs,
168 int (*post_pwr_change)(struct exynos_ufs *ufs,
212 #define EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL BIT(2)
217 #define for_each_ufs_rx_lane(ufs, i) \ argument
218 for (i = (ufs)->rx_sel_idx; \
219 i < (ufs)->rx_sel_idx + (ufs)->avail_ln_rx; i++)
220 #define for_each_ufs_tx_lane(ufs, i) \ argument
221 for (i = 0; i < (ufs)->avail_ln_tx; i++)
224 static inline void name##_writel(struct exynos_ufs *ufs, u32 val, u32 reg)\
226 writel(val, ufs->reg_##name + reg); \
229 static inline u32 name##_readl(struct exynos_ufs *ufs, u32 reg) \
231 return readl(ufs->reg_##name + reg); \