308 		reg_val = readw(&ha->reg->ctrl_status);  in qla4xxx_isp_check_reg()
4669 	uint32_t ctrl_status;  in qla4xxx_hw_reset()  local
4683 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4684 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0)  in qla4xxx_hw_reset()
4685 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4688 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4689 	readl(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4704 	uint32_t ctrl_status;  in qla4xxx_soft_reset()  local
4715 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4718 		if ((ctrl_status & CSR_NET_RESET_INTR) == 0)  in qla4xxx_soft_reset()
4724 	if ((ctrl_status & CSR_NET_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4730 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4731 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4739 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4742 		if ((ctrl_status & CSR_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
4755 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4756 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4757 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4758 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4771 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4772 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4778 			ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4781 			if ((ctrl_status & CSR_FORCE_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
5408 			while ((readw(&ha->reg->ctrl_status) &  in qla4xxx_do_dpc()
5485 		       &ha->reg->ctrl_status);  in qla4xxx_free_adapter()
5486 		readl(&ha->reg->ctrl_status);  in qla4xxx_free_adapter()