Lines Matching refs:ha
384 struct qla_hw_data *ha = vha->hw; in qla_init_base_qpair() local
386 rsp->qpair = ha->base_qpair; in qla_init_base_qpair()
388 ha->base_qpair->hw = ha; in qla_init_base_qpair()
389 ha->base_qpair->req = req; in qla_init_base_qpair()
390 ha->base_qpair->rsp = rsp; in qla_init_base_qpair()
391 ha->base_qpair->vha = vha; in qla_init_base_qpair()
392 ha->base_qpair->qp_lock_ptr = &ha->hardware_lock; in qla_init_base_qpair()
393 ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; in qla_init_base_qpair()
394 ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q]; in qla_init_base_qpair()
395 ha->base_qpair->srb_mempool = ha->srb_mempool; in qla_init_base_qpair()
396 INIT_LIST_HEAD(&ha->base_qpair->hints_list); in qla_init_base_qpair()
397 ha->base_qpair->enable_class_2 = ql2xenableclass2; in qla_init_base_qpair()
400 ha->base_qpair->pdev = ha->pdev; in qla_init_base_qpair()
402 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) in qla_init_base_qpair()
403 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs; in qla_init_base_qpair()
406 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req, in qla2x00_alloc_queues() argument
409 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla2x00_alloc_queues()
411 ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *), in qla2x00_alloc_queues()
413 if (!ha->req_q_map) { in qla2x00_alloc_queues()
419 ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *), in qla2x00_alloc_queues()
421 if (!ha->rsp_q_map) { in qla2x00_alloc_queues()
427 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); in qla2x00_alloc_queues()
428 if (ha->base_qpair == NULL) { in qla2x00_alloc_queues()
436 if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) { in qla2x00_alloc_queues()
437 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *), in qla2x00_alloc_queues()
439 if (!ha->queue_pair_map) { in qla2x00_alloc_queues()
450 ha->rsp_q_map[0] = rsp; in qla2x00_alloc_queues()
451 ha->req_q_map[0] = req; in qla2x00_alloc_queues()
452 set_bit(0, ha->rsp_qid_map); in qla2x00_alloc_queues()
453 set_bit(0, ha->req_qid_map); in qla2x00_alloc_queues()
457 kfree(ha->base_qpair); in qla2x00_alloc_queues()
458 ha->base_qpair = NULL; in qla2x00_alloc_queues()
460 kfree(ha->rsp_q_map); in qla2x00_alloc_queues()
461 ha->rsp_q_map = NULL; in qla2x00_alloc_queues()
463 kfree(ha->req_q_map); in qla2x00_alloc_queues()
464 ha->req_q_map = NULL; in qla2x00_alloc_queues()
469 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) in qla2x00_free_req_que() argument
471 if (IS_QLAFX00(ha)) { in qla2x00_free_req_que()
473 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
477 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
487 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) in qla2x00_free_rsp_que() argument
489 if (IS_QLAFX00(ha)) { in qla2x00_free_rsp_que()
491 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
495 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
502 static void qla2x00_free_queues(struct qla_hw_data *ha) in qla2x00_free_queues() argument
509 if (ha->queue_pair_map) { in qla2x00_free_queues()
510 kfree(ha->queue_pair_map); in qla2x00_free_queues()
511 ha->queue_pair_map = NULL; in qla2x00_free_queues()
513 if (ha->base_qpair) { in qla2x00_free_queues()
514 kfree(ha->base_qpair); in qla2x00_free_queues()
515 ha->base_qpair = NULL; in qla2x00_free_queues()
518 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_free_queues()
519 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { in qla2x00_free_queues()
520 if (!test_bit(cnt, ha->req_qid_map)) in qla2x00_free_queues()
523 req = ha->req_q_map[cnt]; in qla2x00_free_queues()
524 clear_bit(cnt, ha->req_qid_map); in qla2x00_free_queues()
525 ha->req_q_map[cnt] = NULL; in qla2x00_free_queues()
527 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_free_queues()
528 qla2x00_free_req_que(ha, req); in qla2x00_free_queues()
529 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_free_queues()
531 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_free_queues()
533 kfree(ha->req_q_map); in qla2x00_free_queues()
534 ha->req_q_map = NULL; in qla2x00_free_queues()
537 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_free_queues()
538 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { in qla2x00_free_queues()
539 if (!test_bit(cnt, ha->rsp_qid_map)) in qla2x00_free_queues()
542 rsp = ha->rsp_q_map[cnt]; in qla2x00_free_queues()
543 clear_bit(cnt, ha->rsp_qid_map); in qla2x00_free_queues()
544 ha->rsp_q_map[cnt] = NULL; in qla2x00_free_queues()
545 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_free_queues()
546 qla2x00_free_rsp_que(ha, rsp); in qla2x00_free_queues()
547 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_free_queues()
549 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_free_queues()
551 kfree(ha->rsp_q_map); in qla2x00_free_queues()
552 ha->rsp_q_map = NULL; in qla2x00_free_queues()
558 struct qla_hw_data *ha = vha->hw; in qla2x00_pci_info_str() local
564 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; in qla2x00_pci_info_str()
569 pci_bus = (ha->pci_attr & BIT_8) >> 8; in qla2x00_pci_info_str()
582 struct qla_hw_data *ha = vha->hw; in qla24xx_pci_info_str() local
585 if (pci_is_pcie(ha->pdev)) { in qla24xx_pci_info_str()
589 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat); in qla24xx_pci_info_str()
615 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; in qla24xx_pci_info_str()
631 struct qla_hw_data *ha = vha->hw; in qla2x00_fw_version_str() local
633 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version, in qla2x00_fw_version_str()
634 ha->fw_minor_version, ha->fw_subminor_version); in qla2x00_fw_version_str()
636 if (ha->fw_attributes & BIT_9) { in qla2x00_fw_version_str()
641 switch (ha->fw_attributes & 0xFF) { in qla2x00_fw_version_str()
655 sprintf(un_str, "(%x)", ha->fw_attributes); in qla2x00_fw_version_str()
659 if (ha->fw_attributes & 0x100) in qla2x00_fw_version_str()
668 struct qla_hw_data *ha = vha->hw; in qla24xx_fw_version_str() local
670 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version, in qla24xx_fw_version_str()
671 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); in qla24xx_fw_version_str()
677 struct qla_hw_data *ha = sp->vha->hw; in qla2x00_sp_free_dma() local
686 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), in qla2x00_sp_free_dma()
693 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx); in qla2x00_sp_free_dma()
700 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma); in qla2x00_sp_free_dma()
707 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, in qla2x00_sp_free_dma()
709 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); in qla2x00_sp_free_dma()
710 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
711 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
712 mempool_free(ctx1, ha->ctx_mempool); in qla2x00_sp_free_dma()
732 struct qla_hw_data *ha = sp->fcport->vha->hw; in qla2xxx_qpair_sp_free_dma() local
740 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), in qla2xxx_qpair_sp_free_dma()
747 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx); in qla2xxx_qpair_sp_free_dma()
758 dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr, in qla2xxx_qpair_sp_free_dma()
767 dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr, in qla2xxx_qpair_sp_free_dma()
790 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, in qla2xxx_qpair_sp_free_dma()
792 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); in qla2xxx_qpair_sp_free_dma()
793 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; in qla2xxx_qpair_sp_free_dma()
794 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; in qla2xxx_qpair_sp_free_dma()
795 mempool_free(ctx1, ha->ctx_mempool); in qla2xxx_qpair_sp_free_dma()
802 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma); in qla2xxx_qpair_sp_free_dma()
826 struct qla_hw_data *ha = vha->hw; in qla2xxx_queuecommand() local
827 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_queuecommand()
837 if (ha->mqenable) { in qla2xxx_queuecommand()
844 qpair = ha->queue_pair_map[hwq]; in qla2xxx_queuecommand()
850 if (ha->flags.eeh_busy) { in qla2xxx_queuecommand()
851 if (ha->flags.pci_channel_io_perm_failure) { in qla2xxx_queuecommand()
921 rval = ha->isp_ops->start_scsi(sp); in qla2xxx_queuecommand()
950 struct qla_hw_data *ha = vha->hw; in qla2xxx_mqueuecommand() local
951 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_mqueuecommand()
1002 rval = ha->isp_ops->start_scsi_mq(sp); in qla2xxx_mqueuecommand()
1042 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_on_command() local
1045 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { in qla2x00_eh_wait_on_command()
1082 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_online() local
1083 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_hba_online()
1089 ha->dpc_active) && time_before(jiffies, wait_online)) { in qla2x00_wait_for_hba_online()
1103 struct qla_hw_data *ha = vha->hw; in test_fcport_count() local
1107 spin_lock_irqsave(&ha->tgt.sess_lock, flags); in test_fcport_count()
1112 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); in test_fcport_count()
1152 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_ready() local
1153 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_hba_ready()
1155 while ((qla2x00_reset_active(vha) || ha->dpc_active || in qla2x00_wait_for_hba_ready()
1156 ha->flags.mbox_busy) || in qla2x00_wait_for_hba_ready()
1170 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_chip_reset() local
1171 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_chip_reset()
1177 ha->dpc_active) && time_before(jiffies, wait_reset)) { in qla2x00_wait_for_chip_reset()
1182 ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
1185 if (ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
1210 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha) in qla2x00_isp_reg_stat() argument
1212 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla2x00_isp_reg_stat()
1213 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; in qla2x00_isp_reg_stat()
1215 if (IS_P3P_TYPE(ha)) in qla2x00_isp_reg_stat()
1247 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_abort() local
1253 if (qla2x00_isp_reg_stat(ha)) { in qla2xxx_eh_abort()
1287 rval = ha->isp_ops->abort_command(sp); in qla2xxx_eh_abort()
1293 ratov_j = ha->r_a_tov/10 * 4 * 1000; in qla2xxx_eh_abort()
1300 __func__, ha->r_a_tov/10); in qla2xxx_eh_abort()
1329 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_for_pending_commands() local
1336 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1364 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1366 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1368 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1442 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_device_reset() local
1444 if (qla2x00_isp_reg_stat(ha)) { in qla2xxx_eh_device_reset()
1451 ha->isp_ops->lun_reset); in qla2xxx_eh_device_reset()
1458 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_target_reset() local
1460 if (qla2x00_isp_reg_stat(ha)) { in qla2xxx_eh_target_reset()
1467 ha->isp_ops->target_reset); in qla2xxx_eh_target_reset()
1493 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_bus_reset() local
1495 if (qla2x00_isp_reg_stat(ha)) { in qla2xxx_eh_bus_reset()
1566 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_host_reset() local
1570 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_eh_host_reset()
1572 if (qla2x00_isp_reg_stat(ha)) { in qla2xxx_eh_host_reset()
1575 schedule_work(&ha->board_disable); in qla2xxx_eh_host_reset()
1589 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING) in qla2xxx_eh_host_reset()
1604 if (ha->wq) in qla2xxx_eh_host_reset()
1605 flush_workqueue(ha->wq); in qla2xxx_eh_host_reset()
1608 if (ha->isp_ops->abort_isp(base_vha)) { in qla2xxx_eh_host_reset()
1649 struct qla_hw_data *ha = vha->hw; in qla2x00_loop_reset() local
1651 if (IS_QLAFX00(ha)) in qla2x00_loop_reset()
1654 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) { in qla2x00_loop_reset()
1665 if (ha->flags.enable_lip_reset) { in qla2x00_loop_reset()
1689 struct qla_hw_data *ha = vha->hw; in qla2x00_abort_srb() local
1703 (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy && in qla2x00_abort_srb()
1705 !qla2x00_isp_reg_stat(ha))) { in qla2x00_abort_srb()
1714 rval = ha->isp_ops->abort_command(sp); in qla2x00_abort_srb()
1717 ratov_j = ha->r_a_tov/10 * 4 * 1000; in qla2x00_abort_srb()
1724 __func__, ha->r_a_tov/10); in qla2x00_abort_srb()
1753 struct qla_hw_data *ha = vha->hw; in __qla2x00_abort_all_cmds() local
1758 if (!ha->req_q_map) in __qla2x00_abort_all_cmds()
1800 struct qla_hw_data *ha = vha->hw; in qla2x00_abort_all_cmds() local
1803 if (!ha->base_qpair) in qla2x00_abort_all_cmds()
1805 __qla2x00_abort_all_cmds(ha->base_qpair, res); in qla2x00_abort_all_cmds()
1807 if (!ha->queue_pair_map) in qla2x00_abort_all_cmds()
1809 for (que = 0; que < ha->max_qpairs; que++) { in qla2x00_abort_all_cmds()
1810 if (!ha->queue_pair_map[que]) in qla2x00_abort_all_cmds()
1813 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res); in qla2x00_abort_all_cmds()
1857 qla2x00_config_dma_addressing(struct qla_hw_data *ha) in qla2x00_config_dma_addressing() argument
1860 ha->flags.enable_64bit_addressing = 0; in qla2x00_config_dma_addressing()
1862 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1864 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && in qla2x00_config_dma_addressing()
1865 !dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1867 ha->flags.enable_64bit_addressing = 1; in qla2x00_config_dma_addressing()
1868 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; in qla2x00_config_dma_addressing()
1869 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; in qla2x00_config_dma_addressing()
1874 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1875 dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1879 qla2x00_enable_intrs(struct qla_hw_data *ha) in qla2x00_enable_intrs() argument
1882 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_enable_intrs()
1884 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1885 ha->interrupts_on = 1; in qla2x00_enable_intrs()
1889 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1894 qla2x00_disable_intrs(struct qla_hw_data *ha) in qla2x00_disable_intrs() argument
1897 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_disable_intrs()
1899 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1900 ha->interrupts_on = 0; in qla2x00_disable_intrs()
1904 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1908 qla24xx_enable_intrs(struct qla_hw_data *ha) in qla24xx_enable_intrs() argument
1911 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_enable_intrs()
1913 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1914 ha->interrupts_on = 1; in qla24xx_enable_intrs()
1917 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1921 qla24xx_disable_intrs(struct qla_hw_data *ha) in qla24xx_disable_intrs() argument
1924 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_disable_intrs()
1926 if (IS_NOPOLLING_TYPE(ha)) in qla24xx_disable_intrs()
1928 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1929 ha->interrupts_on = 0; in qla24xx_disable_intrs()
1932 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1936 qla2x00_iospace_config(struct qla_hw_data *ha) in qla2x00_iospace_config() argument
1941 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla2x00_iospace_config()
1943 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, in qla2x00_iospace_config()
1945 pci_name(ha->pdev)); in qla2x00_iospace_config()
1948 if (!(ha->bars & 1)) in qla2x00_iospace_config()
1952 pio = pci_resource_start(ha->pdev, 0); in qla2x00_iospace_config()
1953 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { in qla2x00_iospace_config()
1954 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1955 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, in qla2x00_iospace_config()
1957 pci_name(ha->pdev)); in qla2x00_iospace_config()
1961 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, in qla2x00_iospace_config()
1963 pci_name(ha->pdev)); in qla2x00_iospace_config()
1966 ha->pio_address = pio; in qla2x00_iospace_config()
1967 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, in qla2x00_iospace_config()
1969 (unsigned long long)ha->pio_address); in qla2x00_iospace_config()
1973 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { in qla2x00_iospace_config()
1974 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, in qla2x00_iospace_config()
1976 pci_name(ha->pdev)); in qla2x00_iospace_config()
1979 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1980 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, in qla2x00_iospace_config()
1982 pci_name(ha->pdev)); in qla2x00_iospace_config()
1986 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); in qla2x00_iospace_config()
1987 if (!ha->iobase) { in qla2x00_iospace_config()
1988 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, in qla2x00_iospace_config()
1990 pci_name(ha->pdev)); in qla2x00_iospace_config()
1995 ha->max_req_queues = ha->max_rsp_queues = 1; in qla2x00_iospace_config()
1996 ha->msix_count = QLA_BASE_VECTORS; in qla2x00_iospace_config()
1999 if (!(ha->fw_attributes & BIT_6)) in qla2x00_iospace_config()
2003 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) in qla2x00_iospace_config()
2006 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), in qla2x00_iospace_config()
2007 pci_resource_len(ha->pdev, 3)); in qla2x00_iospace_config()
2008 if (ha->mqiobase) { in qla2x00_iospace_config()
2009 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, in qla2x00_iospace_config()
2010 "MQIO Base=%p.\n", ha->mqiobase); in qla2x00_iospace_config()
2012 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); in qla2x00_iospace_config()
2013 ha->msix_count = msix + 1; in qla2x00_iospace_config()
2016 ha->max_req_queues = ha->msix_count - 1; in qla2x00_iospace_config()
2017 ha->max_rsp_queues = ha->max_req_queues; in qla2x00_iospace_config()
2019 ha->max_qpairs = ha->max_rsp_queues - 1; in qla2x00_iospace_config()
2020 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188, in qla2x00_iospace_config()
2021 "Max no of queues pairs: %d.\n", ha->max_qpairs); in qla2x00_iospace_config()
2023 ql_log_pci(ql_log_info, ha->pdev, 0x001a, in qla2x00_iospace_config()
2024 "MSI-X vector count: %d.\n", ha->msix_count); in qla2x00_iospace_config()
2026 ql_log_pci(ql_log_info, ha->pdev, 0x001b, in qla2x00_iospace_config()
2030 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, in qla2x00_iospace_config()
2031 "MSIX Count: %d.\n", ha->msix_count); in qla2x00_iospace_config()
2040 qla83xx_iospace_config(struct qla_hw_data *ha) in qla83xx_iospace_config() argument
2044 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla83xx_iospace_config()
2046 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117, in qla83xx_iospace_config()
2048 pci_name(ha->pdev)); in qla83xx_iospace_config()
2054 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla83xx_iospace_config()
2055 ql_log_pci(ql_log_warn, ha->pdev, 0x0118, in qla83xx_iospace_config()
2057 pci_name(ha->pdev)); in qla83xx_iospace_config()
2060 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla83xx_iospace_config()
2061 ql_log_pci(ql_log_warn, ha->pdev, 0x0119, in qla83xx_iospace_config()
2063 pci_name(ha->pdev)); in qla83xx_iospace_config()
2067 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN); in qla83xx_iospace_config()
2068 if (!ha->iobase) { in qla83xx_iospace_config()
2069 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a, in qla83xx_iospace_config()
2071 pci_name(ha->pdev)); in qla83xx_iospace_config()
2078 ha->max_req_queues = ha->max_rsp_queues = 1; in qla83xx_iospace_config()
2079 ha->msix_count = QLA_BASE_VECTORS; in qla83xx_iospace_config()
2080 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4), in qla83xx_iospace_config()
2081 pci_resource_len(ha->pdev, 4)); in qla83xx_iospace_config()
2083 if (!ha->mqiobase) { in qla83xx_iospace_config()
2084 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d, in qla83xx_iospace_config()
2089 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2), in qla83xx_iospace_config()
2090 pci_resource_len(ha->pdev, 2)); in qla83xx_iospace_config()
2091 if (ha->msixbase) { in qla83xx_iospace_config()
2093 pci_read_config_word(ha->pdev, in qla83xx_iospace_config()
2095 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE) + 1; in qla83xx_iospace_config()
2102 ha->max_req_queues = ha->msix_count - 1; in qla83xx_iospace_config()
2106 ha->max_req_queues--; in qla83xx_iospace_config()
2108 ha->max_rsp_queues = ha->max_req_queues; in qla83xx_iospace_config()
2112 ha->max_qpairs = ha->max_req_queues - 1; in qla83xx_iospace_config()
2113 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3, in qla83xx_iospace_config()
2114 "Max no of queues pairs: %d.\n", ha->max_qpairs); in qla83xx_iospace_config()
2116 ql_log_pci(ql_log_info, ha->pdev, 0x011c, in qla83xx_iospace_config()
2117 "MSI-X vector count: %d.\n", ha->msix_count); in qla83xx_iospace_config()
2119 ql_log_pci(ql_log_info, ha->pdev, 0x011e, in qla83xx_iospace_config()
2123 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f, in qla83xx_iospace_config()
2124 "MSIX Count: %d.\n", ha->msix_count); in qla83xx_iospace_config()
2523 qla2x00_set_isp_flags(struct qla_hw_data *ha) in qla2x00_set_isp_flags() argument
2525 ha->device_type = DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2526 switch (ha->pdev->device) { in qla2x00_set_isp_flags()
2528 ha->isp_type |= DT_ISP2100; in qla2x00_set_isp_flags()
2529 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2530 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2533 ha->isp_type |= DT_ISP2200; in qla2x00_set_isp_flags()
2534 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2535 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2538 ha->isp_type |= DT_ISP2300; in qla2x00_set_isp_flags()
2539 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2540 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2543 ha->isp_type |= DT_ISP2312; in qla2x00_set_isp_flags()
2544 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2545 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2548 ha->isp_type |= DT_ISP2322; in qla2x00_set_isp_flags()
2549 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2550 if (ha->pdev->subsystem_vendor == 0x1028 && in qla2x00_set_isp_flags()
2551 ha->pdev->subsystem_device == 0x0170) in qla2x00_set_isp_flags()
2552 ha->device_type |= DT_OEM_001; in qla2x00_set_isp_flags()
2553 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2556 ha->isp_type |= DT_ISP6312; in qla2x00_set_isp_flags()
2557 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2560 ha->isp_type |= DT_ISP6322; in qla2x00_set_isp_flags()
2561 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2564 ha->isp_type |= DT_ISP2422; in qla2x00_set_isp_flags()
2565 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2566 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2567 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2568 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2571 ha->isp_type |= DT_ISP2432; in qla2x00_set_isp_flags()
2572 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2573 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2574 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2575 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2578 ha->isp_type |= DT_ISP8432; in qla2x00_set_isp_flags()
2579 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2580 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2581 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2582 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2585 ha->isp_type |= DT_ISP5422; in qla2x00_set_isp_flags()
2586 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2587 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2590 ha->isp_type |= DT_ISP5432; in qla2x00_set_isp_flags()
2591 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2592 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2595 ha->isp_type |= DT_ISP2532; in qla2x00_set_isp_flags()
2596 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2597 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2598 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2599 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2602 ha->isp_type |= DT_ISP8001; in qla2x00_set_isp_flags()
2603 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2604 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2605 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2606 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2609 ha->isp_type |= DT_ISP8021; in qla2x00_set_isp_flags()
2610 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2611 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2612 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2614 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2617 ha->isp_type |= DT_ISP8044; in qla2x00_set_isp_flags()
2618 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2619 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2620 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2622 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2625 ha->isp_type |= DT_ISP2031; in qla2x00_set_isp_flags()
2626 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2627 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2628 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2629 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2630 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2633 ha->isp_type |= DT_ISP8031; in qla2x00_set_isp_flags()
2634 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2635 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2636 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2637 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2638 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2641 ha->isp_type |= DT_ISPFX00; in qla2x00_set_isp_flags()
2644 ha->isp_type |= DT_ISP2071; in qla2x00_set_isp_flags()
2645 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2646 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2647 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2648 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2649 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2652 ha->isp_type |= DT_ISP2271; in qla2x00_set_isp_flags()
2653 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2654 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2655 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2656 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2657 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2660 ha->isp_type |= DT_ISP2261; in qla2x00_set_isp_flags()
2661 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2662 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2663 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2664 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2665 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2669 ha->isp_type |= DT_ISP2081; in qla2x00_set_isp_flags()
2670 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2671 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2672 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2673 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2674 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2678 ha->isp_type |= DT_ISP2281; in qla2x00_set_isp_flags()
2679 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2680 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2681 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2682 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2683 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2687 if (IS_QLA82XX(ha)) in qla2x00_set_isp_flags()
2688 ha->port_no = ha->portnum & 1; in qla2x00_set_isp_flags()
2691 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); in qla2x00_set_isp_flags()
2692 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || in qla2x00_set_isp_flags()
2693 IS_QLA27XX(ha) || IS_QLA28XX(ha)) in qla2x00_set_isp_flags()
2694 ha->port_no--; in qla2x00_set_isp_flags()
2696 ha->port_no = !(ha->port_no & 1); in qla2x00_set_isp_flags()
2699 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, in qla2x00_set_isp_flags()
2701 ha->device_type, ha->port_no, ha->fw_srisc_address); in qla2x00_set_isp_flags()
2737 struct qla_hw_data *ha = vha->hw; in qla2x00_iocb_work_fn() local
2738 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_iocb_work_fn()
2764 struct qla_hw_data *ha; in qla2x00_probe_one() local
2819 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); in qla2x00_probe_one()
2820 if (!ha) { in qla2x00_probe_one()
2826 "Memory allocated for ha=%p.\n", ha); in qla2x00_probe_one()
2827 ha->pdev = pdev; in qla2x00_probe_one()
2828 INIT_LIST_HEAD(&ha->tgt.q_full_list); in qla2x00_probe_one()
2829 spin_lock_init(&ha->tgt.q_full_lock); in qla2x00_probe_one()
2830 spin_lock_init(&ha->tgt.sess_lock); in qla2x00_probe_one()
2831 spin_lock_init(&ha->tgt.atio_lock); in qla2x00_probe_one()
2833 atomic_set(&ha->nvme_active_aen_cnt, 0); in qla2x00_probe_one()
2836 ha->bars = bars; in qla2x00_probe_one()
2837 ha->mem_only = mem_only; in qla2x00_probe_one()
2838 spin_lock_init(&ha->hardware_lock); in qla2x00_probe_one()
2839 spin_lock_init(&ha->vport_slock); in qla2x00_probe_one()
2840 mutex_init(&ha->selflogin_lock); in qla2x00_probe_one()
2841 mutex_init(&ha->optrom_mutex); in qla2x00_probe_one()
2844 qla2x00_set_isp_flags(ha); in qla2x00_probe_one()
2847 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) || in qla2x00_probe_one()
2848 IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) in qla2x00_probe_one()
2851 ha->prev_topology = 0; in qla2x00_probe_one()
2852 ha->init_cb_size = sizeof(init_cb_t); in qla2x00_probe_one()
2853 ha->link_data_rate = PORT_SPEED_UNKNOWN; in qla2x00_probe_one()
2854 ha->optrom_size = OPTROM_SIZE_2300; in qla2x00_probe_one()
2855 ha->max_exchg = FW_MAX_EXCHANGES_CNT; in qla2x00_probe_one()
2856 atomic_set(&ha->num_pend_mbx_stage1, 0); in qla2x00_probe_one()
2857 atomic_set(&ha->num_pend_mbx_stage2, 0); in qla2x00_probe_one()
2858 atomic_set(&ha->num_pend_mbx_stage3, 0); in qla2x00_probe_one()
2859 atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD); in qla2x00_probe_one()
2860 ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD; in qla2x00_probe_one()
2863 if (IS_QLA2100(ha)) { in qla2x00_probe_one()
2864 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2865 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; in qla2x00_probe_one()
2868 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2869 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2870 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2871 ha->flash_data_off = ~0; in qla2x00_probe_one()
2872 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2873 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2874 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2875 } else if (IS_QLA2200(ha)) { in qla2x00_probe_one()
2876 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2877 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; in qla2x00_probe_one()
2880 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2881 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2882 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2883 ha->flash_data_off = ~0; in qla2x00_probe_one()
2884 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2885 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2886 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2887 } else if (IS_QLA23XX(ha)) { in qla2x00_probe_one()
2888 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2889 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2892 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2893 ha->gid_list_info_size = 6; in qla2x00_probe_one()
2894 if (IS_QLA2322(ha) || IS_QLA6322(ha)) in qla2x00_probe_one()
2895 ha->optrom_size = OPTROM_SIZE_2322; in qla2x00_probe_one()
2896 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2897 ha->flash_data_off = ~0; in qla2x00_probe_one()
2898 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2899 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2900 ha->isp_ops = &qla2300_isp_ops; in qla2x00_probe_one()
2901 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_probe_one()
2902 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2903 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2906 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2907 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2908 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2909 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2910 ha->optrom_size = OPTROM_SIZE_24XX; in qla2x00_probe_one()
2911 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; in qla2x00_probe_one()
2912 ha->isp_ops = &qla24xx_isp_ops; in qla2x00_probe_one()
2913 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2914 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2915 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2916 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2917 } else if (IS_QLA25XX(ha)) { in qla2x00_probe_one()
2918 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2919 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2922 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2923 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2924 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2925 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2926 ha->optrom_size = OPTROM_SIZE_25XX; in qla2x00_probe_one()
2927 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2928 ha->isp_ops = &qla25xx_isp_ops; in qla2x00_probe_one()
2929 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2930 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2931 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2932 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2933 } else if (IS_QLA81XX(ha)) { in qla2x00_probe_one()
2934 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2935 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2938 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2939 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2940 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2941 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2942 ha->optrom_size = OPTROM_SIZE_81XX; in qla2x00_probe_one()
2943 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2944 ha->isp_ops = &qla81xx_isp_ops; in qla2x00_probe_one()
2945 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2946 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2947 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2948 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2949 } else if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
2950 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2951 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2954 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2955 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2956 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2957 ha->optrom_size = OPTROM_SIZE_82XX; in qla2x00_probe_one()
2958 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2959 ha->isp_ops = &qla82xx_isp_ops; in qla2x00_probe_one()
2960 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2961 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2962 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2963 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2964 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
2965 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2966 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2969 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2970 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2971 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2972 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2973 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2974 ha->isp_ops = &qla8044_isp_ops; in qla2x00_probe_one()
2975 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2976 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2977 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2978 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2979 } else if (IS_QLA83XX(ha)) { in qla2x00_probe_one()
2980 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
2981 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2982 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2985 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2986 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2987 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2988 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2989 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2990 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2991 ha->isp_ops = &qla83xx_isp_ops; in qla2x00_probe_one()
2992 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2993 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2994 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2995 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2996 } else if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2997 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00; in qla2x00_probe_one()
2998 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
2999 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
3002 ha->isp_ops = &qlafx00_isp_ops; in qla2x00_probe_one()
3003 ha->port_down_retry_count = 30; /* default value */ in qla2x00_probe_one()
3004 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; in qla2x00_probe_one()
3005 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; in qla2x00_probe_one()
3006 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; in qla2x00_probe_one()
3007 ha->mr.fw_hbt_en = 1; in qla2x00_probe_one()
3008 ha->mr.host_info_resend = false; in qla2x00_probe_one()
3009 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL; in qla2x00_probe_one()
3010 } else if (IS_QLA27XX(ha)) { in qla2x00_probe_one()
3011 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
3012 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
3013 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
3016 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
3017 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
3018 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
3019 ha->gid_list_info_size = 8; in qla2x00_probe_one()
3020 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
3021 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
3022 ha->isp_ops = &qla27xx_isp_ops; in qla2x00_probe_one()
3023 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
3024 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
3025 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
3026 ha->nvram_data_off = ~0; in qla2x00_probe_one()
3027 } else if (IS_QLA28XX(ha)) { in qla2x00_probe_one()
3028 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
3029 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
3030 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
3033 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
3034 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
3035 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
3036 ha->gid_list_info_size = 8; in qla2x00_probe_one()
3037 ha->optrom_size = OPTROM_SIZE_28XX; in qla2x00_probe_one()
3038 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
3039 ha->isp_ops = &qla27xx_isp_ops; in qla2x00_probe_one()
3040 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX; in qla2x00_probe_one()
3041 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX; in qla2x00_probe_one()
3042 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
3043 ha->nvram_data_off = ~0; in qla2x00_probe_one()
3051 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, in qla2x00_probe_one()
3052 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, in qla2x00_probe_one()
3053 ha->nvram_npiv_size, ha->max_fibre_devices); in qla2x00_probe_one()
3057 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, in qla2x00_probe_one()
3058 ha->nvram_conf_off, ha->nvram_data_off); in qla2x00_probe_one()
3061 ret = ha->isp_ops->iospace_config(ha); in qla2x00_probe_one()
3067 pdev->device, pdev->irq, ha->iobase); in qla2x00_probe_one()
3068 mutex_init(&ha->vport_lock); in qla2x00_probe_one()
3069 mutex_init(&ha->mq_lock); in qla2x00_probe_one()
3070 init_completion(&ha->mbx_cmd_comp); in qla2x00_probe_one()
3071 complete(&ha->mbx_cmd_comp); in qla2x00_probe_one()
3072 init_completion(&ha->mbx_intr_comp); in qla2x00_probe_one()
3073 init_completion(&ha->dcbx_comp); in qla2x00_probe_one()
3074 init_completion(&ha->lb_portup_comp); in qla2x00_probe_one()
3076 set_bit(0, (unsigned long *) ha->vp_idx_map); in qla2x00_probe_one()
3078 qla2x00_config_dma_addressing(ha); in qla2x00_probe_one()
3081 ha->flags.enable_64bit_addressing ? "enable" : in qla2x00_probe_one()
3083 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); in qla2x00_probe_one()
3096 base_vha = qla2x00_create_host(sht, ha); in qla2x00_probe_one()
3107 if (IS_QLA2XXX_MIDTYPE(ha)) in qla2x00_probe_one()
3115 ha->mr.fcport.vha = base_vha; in qla2x00_probe_one()
3116 ha->mr.fcport.port_type = FCT_UNKNOWN; in qla2x00_probe_one()
3117 ha->mr.fcport.loop_id = FC_NO_LOOP_ID; in qla2x00_probe_one()
3118 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED); in qla2x00_probe_one()
3119 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED; in qla2x00_probe_one()
3120 ha->mr.fcport.scan_state = 1; in qla2x00_probe_one()
3123 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_probe_one()
3124 if (IS_QLA2100(ha)) in qla2x00_probe_one()
3127 if (!IS_QLA82XX(ha)) in qla2x00_probe_one()
3130 host->max_id = ha->max_fibre_devices; in qla2x00_probe_one()
3133 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) in qla2x00_probe_one()
3139 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) && in qla2x00_probe_one()
3158 ret = qla2x00_request_irqs(ha, rsp); in qla2x00_probe_one()
3163 ret = qla2x00_alloc_queues(ha, req, rsp); in qla2x00_probe_one()
3172 if (ha->mqenable) { in qla2x00_probe_one()
3174 host->nr_hw_queues = ha->max_qpairs; in qla2x00_probe_one()
3180 host->nr_hw_queues = ha->max_qpairs; in qla2x00_probe_one()
3190 qlt_probe_one_stage1(base_vha, ha); in qla2x00_probe_one()
3198 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
3199 ha->rsp_q_map[0] = rsp; in qla2x00_probe_one()
3200 ha->req_q_map[0] = req; in qla2x00_probe_one()
3201 set_bit(0, ha->req_qid_map); in qla2x00_probe_one()
3202 set_bit(0, ha->rsp_qid_map); in qla2x00_probe_one()
3206 req->req_q_in = &ha->iobase->isp24.req_q_in; in qla2x00_probe_one()
3207 req->req_q_out = &ha->iobase->isp24.req_q_out; in qla2x00_probe_one()
3208 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; in qla2x00_probe_one()
3209 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; in qla2x00_probe_one()
3210 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || in qla2x00_probe_one()
3211 IS_QLA28XX(ha)) { in qla2x00_probe_one()
3212 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; in qla2x00_probe_one()
3213 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; in qla2x00_probe_one()
3214 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; in qla2x00_probe_one()
3215 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; in qla2x00_probe_one()
3218 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
3219 req->req_q_in = &ha->iobase->ispfx00.req_q_in; in qla2x00_probe_one()
3220 req->req_q_out = &ha->iobase->ispfx00.req_q_out; in qla2x00_probe_one()
3221 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in; in qla2x00_probe_one()
3222 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out; in qla2x00_probe_one()
3225 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
3226 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; in qla2x00_probe_one()
3227 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; in qla2x00_probe_one()
3228 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; in qla2x00_probe_one()
3233 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
3241 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
3246 ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0); in qla2x00_probe_one()
3247 if (unlikely(!ha->wq)) { in qla2x00_probe_one()
3252 if (ha->isp_ops->initialize_adapter(base_vha)) { in qla2x00_probe_one()
3257 if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
3258 qla82xx_idc_lock(ha); in qla2x00_probe_one()
3259 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_probe_one()
3261 qla82xx_idc_unlock(ha); in qla2x00_probe_one()
3264 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
3265 qla8044_idc_lock(ha); in qla2x00_probe_one()
3269 qla8044_idc_unlock(ha); in qla2x00_probe_one()
3278 if (IS_QLAFX00(ha)) in qla2x00_probe_one()
3288 if (ha->mqenable) { in qla2x00_probe_one()
3298 for (i = 0; i < ha->max_qpairs; i++) in qla2x00_probe_one()
3303 if (ha->flags.running_gold_fw) in qla2x00_probe_one()
3309 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, in qla2x00_probe_one()
3311 if (IS_ERR(ha->dpc_thread)) { in qla2x00_probe_one()
3314 ret = PTR_ERR(ha->dpc_thread); in qla2x00_probe_one()
3315 ha->dpc_thread = NULL; in qla2x00_probe_one()
3329 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error); in qla2x00_probe_one()
3331 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { in qla2x00_probe_one()
3333 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
3334 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen); in qla2x00_probe_one()
3337 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
3338 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work); in qla2x00_probe_one()
3339 INIT_WORK(&ha->idc_state_handler, in qla2x00_probe_one()
3341 INIT_WORK(&ha->nic_core_unrecoverable, in qla2x00_probe_one()
3346 list_add_tail(&base_vha->list, &ha->vp_list); in qla2x00_probe_one()
3347 base_vha->host->irq = ha->pdev->irq; in qla2x00_probe_one()
3356 ha); in qla2x00_probe_one()
3358 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { in qla2x00_probe_one()
3359 if (ha->fw_attributes & BIT_4) { in qla2x00_probe_one()
3380 if (IS_PI_IPGUARD_CAPABLE(ha) && in qla2x00_probe_one()
3381 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha))) in qla2x00_probe_one()
3392 ha->isp_ops->enable_intrs(ha); in qla2x00_probe_one()
3394 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
3397 host->sg_tablesize = (ha->mr.extended_io_enabled) ? in qla2x00_probe_one()
3407 ha->prev_minidump_failed = 0; in qla2x00_probe_one()
3421 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
3435 "QLogic %s - %s.\n", ha->model_number, ha->model_desc); in qla2x00_probe_one()
3438 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info, in qla2x00_probe_one()
3440 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', in qla2x00_probe_one()
3442 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str))); in qla2x00_probe_one()
3444 qlt_add_target(ha, base_vha); in qla2x00_probe_one()
3455 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size, in qla2x00_probe_one()
3463 if (ha->dpc_thread) { in qla2x00_probe_one()
3464 struct task_struct *t = ha->dpc_thread; in qla2x00_probe_one()
3466 ha->dpc_thread = NULL; in qla2x00_probe_one()
3482 qla2x00_mem_free(ha); in qla2x00_probe_one()
3483 qla2x00_free_req_que(ha, req); in qla2x00_probe_one()
3484 qla2x00_free_rsp_que(ha, rsp); in qla2x00_probe_one()
3485 qla2x00_clear_drv_active(ha); in qla2x00_probe_one()
3488 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
3489 if (!ha->nx_pcibase) in qla2x00_probe_one()
3490 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_probe_one()
3492 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_probe_one()
3494 if (ha->iobase) in qla2x00_probe_one()
3495 iounmap(ha->iobase); in qla2x00_probe_one()
3496 if (ha->cregbase) in qla2x00_probe_one()
3497 iounmap(ha->cregbase); in qla2x00_probe_one()
3499 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_probe_one()
3500 kfree(ha); in qla2x00_probe_one()
3511 struct qla_hw_data *ha; in __qla_set_remove_flag() local
3516 ha = base_vha->hw; in __qla_set_remove_flag()
3518 spin_lock_irqsave(&ha->vport_slock, flags); in __qla_set_remove_flag()
3519 list_for_each_entry(vp, &ha->vp_list, list) in __qla_set_remove_flag()
3527 spin_unlock_irqrestore(&ha->vport_slock, flags); in __qla_set_remove_flag()
3534 struct qla_hw_data *ha; in qla2x00_shutdown() local
3537 ha = vha->hw; in qla2x00_shutdown()
3547 cancel_work_sync(&ha->board_disable); in qla2x00_shutdown()
3553 if (IS_QLAFX00(ha)) in qla2x00_shutdown()
3557 if (ha->flags.fce_enabled) { in qla2x00_shutdown()
3559 ha->flags.fce_enabled = 0; in qla2x00_shutdown()
3563 if (ha->eft) in qla2x00_shutdown()
3566 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) || in qla2x00_shutdown()
3567 IS_QLA28XX(ha)) { in qla2x00_shutdown()
3568 if (ha->flags.fw_started) in qla2x00_shutdown()
3583 if (ha->interrupts_on) { in qla2x00_shutdown()
3585 ha->isp_ops->disable_intrs(ha); in qla2x00_shutdown()
3590 qla2x00_free_fw_dump(ha); in qla2x00_shutdown()
3599 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha) in qla2x00_delete_all_vps() argument
3604 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
3605 while (ha->cur_vport_count) { in qla2x00_delete_all_vps()
3606 spin_lock_irqsave(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
3608 BUG_ON(base_vha->list.next == &ha->vp_list); in qla2x00_delete_all_vps()
3613 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
3614 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
3621 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
3623 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
3628 qla2x00_destroy_deferred_work(struct qla_hw_data *ha) in qla2x00_destroy_deferred_work() argument
3631 if (ha->dpc_lp_wq) { in qla2x00_destroy_deferred_work()
3632 cancel_work_sync(&ha->idc_aen); in qla2x00_destroy_deferred_work()
3633 destroy_workqueue(ha->dpc_lp_wq); in qla2x00_destroy_deferred_work()
3634 ha->dpc_lp_wq = NULL; in qla2x00_destroy_deferred_work()
3637 if (ha->dpc_hp_wq) { in qla2x00_destroy_deferred_work()
3638 cancel_work_sync(&ha->nic_core_reset); in qla2x00_destroy_deferred_work()
3639 cancel_work_sync(&ha->idc_state_handler); in qla2x00_destroy_deferred_work()
3640 cancel_work_sync(&ha->nic_core_unrecoverable); in qla2x00_destroy_deferred_work()
3641 destroy_workqueue(ha->dpc_hp_wq); in qla2x00_destroy_deferred_work()
3642 ha->dpc_hp_wq = NULL; in qla2x00_destroy_deferred_work()
3646 if (ha->dpc_thread) { in qla2x00_destroy_deferred_work()
3647 struct task_struct *t = ha->dpc_thread; in qla2x00_destroy_deferred_work()
3653 ha->dpc_thread = NULL; in qla2x00_destroy_deferred_work()
3659 qla2x00_unmap_iobases(struct qla_hw_data *ha) in qla2x00_unmap_iobases() argument
3661 if (IS_QLA82XX(ha)) { in qla2x00_unmap_iobases()
3663 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_unmap_iobases()
3665 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_unmap_iobases()
3667 if (ha->iobase) in qla2x00_unmap_iobases()
3668 iounmap(ha->iobase); in qla2x00_unmap_iobases()
3670 if (ha->cregbase) in qla2x00_unmap_iobases()
3671 iounmap(ha->cregbase); in qla2x00_unmap_iobases()
3673 if (ha->mqiobase) in qla2x00_unmap_iobases()
3674 iounmap(ha->mqiobase); in qla2x00_unmap_iobases()
3676 if (ha->msixbase) in qla2x00_unmap_iobases()
3677 iounmap(ha->msixbase); in qla2x00_unmap_iobases()
3682 qla2x00_clear_drv_active(struct qla_hw_data *ha) in qla2x00_clear_drv_active() argument
3684 if (IS_QLA8044(ha)) { in qla2x00_clear_drv_active()
3685 qla8044_idc_lock(ha); in qla2x00_clear_drv_active()
3686 qla8044_clear_drv_active(ha); in qla2x00_clear_drv_active()
3687 qla8044_idc_unlock(ha); in qla2x00_clear_drv_active()
3688 } else if (IS_QLA82XX(ha)) { in qla2x00_clear_drv_active()
3689 qla82xx_idc_lock(ha); in qla2x00_clear_drv_active()
3690 qla82xx_clear_drv_active(ha); in qla2x00_clear_drv_active()
3691 qla82xx_idc_unlock(ha); in qla2x00_clear_drv_active()
3699 struct qla_hw_data *ha; in qla2x00_remove_one() local
3702 ha = base_vha->hw; in qla2x00_remove_one()
3706 cancel_work_sync(&ha->board_disable); in qla2x00_remove_one()
3714 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size, in qla2x00_remove_one()
3718 kfree(ha); in qla2x00_remove_one()
3731 if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) || in qla2x00_remove_one()
3732 IS_QLA28XX(ha)) { in qla2x00_remove_one()
3733 if (ha->flags.fw_started) in qla2x00_remove_one()
3735 } else if (!IS_QLAFX00(ha)) { in qla2x00_remove_one()
3736 if (IS_QLA8031(ha)) { in qla2x00_remove_one()
3751 dma_free_coherent(&ha->pdev->dev, in qla2x00_remove_one()
3758 if (IS_QLAFX00(ha)) in qla2x00_remove_one()
3761 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_remove_one()
3774 if (ha->exlogin_buf) in qla2x00_remove_one()
3775 qla2x00_free_exlogin_buffer(ha); in qla2x00_remove_one()
3778 if (ha->exchoffld_buf) in qla2x00_remove_one()
3779 qla2x00_free_exchoffld_buffer(ha); in qla2x00_remove_one()
3781 qla2x00_destroy_deferred_work(ha); in qla2x00_remove_one()
3783 qlt_remove_target(ha, base_vha); in qla2x00_remove_one()
3788 qlt_remove_target_resources(ha); in qla2x00_remove_one()
3794 qla2x00_clear_drv_active(ha); in qla2x00_remove_one()
3798 qla2x00_unmap_iobases(ha); in qla2x00_remove_one()
3800 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_remove_one()
3801 kfree(ha); in qla2x00_remove_one()
3825 struct qla_hw_data *ha = vha->hw; in qla2x00_free_device() local
3837 if (ha->interrupts_on) { in qla2x00_free_device()
3839 ha->isp_ops->disable_intrs(ha); in qla2x00_free_device()
3847 if (ha->wq) { in qla2x00_free_device()
3848 flush_workqueue(ha->wq); in qla2x00_free_device()
3849 destroy_workqueue(ha->wq); in qla2x00_free_device()
3850 ha->wq = NULL; in qla2x00_free_device()
3856 qla2x00_mem_free(ha); in qla2x00_free_device()
3860 qla2x00_free_queues(ha); in qla2x00_free_device()
3949 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha) in qla2x00_set_reserved_loop_ids() argument
3953 if (IS_FWI2_CAPABLE(ha)) in qla2x00_set_reserved_loop_ids()
3957 set_bit(i, ha->loop_id_map); in qla2x00_set_reserved_loop_ids()
3958 set_bit(MANAGEMENT_SERVER, ha->loop_id_map); in qla2x00_set_reserved_loop_ids()
3959 set_bit(BROADCAST, ha->loop_id_map); in qla2x00_set_reserved_loop_ids()
3971 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, in qla2x00_mem_alloc() argument
3976 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_alloc()
3977 &ha->init_cb_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3978 if (!ha->init_cb) in qla2x00_mem_alloc()
3981 if (qlt_mem_alloc(ha) < 0) in qla2x00_mem_alloc()
3984 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3985 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3986 if (!ha->gid_list) in qla2x00_mem_alloc()
3989 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); in qla2x00_mem_alloc()
3990 if (!ha->srb_mempool) in qla2x00_mem_alloc()
3993 if (IS_P3P_TYPE(ha)) { in qla2x00_mem_alloc()
4002 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, in qla2x00_mem_alloc()
4004 if (!ha->ctx_mempool) in qla2x00_mem_alloc()
4006 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, in qla2x00_mem_alloc()
4008 ctx_cachep, ha->ctx_mempool); in qla2x00_mem_alloc()
4012 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); in qla2x00_mem_alloc()
4013 if (!ha->nvram) in qla2x00_mem_alloc()
4017 ha->pdev->device); in qla2x00_mem_alloc()
4018 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
4020 if (!ha->s_dma_pool) in qla2x00_mem_alloc()
4023 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, in qla2x00_mem_alloc()
4025 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); in qla2x00_mem_alloc()
4027 if (IS_P3P_TYPE(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
4028 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
4030 if (!ha->dl_dma_pool) { in qla2x00_mem_alloc()
4031 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, in qla2x00_mem_alloc()
4036 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
4038 if (!ha->fcp_cmnd_dma_pool) { in qla2x00_mem_alloc()
4039 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, in qla2x00_mem_alloc()
4049 ha->dif_bundl_pool = dma_pool_create(name, in qla2x00_mem_alloc()
4050 &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0); in qla2x00_mem_alloc()
4051 if (!ha->dif_bundl_pool) { in qla2x00_mem_alloc()
4052 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024, in qla2x00_mem_alloc()
4058 INIT_LIST_HEAD(&ha->pool.good.head); in qla2x00_mem_alloc()
4059 INIT_LIST_HEAD(&ha->pool.unusable.head); in qla2x00_mem_alloc()
4060 ha->pool.good.count = 0; in qla2x00_mem_alloc()
4061 ha->pool.unusable.count = 0; in qla2x00_mem_alloc()
4065 ql_dbg_pci(ql_dbg_init, ha->pdev, in qla2x00_mem_alloc()
4070 ha->dif_bundle_kallocs++; in qla2x00_mem_alloc()
4073 ha->dif_bundl_pool, GFP_ATOMIC, in qla2x00_mem_alloc()
4076 ql_dbg_pci(ql_dbg_init, ha->pdev, in qla2x00_mem_alloc()
4081 ha->dif_bundle_kallocs--; in qla2x00_mem_alloc()
4084 ha->dif_bundle_dma_allocs++; in qla2x00_mem_alloc()
4093 &ha->pool.unusable.head); in qla2x00_mem_alloc()
4094 ha->pool.unusable.count++; in qla2x00_mem_alloc()
4097 &ha->pool.good.head); in qla2x00_mem_alloc()
4098 ha->pool.good.count++; in qla2x00_mem_alloc()
4104 &ha->pool.good.head, list) { in qla2x00_mem_alloc()
4106 dma_pool_free(ha->dif_bundl_pool, in qla2x00_mem_alloc()
4108 ha->dif_bundle_dma_allocs--; in qla2x00_mem_alloc()
4110 ha->dif_bundle_kallocs--; in qla2x00_mem_alloc()
4113 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024, in qla2x00_mem_alloc()
4115 __func__, ha->pool.good.count, in qla2x00_mem_alloc()
4116 ha->pool.unusable.count); in qla2x00_mem_alloc()
4119 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, in qla2x00_mem_alloc()
4121 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool, in qla2x00_mem_alloc()
4122 ha->dif_bundl_pool); in qla2x00_mem_alloc()
4126 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { in qla2x00_mem_alloc()
4128 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4129 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); in qla2x00_mem_alloc()
4130 if (!ha->sns_cmd) in qla2x00_mem_alloc()
4132 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, in qla2x00_mem_alloc()
4133 "sns_cmd: %p.\n", ha->sns_cmd); in qla2x00_mem_alloc()
4136 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
4137 &ha->ms_iocb_dma); in qla2x00_mem_alloc()
4138 if (!ha->ms_iocb) in qla2x00_mem_alloc()
4141 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4142 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); in qla2x00_mem_alloc()
4143 if (!ha->ct_sns) in qla2x00_mem_alloc()
4145 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, in qla2x00_mem_alloc()
4147 ha->ms_iocb, ha->ct_sns); in qla2x00_mem_alloc()
4153 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, in qla2x00_mem_alloc()
4158 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4162 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, in qla2x00_mem_alloc()
4169 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, in qla2x00_mem_alloc()
4173 (*rsp)->hw = ha; in qla2x00_mem_alloc()
4175 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4179 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, in qla2x00_mem_alloc()
4185 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, in qla2x00_mem_alloc()
4191 if (ha->nvram_npiv_size) { in qla2x00_mem_alloc()
4192 ha->npiv_info = kcalloc(ha->nvram_npiv_size, in qla2x00_mem_alloc()
4195 if (!ha->npiv_info) { in qla2x00_mem_alloc()
4196 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, in qla2x00_mem_alloc()
4201 ha->npiv_info = NULL; in qla2x00_mem_alloc()
4204 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) || in qla2x00_mem_alloc()
4205 IS_QLA28XX(ha)) { in qla2x00_mem_alloc()
4206 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
4207 &ha->ex_init_cb_dma); in qla2x00_mem_alloc()
4208 if (!ha->ex_init_cb) in qla2x00_mem_alloc()
4210 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, in qla2x00_mem_alloc()
4211 "ex_init_cb=%p.\n", ha->ex_init_cb); in qla2x00_mem_alloc()
4215 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { in qla2x00_mem_alloc()
4216 ha->sf_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
4217 &ha->sf_init_cb_dma); in qla2x00_mem_alloc()
4218 if (!ha->sf_init_cb) in qla2x00_mem_alloc()
4220 memset(ha->sf_init_cb, 0, sizeof(struct init_sf_cb)); in qla2x00_mem_alloc()
4221 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199, in qla2x00_mem_alloc()
4222 "sf_init_cb=%p.\n", ha->sf_init_cb); in qla2x00_mem_alloc()
4225 INIT_LIST_HEAD(&ha->gbl_dsd_list); in qla2x00_mem_alloc()
4228 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_mem_alloc()
4229 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
4230 &ha->async_pd_dma); in qla2x00_mem_alloc()
4231 if (!ha->async_pd) in qla2x00_mem_alloc()
4233 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, in qla2x00_mem_alloc()
4234 "async_pd=%p.\n", ha->async_pd); in qla2x00_mem_alloc()
4237 INIT_LIST_HEAD(&ha->vp_list); in qla2x00_mem_alloc()
4240 ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE), in qla2x00_mem_alloc()
4243 if (!ha->loop_id_map) in qla2x00_mem_alloc()
4246 qla2x00_set_reserved_loop_ids(ha); in qla2x00_mem_alloc()
4247 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123, in qla2x00_mem_alloc()
4248 "loop_id_map=%p.\n", ha->loop_id_map); in qla2x00_mem_alloc()
4251 ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4252 SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL); in qla2x00_mem_alloc()
4253 if (!ha->sfp_data) { in qla2x00_mem_alloc()
4254 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, in qla2x00_mem_alloc()
4259 ha->flt = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
4260 sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma, in qla2x00_mem_alloc()
4262 if (!ha->flt) { in qla2x00_mem_alloc()
4263 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, in qla2x00_mem_alloc()
4271 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, in qla2x00_mem_alloc()
4272 ha->sfp_data, ha->sfp_data_dma); in qla2x00_mem_alloc()
4274 kfree(ha->loop_id_map); in qla2x00_mem_alloc()
4276 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); in qla2x00_mem_alloc()
4278 dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma); in qla2x00_mem_alloc()
4280 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_alloc()
4282 kfree(ha->npiv_info); in qla2x00_mem_alloc()
4284 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * in qla2x00_mem_alloc()
4292 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * in qla2x00_mem_alloc()
4300 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_alloc()
4301 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_alloc()
4302 ha->ct_sns = NULL; in qla2x00_mem_alloc()
4303 ha->ct_sns_dma = 0; in qla2x00_mem_alloc()
4305 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_alloc()
4306 ha->ms_iocb = NULL; in qla2x00_mem_alloc()
4307 ha->ms_iocb_dma = 0; in qla2x00_mem_alloc()
4309 if (ha->sns_cmd) in qla2x00_mem_alloc()
4310 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), in qla2x00_mem_alloc()
4311 ha->sns_cmd, ha->sns_cmd_dma); in qla2x00_mem_alloc()
4316 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head, in qla2x00_mem_alloc()
4319 dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr, in qla2x00_mem_alloc()
4321 ha->dif_bundle_dma_allocs--; in qla2x00_mem_alloc()
4323 ha->dif_bundle_kallocs--; in qla2x00_mem_alloc()
4324 ha->pool.unusable.count--; in qla2x00_mem_alloc()
4326 dma_pool_destroy(ha->dif_bundl_pool); in qla2x00_mem_alloc()
4327 ha->dif_bundl_pool = NULL; in qla2x00_mem_alloc()
4331 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
4332 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_alloc()
4333 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_alloc()
4336 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
4337 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_alloc()
4338 ha->dl_dma_pool = NULL; in qla2x00_mem_alloc()
4341 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_alloc()
4342 ha->s_dma_pool = NULL; in qla2x00_mem_alloc()
4344 kfree(ha->nvram); in qla2x00_mem_alloc()
4345 ha->nvram = NULL; in qla2x00_mem_alloc()
4347 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_alloc()
4348 ha->ctx_mempool = NULL; in qla2x00_mem_alloc()
4350 mempool_destroy(ha->srb_mempool); in qla2x00_mem_alloc()
4351 ha->srb_mempool = NULL; in qla2x00_mem_alloc()
4353 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_alloc()
4354 ha->gid_list, in qla2x00_mem_alloc()
4355 ha->gid_list_dma); in qla2x00_mem_alloc()
4356 ha->gid_list = NULL; in qla2x00_mem_alloc()
4357 ha->gid_list_dma = 0; in qla2x00_mem_alloc()
4359 qlt_mem_free(ha); in qla2x00_mem_alloc()
4361 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, in qla2x00_mem_alloc()
4362 ha->init_cb_dma); in qla2x00_mem_alloc()
4363 ha->init_cb = NULL; in qla2x00_mem_alloc()
4364 ha->init_cb_dma = 0; in qla2x00_mem_alloc()
4377 struct qla_hw_data *ha = vha->hw; in qla2x00_set_exlogins_buffer() local
4383 if (!IS_EXLOGIN_OFFLD_CAPABLE(ha)) in qla2x00_set_exlogins_buffer()
4390 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029, in qla2x00_set_exlogins_buffer()
4398 if (temp != ha->exlogin_size) { in qla2x00_set_exlogins_buffer()
4399 qla2x00_free_exlogin_buffer(ha); in qla2x00_set_exlogins_buffer()
4400 ha->exlogin_size = temp; in qla2x00_set_exlogins_buffer()
4407 "EXLOGIN: requested size=0x%x\n", ha->exlogin_size); in qla2x00_set_exlogins_buffer()
4410 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_set_exlogins_buffer()
4411 ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL); in qla2x00_set_exlogins_buffer()
4412 if (!ha->exlogin_buf) { in qla2x00_set_exlogins_buffer()
4413 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a, in qla2x00_set_exlogins_buffer()
4420 rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma); in qla2x00_set_exlogins_buffer()
4424 qla2x00_free_exlogin_buffer(ha); in qla2x00_set_exlogins_buffer()
4437 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha) in qla2x00_free_exlogin_buffer() argument
4439 if (ha->exlogin_buf) { in qla2x00_free_exlogin_buffer()
4440 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size, in qla2x00_free_exlogin_buffer()
4441 ha->exlogin_buf, ha->exlogin_buf_dma); in qla2x00_free_exlogin_buffer()
4442 ha->exlogin_buf = NULL; in qla2x00_free_exlogin_buffer()
4443 ha->exlogin_size = 0; in qla2x00_free_exlogin_buffer()
4492 struct qla_hw_data *ha = vha->hw; in qla2x00_set_exchoffld_buffer() local
4494 if (!ha->flags.exchoffld_enabled) in qla2x00_set_exchoffld_buffer()
4497 if (!IS_EXCHG_OFFLD_CAPABLE(ha)) in qla2x00_set_exchoffld_buffer()
4503 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012, in qla2x00_set_exchoffld_buffer()
4514 if (totsz != ha->exchoffld_size) { in qla2x00_set_exchoffld_buffer()
4515 qla2x00_free_exchoffld_buffer(ha); in qla2x00_set_exchoffld_buffer()
4517 ha->exchoffld_size = 0; in qla2x00_set_exchoffld_buffer()
4518 ha->flags.exchoffld_enabled = 0; in qla2x00_set_exchoffld_buffer()
4522 ha->exchoffld_size = totsz; in qla2x00_set_exchoffld_buffer()
4530 ha->exchoffld_size); in qla2x00_set_exchoffld_buffer()
4533 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_set_exchoffld_buffer()
4534 ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL); in qla2x00_set_exchoffld_buffer()
4535 if (!ha->exchoffld_buf) { in qla2x00_set_exchoffld_buffer()
4536 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013, in qla2x00_set_exchoffld_buffer()
4539 if (ha->max_exchg > in qla2x00_set_exchoffld_buffer()
4541 ha->max_exchg -= REDUCE_EXCHANGES_CNT; in qla2x00_set_exchoffld_buffer()
4542 } else if (ha->max_exchg > in qla2x00_set_exchoffld_buffer()
4544 ha->max_exchg -= 512; in qla2x00_set_exchoffld_buffer()
4546 ha->flags.exchoffld_enabled = 0; in qla2x00_set_exchoffld_buffer()
4547 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013, in qla2x00_set_exchoffld_buffer()
4550 ha->exchoffld_size = 0; in qla2x00_set_exchoffld_buffer()
4554 } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) { in qla2x00_set_exchoffld_buffer()
4556 qla2x00_free_exchoffld_buffer(ha); in qla2x00_set_exchoffld_buffer()
4557 ha->exchoffld_size = 0; in qla2x00_set_exchoffld_buffer()
4558 ha->flags.exchoffld_enabled = 0; in qla2x00_set_exchoffld_buffer()
4561 ha->exchoffld_size, actual_cnt, size, totsz); in qla2x00_set_exchoffld_buffer()
4570 qla2x00_free_exchoffld_buffer(ha); in qla2x00_set_exchoffld_buffer()
4573 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb; in qla2x00_set_exchoffld_buffer()
4591 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha) in qla2x00_free_exchoffld_buffer() argument
4593 if (ha->exchoffld_buf) { in qla2x00_free_exchoffld_buffer()
4594 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size, in qla2x00_free_exchoffld_buffer()
4595 ha->exchoffld_buf, ha->exchoffld_buf_dma); in qla2x00_free_exchoffld_buffer()
4596 ha->exchoffld_buf = NULL; in qla2x00_free_exchoffld_buffer()
4597 ha->exchoffld_size = 0; in qla2x00_free_exchoffld_buffer()
4609 qla2x00_free_fw_dump(struct qla_hw_data *ha) in qla2x00_free_fw_dump() argument
4611 struct fwdt *fwdt = ha->fwdt; in qla2x00_free_fw_dump()
4614 if (ha->fce) in qla2x00_free_fw_dump()
4615 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
4616 FCE_SIZE, ha->fce, ha->fce_dma); in qla2x00_free_fw_dump()
4618 if (ha->eft) in qla2x00_free_fw_dump()
4619 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
4620 EFT_SIZE, ha->eft, ha->eft_dma); in qla2x00_free_fw_dump()
4622 if (ha->fw_dump) in qla2x00_free_fw_dump()
4623 vfree(ha->fw_dump); in qla2x00_free_fw_dump()
4625 ha->fce = NULL; in qla2x00_free_fw_dump()
4626 ha->fce_dma = 0; in qla2x00_free_fw_dump()
4627 ha->flags.fce_enabled = 0; in qla2x00_free_fw_dump()
4628 ha->eft = NULL; in qla2x00_free_fw_dump()
4629 ha->eft_dma = 0; in qla2x00_free_fw_dump()
4630 ha->fw_dumped = false; in qla2x00_free_fw_dump()
4631 ha->fw_dump_cap_flags = 0; in qla2x00_free_fw_dump()
4632 ha->fw_dump_reading = 0; in qla2x00_free_fw_dump()
4633 ha->fw_dump = NULL; in qla2x00_free_fw_dump()
4634 ha->fw_dump_len = 0; in qla2x00_free_fw_dump()
4652 qla2x00_mem_free(struct qla_hw_data *ha) in qla2x00_mem_free() argument
4654 qla2x00_free_fw_dump(ha); in qla2x00_mem_free()
4656 if (ha->mctp_dump) in qla2x00_mem_free()
4657 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump, in qla2x00_mem_free()
4658 ha->mctp_dump_dma); in qla2x00_mem_free()
4659 ha->mctp_dump = NULL; in qla2x00_mem_free()
4661 mempool_destroy(ha->srb_mempool); in qla2x00_mem_free()
4662 ha->srb_mempool = NULL; in qla2x00_mem_free()
4664 if (ha->dcbx_tlv) in qla2x00_mem_free()
4665 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, in qla2x00_mem_free()
4666 ha->dcbx_tlv, ha->dcbx_tlv_dma); in qla2x00_mem_free()
4667 ha->dcbx_tlv = NULL; in qla2x00_mem_free()
4669 if (ha->xgmac_data) in qla2x00_mem_free()
4670 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, in qla2x00_mem_free()
4671 ha->xgmac_data, ha->xgmac_data_dma); in qla2x00_mem_free()
4672 ha->xgmac_data = NULL; in qla2x00_mem_free()
4674 if (ha->sns_cmd) in qla2x00_mem_free()
4675 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), in qla2x00_mem_free()
4676 ha->sns_cmd, ha->sns_cmd_dma); in qla2x00_mem_free()
4677 ha->sns_cmd = NULL; in qla2x00_mem_free()
4678 ha->sns_cmd_dma = 0; in qla2x00_mem_free()
4680 if (ha->ct_sns) in qla2x00_mem_free()
4681 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_free()
4682 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_free()
4683 ha->ct_sns = NULL; in qla2x00_mem_free()
4684 ha->ct_sns_dma = 0; in qla2x00_mem_free()
4686 if (ha->sfp_data) in qla2x00_mem_free()
4687 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data, in qla2x00_mem_free()
4688 ha->sfp_data_dma); in qla2x00_mem_free()
4689 ha->sfp_data = NULL; in qla2x00_mem_free()
4691 if (ha->flt) in qla2x00_mem_free()
4692 dma_free_coherent(&ha->pdev->dev, in qla2x00_mem_free()
4694 ha->flt, ha->flt_dma); in qla2x00_mem_free()
4695 ha->flt = NULL; in qla2x00_mem_free()
4696 ha->flt_dma = 0; in qla2x00_mem_free()
4698 if (ha->ms_iocb) in qla2x00_mem_free()
4699 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_free()
4700 ha->ms_iocb = NULL; in qla2x00_mem_free()
4701 ha->ms_iocb_dma = 0; in qla2x00_mem_free()
4703 if (ha->sf_init_cb) in qla2x00_mem_free()
4704 dma_pool_free(ha->s_dma_pool, in qla2x00_mem_free()
4705 ha->sf_init_cb, ha->sf_init_cb_dma); in qla2x00_mem_free()
4707 if (ha->ex_init_cb) in qla2x00_mem_free()
4708 dma_pool_free(ha->s_dma_pool, in qla2x00_mem_free()
4709 ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_free()
4710 ha->ex_init_cb = NULL; in qla2x00_mem_free()
4711 ha->ex_init_cb_dma = 0; in qla2x00_mem_free()
4713 if (ha->async_pd) in qla2x00_mem_free()
4714 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); in qla2x00_mem_free()
4715 ha->async_pd = NULL; in qla2x00_mem_free()
4716 ha->async_pd_dma = 0; in qla2x00_mem_free()
4718 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_free()
4719 ha->s_dma_pool = NULL; in qla2x00_mem_free()
4721 if (ha->gid_list) in qla2x00_mem_free()
4722 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_free()
4723 ha->gid_list, ha->gid_list_dma); in qla2x00_mem_free()
4724 ha->gid_list = NULL; in qla2x00_mem_free()
4725 ha->gid_list_dma = 0; in qla2x00_mem_free()
4727 if (IS_QLA82XX(ha)) { in qla2x00_mem_free()
4728 if (!list_empty(&ha->gbl_dsd_list)) { in qla2x00_mem_free()
4733 tdsd_ptr, &ha->gbl_dsd_list, list) { in qla2x00_mem_free()
4734 dma_pool_free(ha->dl_dma_pool, in qla2x00_mem_free()
4742 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_free()
4743 ha->dl_dma_pool = NULL; in qla2x00_mem_free()
4745 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_free()
4746 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_free()
4748 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_free()
4749 ha->ctx_mempool = NULL; in qla2x00_mem_free()
4751 if (ql2xenabledif && ha->dif_bundl_pool) { in qla2x00_mem_free()
4754 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head, in qla2x00_mem_free()
4757 dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr, in qla2x00_mem_free()
4759 ha->dif_bundle_dma_allocs--; in qla2x00_mem_free()
4761 ha->dif_bundle_kallocs--; in qla2x00_mem_free()
4762 ha->pool.unusable.count--; in qla2x00_mem_free()
4764 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) { in qla2x00_mem_free()
4766 dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr, in qla2x00_mem_free()
4768 ha->dif_bundle_dma_allocs--; in qla2x00_mem_free()
4770 ha->dif_bundle_kallocs--; in qla2x00_mem_free()
4774 dma_pool_destroy(ha->dif_bundl_pool); in qla2x00_mem_free()
4775 ha->dif_bundl_pool = NULL; in qla2x00_mem_free()
4777 qlt_mem_free(ha); in qla2x00_mem_free()
4779 if (ha->init_cb) in qla2x00_mem_free()
4780 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_free()
4781 ha->init_cb, ha->init_cb_dma); in qla2x00_mem_free()
4782 ha->init_cb = NULL; in qla2x00_mem_free()
4783 ha->init_cb_dma = 0; in qla2x00_mem_free()
4785 vfree(ha->optrom_buffer); in qla2x00_mem_free()
4786 ha->optrom_buffer = NULL; in qla2x00_mem_free()
4787 kfree(ha->nvram); in qla2x00_mem_free()
4788 ha->nvram = NULL; in qla2x00_mem_free()
4789 kfree(ha->npiv_info); in qla2x00_mem_free()
4790 ha->npiv_info = NULL; in qla2x00_mem_free()
4791 kfree(ha->swl); in qla2x00_mem_free()
4792 ha->swl = NULL; in qla2x00_mem_free()
4793 kfree(ha->loop_id_map); in qla2x00_mem_free()
4794 ha->sf_init_cb = NULL; in qla2x00_mem_free()
4795 ha->sf_init_cb_dma = 0; in qla2x00_mem_free()
4796 ha->loop_id_map = NULL; in qla2x00_mem_free()
4800 struct qla_hw_data *ha) in qla2x00_create_host() argument
4807 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, in qla2x00_create_host()
4818 vha->hw = ha; in qla2x00_create_host()
4845 (ha->max_loop_id + 1); in qla2x00_create_host()
4846 vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_create_host()
4856 vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp); in qla2x00_create_host()
4861 dma_free_coherent(&ha->pdev->dev, vha->gnl.size, in qla2x00_create_host()
4873 dev_name(&(ha->pdev->dev))); in qla2x00_create_host()
5444 struct qla_hw_data *ha = base_vha->hw; in qla83xx_schedule_work() local
5448 if (ha->dpc_lp_wq) in qla83xx_schedule_work()
5449 queue_work(ha->dpc_lp_wq, &ha->idc_aen); in qla83xx_schedule_work()
5453 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_schedule_work()
5454 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
5455 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset); in qla83xx_schedule_work()
5462 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
5463 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler); in qla83xx_schedule_work()
5466 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
5467 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable); in qla83xx_schedule_work()
5481 struct qla_hw_data *ha = in qla83xx_nic_core_unrecoverable_work() local
5483 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_unrecoverable_work()
5489 if (ha->flags.nic_core_reset_owner) { in qla83xx_nic_core_unrecoverable_work()
5490 ha->flags.nic_core_reset_owner = 0; in qla83xx_nic_core_unrecoverable_work()
5503 struct qla_hw_data *ha = in qla83xx_idc_state_handler_work() local
5505 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_idc_state_handler_work()
5549 struct qla_hw_data *ha = in qla83xx_nic_core_reset_work() local
5551 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_reset_work()
5554 if (IS_QLA2031(ha)) { in qla83xx_nic_core_reset_work()
5561 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_nic_core_reset_work()
5574 ha->flags.nic_core_reset_hdlr_active = 1; in qla83xx_nic_core_reset_work()
5580 ha->flags.nic_core_reset_hdlr_active = 0; in qla83xx_nic_core_reset_work()
5588 struct qla_hw_data *ha = in qla83xx_service_idc_aen() local
5590 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_service_idc_aen()
5641 struct qla_hw_data *ha = base_vha->hw; in qla83xx_force_lock_recovery() local
5653 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2); in qla83xx_force_lock_recovery()
5666 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) { in qla83xx_force_lock_recovery()
5736 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_lock() local
5745 ha->portnum); in qla83xx_idc_lock()
5827 struct qla_hw_data *ha = vha->hw; in qla24xx_process_purex_rdp() local
5858 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), in qla24xx_process_purex_rdp()
5866 rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload), in qla24xx_process_purex_rdp()
5874 sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN, in qla24xx_process_purex_rdp()
5877 stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat), in qla24xx_process_purex_rdp()
5975 qla25xx_fdmi_port_speed_capability(ha)); in qla24xx_process_purex_rdp()
5977 qla25xx_fdmi_port_speed_currently(ha)); in qla24xx_process_purex_rdp()
6033 if (ha->flags.plogi_template_valid) { in qla24xx_process_purex_rdp()
6035 be16_to_cpu(ha->plogi_els_payld.fl_csp.sp_bb_cred); in qla24xx_process_purex_rdp()
6215 dma_free_coherent(&ha->pdev->dev, sizeof(*stat), in qla24xx_process_purex_rdp()
6218 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN, in qla24xx_process_purex_rdp()
6221 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload), in qla24xx_process_purex_rdp()
6224 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), in qla24xx_process_purex_rdp()
6262 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_unlock() local
6271 if (data == ha->portnum) { in qla83xx_idc_unlock()
6319 struct qla_hw_data *ha = vha->hw; in __qla83xx_set_drv_presence() local
6324 drv_presence |= (1 << ha->portnum); in __qla83xx_set_drv_presence()
6348 struct qla_hw_data *ha = vha->hw; in __qla83xx_clear_drv_presence() local
6353 drv_presence &= ~(1 << ha->portnum); in __qla83xx_clear_drv_presence()
6376 struct qla_hw_data *ha = vha->hw; in qla83xx_need_reset_handler() local
6381 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla83xx_need_reset_handler()
6449 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_state_handler() local
6455 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
6474 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
6477 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
6480 ha->portnum); in qla83xx_idc_state_handler()
6483 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
6499 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
6509 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
6519 if (ha->flags.quiesce_owner) in qla83xx_idc_state_handler()
6526 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
6529 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
6532 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
6562 struct qla_hw_data *ha = container_of(work, struct qla_hw_data, in qla2x00_disable_board_on_pci_error() local
6564 struct pci_dev *pdev = ha->pdev; in qla2x00_disable_board_on_pci_error()
6565 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_disable_board_on_pci_error()
6586 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_disable_board_on_pci_error()
6599 qla2x00_destroy_deferred_work(ha); in qla2x00_disable_board_on_pci_error()
6615 qla2x00_mem_free(ha); in qla2x00_disable_board_on_pci_error()
6617 qla2x00_free_queues(ha); in qla2x00_disable_board_on_pci_error()
6619 qla2x00_unmap_iobases(ha); in qla2x00_disable_board_on_pci_error()
6621 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_disable_board_on_pci_error()
6647 struct qla_hw_data *ha; in qla2x00_do_dpc() local
6651 ha = (struct qla_hw_data *)data; in qla2x00_do_dpc()
6652 base_vha = pci_get_drvdata(ha->pdev); in qla2x00_do_dpc()
6663 if (!base_vha->flags.init_done || ha->flags.mbox_busy) in qla2x00_do_dpc()
6666 if (ha->flags.eeh_busy) { in qla2x00_do_dpc()
6668 "eeh_busy=%d.\n", ha->flags.eeh_busy); in qla2x00_do_dpc()
6672 ha->dpc_active = 1; in qla2x00_do_dpc()
6681 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
6682 if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
6685 qla8044_idc_lock(ha); in qla2x00_do_dpc()
6689 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
6699 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
6700 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_do_dpc()
6702 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
6731 } else if (IS_QLAFX00(ha)) { in qla2x00_do_dpc()
6795 !ha->flags.fw_started) in qla2x00_do_dpc()
6800 !ha->flags.fw_started) in qla2x00_do_dpc()
6812 if (ha->isp_ops->abort_isp(base_vha)) { in qla2x00_do_dpc()
6838 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
6844 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
6845 if (IS_QLA82XX(ha)) in qla2x00_do_dpc()
6847 if (IS_QLA8044(ha)) in qla2x00_do_dpc()
6851 if (!ha->flags.quiesce_owner) { in qla2x00_do_dpc()
6853 if (IS_QLA82XX(ha)) { in qla2x00_do_dpc()
6854 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
6857 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
6858 } else if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
6859 qla8044_idc_lock(ha); in qla2x00_do_dpc()
6862 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
6921 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
6931 if (!ha->interrupts_on) in qla2x00_do_dpc()
6932 ha->isp_ops->enable_intrs(ha); in qla2x00_do_dpc()
6936 if (ha->beacon_blink_led == 1) in qla2x00_do_dpc()
6937 ha->isp_ops->beacon_blink(base_vha); in qla2x00_do_dpc()
6943 if (ha->flags.eeh_busy || in qla2x00_do_dpc()
6944 ha->flags.pci_channel_io_perm_failure) in qla2x00_do_dpc()
6949 mutex_lock(&ha->mq_lock); in qla2x00_do_dpc()
6953 mutex_unlock(&ha->mq_lock); in qla2x00_do_dpc()
6960 ha->nvme_last_rptd_aen); in qla2x00_do_dpc()
6962 ha->nvme_last_rptd_aen)) { in qla2x00_do_dpc()
6965 ha->nvme_last_rptd_aen); in qla2x00_do_dpc()
6973 ha->last_zio_threshold); in qla2x00_do_dpc()
6975 ha->last_zio_threshold); in qla2x00_do_dpc()
6978 if (!IS_QLAFX00(ha)) in qla2x00_do_dpc()
6986 ha->dpc_active = 0; in qla2x00_do_dpc()
6998 ha->dpc_active = 0; in qla2x00_do_dpc()
7009 struct qla_hw_data *ha = vha->hw; in qla2xxx_wake_dpc() local
7010 struct task_struct *t = ha->dpc_thread; in qla2xxx_wake_dpc()
7059 struct qla_hw_data *ha = vha->hw; in qla2x00_timer() local
7062 if (ha->flags.eeh_busy) { in qla2x00_timer()
7065 ha->flags.eeh_busy); in qla2x00_timer()
7074 if (!pci_channel_offline(ha->pdev)) { in qla2x00_timer()
7075 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); in qla2x00_timer()
7080 if (!vha->vp_idx && IS_P3P_TYPE(ha)) { in qla2x00_timer()
7083 if (IS_QLA82XX(ha)) in qla2x00_timer()
7085 else if (IS_QLA8044(ha)) in qla2x00_timer()
7089 if (!vha->vp_idx && IS_QLAFX00(ha)) in qla2x00_timer()
7104 if (!IS_QLA2100(ha) && vha->link_down_timeout) in qla2x00_timer()
7113 spin_lock_irqsave(&ha->hardware_lock, in qla2x00_timer()
7115 req = ha->req_q_map[0]; in qla2x00_timer()
7132 if (IS_QLA82XX(ha)) in qla2x00_timer()
7140 spin_unlock_irqrestore(&ha->hardware_lock, in qla2x00_timer()
7152 if (IS_QLA82XX(ha)) in qla2x00_timer()
7165 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { in qla2x00_timer()
7167 if (!IS_P3P_TYPE(ha)) { in qla2x00_timer()
7190 index = atomic_read(&ha->nvme_active_aen_cnt); in qla2x00_timer()
7192 (index != ha->nvme_last_rptd_aen) && in qla2x00_timer()
7194 ha->zio_mode == QLA_ZIO_MODE_6 && in qla2x00_timer()
7195 !ha->flags.host_shutting_down) { in qla2x00_timer()
7198 ha->nvme_last_rptd_aen); in qla2x00_timer()
7199 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt); in qla2x00_timer()
7205 atomic_read(&ha->zio_threshold) != ha->last_zio_threshold && in qla2x00_timer()
7206 IS_ZIO_THRESHOLD_CAPABLE(ha)) { in qla2x00_timer()
7209 ha->last_zio_threshold); in qla2x00_timer()
7210 ha->last_zio_threshold = atomic_read(&ha->zio_threshold); in qla2x00_timer()
7302 struct qla_hw_data *ha = vha->hw; in qla2x00_request_firmware() local
7305 if (IS_QLA2100(ha)) { in qla2x00_request_firmware()
7307 } else if (IS_QLA2200(ha)) { in qla2x00_request_firmware()
7309 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { in qla2x00_request_firmware()
7311 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { in qla2x00_request_firmware()
7313 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_request_firmware()
7315 } else if (IS_QLA25XX(ha)) { in qla2x00_request_firmware()
7317 } else if (IS_QLA81XX(ha)) { in qla2x00_request_firmware()
7319 } else if (IS_QLA82XX(ha)) { in qla2x00_request_firmware()
7321 } else if (IS_QLA2031(ha)) { in qla2x00_request_firmware()
7323 } else if (IS_QLA8031(ha)) { in qla2x00_request_firmware()
7325 } else if (IS_QLA27XX(ha)) { in qla2x00_request_firmware()
7327 } else if (IS_QLA28XX(ha)) { in qla2x00_request_firmware()
7340 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { in qla2x00_request_firmware()
7365 struct qla_hw_data *ha = vha->hw; in qla_pci_error_cleanup() local
7366 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla_pci_error_cleanup()
7373 ha->chip_reset++; in qla_pci_error_cleanup()
7375 ha->base_qpair->chip_reset = ha->chip_reset; in qla_pci_error_cleanup()
7376 for (i = 0; i < ha->max_qpairs; i++) { in qla_pci_error_cleanup()
7377 if (ha->queue_pair_map[i]) in qla_pci_error_cleanup()
7378 ha->queue_pair_map[i]->chip_reset = in qla_pci_error_cleanup()
7379 ha->base_qpair->chip_reset; in qla_pci_error_cleanup()
7383 if (atomic_read(&ha->num_pend_mbx_stage3)) { in qla_pci_error_cleanup()
7384 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); in qla_pci_error_cleanup()
7385 complete(&ha->mbx_intr_comp); in qla_pci_error_cleanup()
7390 while (atomic_read(&ha->num_pend_mbx_stage3) || in qla_pci_error_cleanup()
7391 atomic_read(&ha->num_pend_mbx_stage2) || in qla_pci_error_cleanup()
7392 atomic_read(&ha->num_pend_mbx_stage1)) { in qla_pci_error_cleanup()
7399 ha->flags.purge_mbox = 0; in qla_pci_error_cleanup()
7401 mutex_lock(&ha->mq_lock); in qla_pci_error_cleanup()
7404 mutex_unlock(&ha->mq_lock); in qla_pci_error_cleanup()
7408 spin_lock_irqsave(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7409 list_for_each_entry(vp, &ha->vp_list, list) { in qla_pci_error_cleanup()
7411 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7413 spin_lock_irqsave(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7416 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7422 spin_lock_irqsave(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7423 list_for_each_entry(vp, &ha->vp_list, list) { in qla_pci_error_cleanup()
7425 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7428 spin_lock_irqsave(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7431 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla_pci_error_cleanup()
7439 struct qla_hw_data *ha = vha->hw; in qla2xxx_pci_error_detected() local
7452 ha->flags.eeh_busy = 0; in qla2xxx_pci_error_detected()
7459 ha->flags.eeh_busy = 1; in qla2xxx_pci_error_detected()
7463 ha->flags.pci_channel_io_perm_failure = 1; in qla2xxx_pci_error_detected()
7481 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_mmio_enabled() local
7482 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2xxx_pci_mmio_enabled()
7483 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in qla2xxx_pci_mmio_enabled()
7485 if (IS_QLA82XX(ha)) in qla2xxx_pci_mmio_enabled()
7488 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
7489 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ in qla2xxx_pci_mmio_enabled()
7493 } else if (IS_QLA23XX(ha)) { in qla2xxx_pci_mmio_enabled()
7497 } else if (IS_FWI2_CAPABLE(ha)) { in qla2xxx_pci_mmio_enabled()
7502 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
7519 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_slot_reset() local
7539 if (ha->mem_only) in qla2xxx_pci_slot_reset()
7551 if (ha->isp_ops->pci_config(base_vha)) in qla2xxx_pci_slot_reset()
7554 mutex_lock(&ha->mq_lock); in qla2xxx_pci_slot_reset()
7557 mutex_unlock(&ha->mq_lock); in qla2xxx_pci_slot_reset()
7561 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) in qla2xxx_pci_slot_reset()
7577 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_resume() local
7583 ha->flags.eeh_busy = 0; in qla2xxx_pci_resume()
7596 struct qla_hw_data *ha = base_vha->hw; in qla_pci_reset_prepare() local
7608 ha->flags.eeh_busy = 1; in qla_pci_reset_prepare()
7609 mutex_lock(&ha->mq_lock); in qla_pci_reset_prepare()
7612 mutex_unlock(&ha->mq_lock); in qla_pci_reset_prepare()
7623 struct qla_hw_data *ha = base_vha->hw; in qla_pci_reset_done() local
7632 ha->flags.eeh_busy = 0; in qla_pci_reset_done()
7633 mutex_lock(&ha->mq_lock); in qla_pci_reset_done()
7636 mutex_unlock(&ha->mq_lock); in qla_pci_reset_done()
7639 ha->isp_ops->abort_isp(base_vha); in qla_pci_reset_done()