Lines Matching refs:tmplt_hdr

3690 	struct qla82xx_md_template_hdr *tmplt_hdr;  in qla82xx_minidump_process_control()  local
3694 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3753 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3759 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3766 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3773 tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3783 read_value = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3790 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
4121 struct qla82xx_md_template_hdr *tmplt_hdr; in qla82xx_md_collect() local
4126 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4158 no_entry_hdr = tmplt_hdr->num_of_entries; in qla82xx_md_collect()
4163 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level); in qla82xx_md_collect()
4165 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_collect()
4174 tmplt_hdr->driver_capture_mask = ql2xmdcapmask; in qla82xx_md_collect()
4176 tmplt_hdr->driver_info[0] = vha->host_no; in qla82xx_md_collect()
4177 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) | in qla82xx_md_collect()
4187 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) { in qla82xx_md_collect()
4190 tmplt_hdr->entry_type); in qla82xx_md_collect()
4195 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4328 struct qla82xx_md_template_hdr *tmplt_hdr; in qla82xx_md_alloc() local
4330 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4333 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_alloc()
4341 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()