1293 	uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};  in qla82xx_pci_mem_write_2M()  local
1299 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_write_2M()
1301 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_write_2M()
1353 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_write_2M()
1355 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_write_2M()
1357 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);  in qla82xx_pci_mem_write_2M()
1359 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);  in qla82xx_pci_mem_write_2M()
1361 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1364 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1368 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1370 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1373 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_write_2M()
1430 	uint64_t      off8, val, mem_crb, word[2] = {0, 0};  in qla82xx_pci_mem_read_2M()  local
1437 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_read_2M()
1439 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_read_2M()
1455 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_read_2M()
1457 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_read_2M()
1459 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1461 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1464 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_read_2M()
1480 					mem_crb + MIU_TEST_AGT_RDDATA(k));  in qla82xx_pci_mem_read_2M()