Lines Matching refs:ha
360 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_set_crbwindow_2M() argument
364 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
366 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
367 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
372 win_read = rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
373 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
377 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
379 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
383 qla82xx_pci_get_crb_addr_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_get_crb_addr_2M() argument
393 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
406 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
415 static int qla82xx_crb_win_lock(struct qla_hw_data *ha) in qla82xx_crb_win_lock() argument
421 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); in qla82xx_crb_win_lock()
428 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
433 qla82xx_wr_32(struct qla_hw_data *ha, ulong off_in, u32 data) in qla82xx_wr_32() argument
439 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_wr_32()
445 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
447 qla82xx_crb_win_lock(ha); in qla82xx_wr_32()
448 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_wr_32()
454 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_wr_32()
456 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
463 qla82xx_rd_32(struct qla_hw_data *ha, ulong off_in) in qla82xx_rd_32() argument
470 rv = qla82xx_pci_get_crb_addr_2M(ha, off_in, &off); in qla82xx_rd_32()
476 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
478 qla82xx_crb_win_lock(ha); in qla82xx_rd_32()
479 qla82xx_pci_set_crbwindow_2M(ha, off_in, &off); in qla82xx_rd_32()
484 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); in qla82xx_rd_32()
486 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
493 int qla82xx_idc_lock(struct qla_hw_data *ha) in qla82xx_idc_lock() argument
500 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); in qla82xx_idc_lock()
520 void qla82xx_idc_unlock(struct qla_hw_data *ha) in qla82xx_idc_unlock() argument
522 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); in qla82xx_idc_unlock()
530 qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, in qla82xx_pci_mem_bound_check() argument
546 qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) in qla82xx_pci_set_window() argument
550 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
556 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
557 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
558 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
559 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
560 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
577 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
578 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
579 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
580 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
581 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
595 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
596 qla82xx_wr_32(ha, in qla82xx_pci_set_window()
597 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
598 win_read = qla82xx_rd_32(ha, in qla82xx_pci_set_window()
599 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
623 static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, in qla82xx_pci_is_same_window() argument
644 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
650 static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_read_direct() argument
660 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
662 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
668 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_read_direct()
670 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
671 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
679 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
680 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
695 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
714 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
722 qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, in qla82xx_pci_mem_write_direct() argument
732 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
734 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
740 start = qla82xx_pci_set_window(ha, off); in qla82xx_pci_mem_write_direct()
742 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
743 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
751 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
752 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
766 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
785 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
820 qla82xx_rom_lock(struct qla_hw_data *ha) in qla82xx_rom_lock() argument
824 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
828 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); in qla82xx_rom_lock()
832 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock()
835 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
840 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
845 qla82xx_rom_unlock(struct qla_hw_data *ha) in qla82xx_rom_unlock() argument
847 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, 0xffffffff); in qla82xx_rom_unlock()
848 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); in qla82xx_rom_unlock()
852 qla82xx_wait_rom_busy(struct qla_hw_data *ha) in qla82xx_wait_rom_busy() argument
856 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
859 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_busy()
873 qla82xx_wait_rom_done(struct qla_hw_data *ha) in qla82xx_wait_rom_done() argument
877 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
880 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); in qla82xx_wait_rom_done()
894 qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) in qla82xx_md_rw_32() argument
898 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
901 rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
905 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
909 ha->nx_pcibase); in qla82xx_md_rw_32()
915 qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_do_rom_fast_read() argument
918 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1); in qla82xx_do_rom_fast_read()
919 *valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE + in qla82xx_do_rom_fast_read()
926 qla82xx_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) in qla82xx_rom_fast_read() argument
930 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
932 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in qla82xx_rom_fast_read()
938 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_fast_read()
944 ret = qla82xx_do_rom_fast_read(ha, addr, valp); in qla82xx_rom_fast_read()
945 qla82xx_rom_unlock(ha); in qla82xx_rom_fast_read()
950 qla82xx_read_status_reg(struct qla_hw_data *ha, uint32_t *val) in qla82xx_read_status_reg() argument
952 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
954 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); in qla82xx_read_status_reg()
955 qla82xx_wait_rom_busy(ha); in qla82xx_read_status_reg()
956 if (qla82xx_wait_rom_done(ha)) { in qla82xx_read_status_reg()
961 *val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); in qla82xx_read_status_reg()
966 qla82xx_flash_wait_write_finish(struct qla_hw_data *ha) in qla82xx_flash_wait_write_finish() argument
970 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
972 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_wait_write_finish()
974 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_flash_wait_write_finish()
986 qla82xx_flash_set_write_enable(struct qla_hw_data *ha) in qla82xx_flash_set_write_enable() argument
990 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
991 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); in qla82xx_flash_set_write_enable()
992 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); in qla82xx_flash_set_write_enable()
993 qla82xx_wait_rom_busy(ha); in qla82xx_flash_set_write_enable()
994 if (qla82xx_wait_rom_done(ha)) in qla82xx_flash_set_write_enable()
996 if (qla82xx_read_status_reg(ha, &val) != 0) in qla82xx_flash_set_write_enable()
1004 qla82xx_write_status_reg(struct qla_hw_data *ha, uint32_t val) in qla82xx_write_status_reg() argument
1006 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1008 if (qla82xx_flash_set_write_enable(ha)) in qla82xx_write_status_reg()
1010 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, val); in qla82xx_write_status_reg()
1011 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0x1); in qla82xx_write_status_reg()
1012 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_status_reg()
1017 return qla82xx_flash_wait_write_finish(ha); in qla82xx_write_status_reg()
1021 qla82xx_write_disable_flash(struct qla_hw_data *ha) in qla82xx_write_disable_flash() argument
1023 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1025 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WRDI); in qla82xx_write_disable_flash()
1026 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_disable_flash()
1035 ql82xx_rom_lock_d(struct qla_hw_data *ha) in ql82xx_rom_lock_d() argument
1039 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1041 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { in ql82xx_rom_lock_d()
1047 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in ql82xx_rom_lock_d()
1056 qla82xx_write_flash_dword(struct qla_hw_data *ha, uint32_t flashaddr, in qla82xx_write_flash_dword() argument
1060 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1062 ret = ql82xx_rom_lock_d(ha); in qla82xx_write_flash_dword()
1069 ret = qla82xx_flash_set_write_enable(ha); in qla82xx_write_flash_dword()
1073 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, data); in qla82xx_write_flash_dword()
1074 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, flashaddr); in qla82xx_write_flash_dword()
1075 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_write_flash_dword()
1076 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); in qla82xx_write_flash_dword()
1077 qla82xx_wait_rom_busy(ha); in qla82xx_write_flash_dword()
1078 if (qla82xx_wait_rom_done(ha)) { in qla82xx_write_flash_dword()
1085 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_write_flash_dword()
1088 qla82xx_rom_unlock(ha); in qla82xx_write_flash_dword()
1103 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom() local
1111 qla82xx_rom_lock(ha); in qla82xx_pinit_from_rom()
1114 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); in qla82xx_pinit_from_rom()
1115 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); in qla82xx_pinit_from_rom()
1116 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); in qla82xx_pinit_from_rom()
1117 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); in qla82xx_pinit_from_rom()
1118 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); in qla82xx_pinit_from_rom()
1119 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); in qla82xx_pinit_from_rom()
1122 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); in qla82xx_pinit_from_rom()
1124 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); in qla82xx_pinit_from_rom()
1126 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); in qla82xx_pinit_from_rom()
1128 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); in qla82xx_pinit_from_rom()
1130 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); in qla82xx_pinit_from_rom()
1132 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); in qla82xx_pinit_from_rom()
1135 val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); in qla82xx_pinit_from_rom()
1136 qla82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); in qla82xx_pinit_from_rom()
1139 qla82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); in qla82xx_pinit_from_rom()
1142 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); in qla82xx_pinit_from_rom()
1143 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); in qla82xx_pinit_from_rom()
1144 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); in qla82xx_pinit_from_rom()
1145 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); in qla82xx_pinit_from_rom()
1146 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); in qla82xx_pinit_from_rom()
1147 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); in qla82xx_pinit_from_rom()
1150 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); in qla82xx_pinit_from_rom()
1151 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); in qla82xx_pinit_from_rom()
1152 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); in qla82xx_pinit_from_rom()
1153 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); in qla82xx_pinit_from_rom()
1154 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); in qla82xx_pinit_from_rom()
1160 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); in qla82xx_pinit_from_rom()
1162 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); in qla82xx_pinit_from_rom()
1163 qla82xx_rom_unlock(ha); in qla82xx_pinit_from_rom()
1171 if (qla82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || in qla82xx_pinit_from_rom()
1172 qla82xx_rom_fast_read(ha, 4, &n) != 0) { in qla82xx_pinit_from_rom()
1202 if (qla82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || in qla82xx_pinit_from_rom()
1203 qla82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != 0) { in qla82xx_pinit_from_rom()
1253 qla82xx_wr_32(ha, off, buf[i].data); in qla82xx_pinit_from_rom()
1270 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); in qla82xx_pinit_from_rom()
1271 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); in qla82xx_pinit_from_rom()
1272 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); in qla82xx_pinit_from_rom()
1275 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); in qla82xx_pinit_from_rom()
1276 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); in qla82xx_pinit_from_rom()
1277 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); in qla82xx_pinit_from_rom()
1278 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); in qla82xx_pinit_from_rom()
1279 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); in qla82xx_pinit_from_rom()
1280 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); in qla82xx_pinit_from_rom()
1281 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); in qla82xx_pinit_from_rom()
1282 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); in qla82xx_pinit_from_rom()
1287 qla82xx_pci_mem_write_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_write_2M() argument
1302 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_write_2M()
1303 return qla82xx_pci_mem_write_direct(ha, in qla82xx_pci_mem_write_2M()
1318 if (qla82xx_pci_mem_read_2M(ha, off8 + in qla82xx_pci_mem_write_2M()
1353 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_write_2M()
1355 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_write_2M()
1357 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); in qla82xx_pci_mem_write_2M()
1359 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); in qla82xx_pci_mem_write_2M()
1361 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1364 qla82xx_wr_32(ha, mem_crb + in qla82xx_pci_mem_write_2M()
1368 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1370 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_write_2M()
1373 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_write_2M()
1380 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1391 qla82xx_fw_load_from_flash(struct qla_hw_data *ha) in qla82xx_fw_load_from_flash() argument
1395 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1403 if ((qla82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || in qla82xx_fw_load_from_flash()
1404 (qla82xx_rom_fast_read(ha, flashaddr + 4, (int *)&high))) { in qla82xx_fw_load_from_flash()
1408 qla82xx_pci_mem_write_2M(ha, memaddr, &data, 8); in qla82xx_fw_load_from_flash()
1416 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1417 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_flash()
1418 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_flash()
1419 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1424 qla82xx_pci_mem_read_2M(struct qla_hw_data *ha, in qla82xx_pci_mem_read_2M() argument
1440 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) in qla82xx_pci_mem_read_2M()
1441 return qla82xx_pci_mem_read_direct(ha, in qla82xx_pci_mem_read_2M()
1455 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); in qla82xx_pci_mem_read_2M()
1457 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); in qla82xx_pci_mem_read_2M()
1459 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1461 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); in qla82xx_pci_mem_read_2M()
1464 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); in qla82xx_pci_mem_read_2M()
1471 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1479 temp = qla82xx_rd_32(ha, in qla82xx_pci_mem_read_2M()
1536 qla82xx_get_data_desc(struct qla_hw_data *ha, in qla82xx_get_data_desc() argument
1539 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1540 int idx = get_unaligned_le32((u32 *)&unirom[ha->file_prd_off] + in qla82xx_get_data_desc()
1556 qla82xx_get_bootld_offset(struct qla_hw_data *ha) in qla82xx_get_bootld_offset() argument
1561 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1562 uri_desc = qla82xx_get_data_desc(ha, in qla82xx_get_bootld_offset()
1568 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1571 static u32 qla82xx_get_fw_size(struct qla_hw_data *ha) in qla82xx_get_fw_size() argument
1575 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1576 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_size()
1582 return get_unaligned_le32(&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1586 qla82xx_get_fw_offs(struct qla_hw_data *ha) in qla82xx_get_fw_offs() argument
1591 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1592 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, in qla82xx_get_fw_offs()
1598 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1621 qla82xx_iospace_config(struct qla_hw_data *ha) in qla82xx_iospace_config() argument
1625 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1626 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1632 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1633 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1638 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1639 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1640 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1641 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1647 if (IS_QLA8044(ha)) { in qla82xx_iospace_config()
1648 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1649 } else if (IS_QLA82XX(ha)) { in qla82xx_iospace_config()
1650 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1654 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1655 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1656 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1657 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1665 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1666 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1668 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1673 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1674 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1675 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1678 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1679 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1680 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1683 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1684 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1704 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config() local
1707 pci_set_master(ha->pdev); in qla82xx_pci_config()
1708 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1709 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1712 ha->chip_revision, ret); in qla82xx_pci_config()
1725 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip() local
1727 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1734 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings() local
1735 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1737 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1738 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1741 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1755 qla82xx_fw_load_from_blob(struct qla_hw_data *ha) in qla82xx_fw_load_from_blob() argument
1763 ptr64 = (u64 *)qla82xx_get_bootld_offset(ha); in qla82xx_fw_load_from_blob()
1768 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1774 size = qla82xx_get_fw_size(ha) / 8; in qla82xx_fw_load_from_blob()
1775 ptr64 = (u64 *)qla82xx_get_fw_offs(ha); in qla82xx_fw_load_from_blob()
1780 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) in qla82xx_fw_load_from_blob()
1791 qla82xx_wr_32(ha, QLA82XX_CAM_RAM(0x1fc), QLA82XX_BDINFO_MAGIC); in qla82xx_fw_load_from_blob()
1793 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1794 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); in qla82xx_fw_load_from_blob()
1795 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); in qla82xx_fw_load_from_blob()
1796 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1801 qla82xx_set_product_offset(struct qla_hw_data *ha) in qla82xx_set_product_offset() argument
1804 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1808 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1831 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1843 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob() local
1844 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1846 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1849 if (qla82xx_set_product_offset(ha)) in qla82xx_validate_firmware_blob()
1867 qla82xx_check_cmdpeg_state(struct qla_hw_data *ha) in qla82xx_check_cmdpeg_state() argument
1871 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1874 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1875 val = qla82xx_rd_32(ha, CRB_CMDPEG_STATE); in qla82xx_check_cmdpeg_state()
1876 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1898 val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE); in qla82xx_check_cmdpeg_state()
1899 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1900 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_cmdpeg_state()
1901 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1906 qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) in qla82xx_check_rcvpeg_state() argument
1910 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1913 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1914 val = qla82xx_rd_32(ha, CRB_RCVPEG_STATE); in qla82xx_check_rcvpeg_state()
1915 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1936 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1937 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); in qla82xx_check_rcvpeg_state()
1938 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1956 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion() local
1957 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1962 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1963 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1965 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1966 ha->mailbox_out[cnt] = rd_reg_word(wptr); in qla82xx_mbx_completion()
1970 if (!ha->mcp) in qla82xx_mbx_completion()
1988 struct qla_hw_data *ha; in qla82xx_intr_handler() local
2003 ha = rsp->hw; in qla82xx_intr_handler()
2005 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2006 status = qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2007 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2010 status1 = qla82xx_rd_32(ha, ISR_INT_STATE_REG); in qla82xx_intr_handler()
2016 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2019 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2020 qla82xx_rd_32(ha, ISR_INT_VECTOR); in qla82xx_intr_handler()
2022 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2024 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2025 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2059 qla2x00_handle_mbx_completion(ha, status); in qla82xx_intr_handler()
2060 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2062 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2063 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2072 struct qla_hw_data *ha; in qla82xx_msix_default() local
2087 ha = rsp->hw; in qla82xx_msix_default()
2089 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2091 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2092 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2128 qla2x00_handle_mbx_completion(ha, status); in qla82xx_msix_default()
2129 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2138 struct qla_hw_data *ha; in qla82xx_msix_rsp_q() local
2151 ha = rsp->hw; in qla82xx_msix_rsp_q()
2152 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2153 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2154 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2161 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2169 struct qla_hw_data *ha; in qla82xx_poll() local
2184 ha = rsp->hw; in qla82xx_poll()
2186 reg = &ha->iobase->isp82; in qla82xx_poll()
2187 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2188 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2222 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2226 qla82xx_enable_intrs(struct qla_hw_data *ha) in qla82xx_enable_intrs() argument
2228 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2231 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2232 if (IS_QLA8044(ha)) in qla82xx_enable_intrs()
2233 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); in qla82xx_enable_intrs()
2235 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2236 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2237 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2241 qla82xx_disable_intrs(struct qla_hw_data *ha) in qla82xx_disable_intrs() argument
2243 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2245 if (ha->interrupts_on) in qla82xx_disable_intrs()
2248 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2249 if (IS_QLA8044(ha)) in qla82xx_disable_intrs()
2250 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); in qla82xx_disable_intrs()
2252 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2253 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2254 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2257 void qla82xx_init_flags(struct qla_hw_data *ha) in qla82xx_init_flags() argument
2262 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2263 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2264 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2265 ha->curr_window = 255; in qla82xx_init_flags()
2266 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2267 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2268 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2269 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2270 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2271 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2279 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version() local
2281 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_idc_version()
2282 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2283 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_set_idc_version()
2288 idc_ver = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_IDC_VERSION); in qla82xx_set_idc_version()
2301 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active() local
2303 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2307 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, in qla82xx_set_drv_active()
2309 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_set_drv_active()
2311 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2312 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_set_drv_active()
2316 qla82xx_clear_drv_active(struct qla_hw_data *ha) in qla82xx_clear_drv_active() argument
2320 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_clear_drv_active()
2321 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2322 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); in qla82xx_clear_drv_active()
2326 qla82xx_need_reset(struct qla_hw_data *ha) in qla82xx_need_reset() argument
2331 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2334 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset()
2335 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2341 qla82xx_set_rst_ready(struct qla_hw_data *ha) in qla82xx_set_rst_ready() argument
2344 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2346 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2350 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, QLA82XX_DRVST_NOT_RDY); in qla82xx_set_rst_ready()
2351 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_rst_ready()
2353 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2356 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_set_rst_ready()
2360 qla82xx_clear_rst_ready(struct qla_hw_data *ha) in qla82xx_clear_rst_ready() argument
2364 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_rst_ready()
2365 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2366 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); in qla82xx_clear_rst_ready()
2370 qla82xx_set_qsnt_ready(struct qla_hw_data *ha) in qla82xx_set_qsnt_ready() argument
2374 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_set_qsnt_ready()
2375 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2376 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_set_qsnt_ready()
2382 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready() local
2385 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_clear_qsnt_ready()
2386 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2387 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); in qla82xx_clear_qsnt_ready()
2395 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw() local
2405 rst = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); in qla82xx_load_fw()
2407 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); in qla82xx_load_fw()
2420 if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2434 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2453 if (qla82xx_fw_load_from_blob(ha) == QLA_SUCCESS) { in qla82xx_load_fw()
2472 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware() local
2475 qla82xx_wr_32(ha, CRB_DMA_SHIFT, QLA82XX_DMA_SHIFT_VALUE); in qla82xx_start_firmware()
2480 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); in qla82xx_start_firmware()
2481 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); in qla82xx_start_firmware()
2484 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); in qla82xx_start_firmware()
2485 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); in qla82xx_start_firmware()
2494 if (qla82xx_check_cmdpeg_state(ha) != QLA_SUCCESS) { in qla82xx_start_firmware()
2501 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2502 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2505 return qla82xx_check_rcvpeg_state(ha); in qla82xx_start_firmware()
2514 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data() local
2518 if (qla82xx_rom_fast_read(ha, faddr, &val)) { in qla82xx_read_flash_data()
2530 qla82xx_unprotect_flash(struct qla_hw_data *ha) in qla82xx_unprotect_flash() argument
2534 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2536 ret = ql82xx_rom_lock_d(ha); in qla82xx_unprotect_flash()
2543 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_unprotect_flash()
2548 ret = qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2551 qla82xx_write_status_reg(ha, val); in qla82xx_unprotect_flash()
2554 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_unprotect_flash()
2559 qla82xx_rom_unlock(ha); in qla82xx_unprotect_flash()
2564 qla82xx_protect_flash(struct qla_hw_data *ha) in qla82xx_protect_flash() argument
2568 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2570 ret = ql82xx_rom_lock_d(ha); in qla82xx_protect_flash()
2577 ret = qla82xx_read_status_reg(ha, &val); in qla82xx_protect_flash()
2583 ret = qla82xx_write_status_reg(ha, val); in qla82xx_protect_flash()
2588 if (qla82xx_write_disable_flash(ha) != 0) in qla82xx_protect_flash()
2592 qla82xx_rom_unlock(ha); in qla82xx_protect_flash()
2597 qla82xx_erase_sector(struct qla_hw_data *ha, int addr) in qla82xx_erase_sector() argument
2600 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2602 ret = ql82xx_rom_lock_d(ha); in qla82xx_erase_sector()
2609 qla82xx_flash_set_write_enable(ha); in qla82xx_erase_sector()
2610 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); in qla82xx_erase_sector()
2611 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla82xx_erase_sector()
2612 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_SE); in qla82xx_erase_sector()
2614 if (qla82xx_wait_rom_done(ha)) { in qla82xx_erase_sector()
2620 ret = qla82xx_flash_wait_write_finish(ha); in qla82xx_erase_sector()
2622 qla82xx_rom_unlock(ha); in qla82xx_erase_sector()
2649 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data() local
2656 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2666 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2668 ret = qla82xx_unprotect_flash(ha); in qla82xx_write_flash_data()
2679 ret = qla82xx_erase_sector(ha, faddr); in qla82xx_write_flash_data()
2694 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2700 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2705 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2716 ret = qla82xx_write_flash_dword(ha, faddr, in qla82xx_write_flash_data()
2726 ret = qla82xx_protect_flash(ha); in qla82xx_write_flash_data()
2732 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2759 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs() local
2760 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2771 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2775 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2777 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2779 while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2780 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2787 qla82xx_rom_lock_recovery(struct qla_hw_data *ha) in qla82xx_rom_lock_recovery() argument
2789 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2792 if (qla82xx_rom_lock(ha)) { in qla82xx_rom_lock_recovery()
2793 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); in qla82xx_rom_lock_recovery()
2803 qla82xx_rom_unlock(ha); in qla82xx_rom_lock_recovery()
2823 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap() local
2826 need_reset = qla82xx_need_reset(ha); in qla82xx_device_bootstrap()
2830 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2831 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2833 old_count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2836 count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); in qla82xx_device_bootstrap()
2842 qla82xx_rom_lock_recovery(ha); in qla82xx_device_bootstrap()
2848 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_INITIALIZING); in qla82xx_device_bootstrap()
2850 qla82xx_idc_unlock(ha); in qla82xx_device_bootstrap()
2852 qla82xx_idc_lock(ha); in qla82xx_device_bootstrap()
2857 qla82xx_clear_drv_active(ha); in qla82xx_device_bootstrap()
2858 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_FAILED); in qla82xx_device_bootstrap()
2865 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_READY); in qla82xx_device_bootstrap()
2883 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler() local
2893 qla82xx_set_qsnt_ready(ha); in qla82xx_need_qsnt_handler()
2898 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2899 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2913 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_need_qsnt_handler()
2917 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2919 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2925 qla82xx_idc_unlock(ha); in qla82xx_need_qsnt_handler()
2927 qla82xx_idc_lock(ha); in qla82xx_need_qsnt_handler()
2929 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_qsnt_handler()
2930 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_qsnt_handler()
2933 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_qsnt_handler()
2938 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_QUIESCENT); in qla82xx_need_qsnt_handler()
2955 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change() local
2960 qla82xx_idc_lock(ha); in qla82xx_wait_for_state_change()
2961 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_wait_for_state_change()
2962 qla82xx_idc_unlock(ha); in qla82xx_wait_for_state_change()
2971 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler() local
2977 if (IS_QLA82XX(ha)) { in qla8xxx_dev_failed_handler()
2978 qla82xx_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2979 qla82xx_idc_unlock(ha); in qla8xxx_dev_failed_handler()
2980 } else if (IS_QLA8044(ha)) { in qla8xxx_dev_failed_handler()
2981 qla8044_clear_drv_active(ha); in qla8xxx_dev_failed_handler()
2982 qla8044_idc_unlock(ha); in qla8xxx_dev_failed_handler()
3010 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler() local
3011 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3014 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3016 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3017 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3018 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3021 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3022 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3024 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3025 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3027 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3034 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3036 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3037 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3038 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3052 qla82xx_idc_unlock(ha); in qla82xx_need_reset_handler()
3054 qla82xx_idc_lock(ha); in qla82xx_need_reset_handler()
3055 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); in qla82xx_need_reset_handler()
3056 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_need_reset_handler()
3057 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3059 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_need_reset_handler()
3077 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); in qla82xx_need_reset_handler()
3078 qla82xx_set_rst_ready(ha); in qla82xx_need_reset_handler()
3092 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed() local
3096 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3097 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3098 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3105 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3106 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3107 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3108 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3109 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3114 ha->fw_major_version, in qla82xx_check_md_needed()
3115 ha->fw_minor_version, in qla82xx_check_md_needed()
3116 ha->fw_subminor_version, in qla82xx_check_md_needed()
3117 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3180 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler() local
3183 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3189 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3197 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3207 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_device_state_handler()
3222 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3228 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3230 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3236 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3238 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3241 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3246 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3253 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3256 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3258 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3261 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3269 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3271 qla82xx_idc_lock(ha); in qla82xx_device_state_handler()
3276 qla82xx_idc_unlock(ha); in qla82xx_device_state_handler()
3284 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp() local
3286 temp = qla82xx_rd_32(ha, CRB_TEMP_STATE); in qla82xx_check_temp()
3315 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx() local
3317 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3318 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3319 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3322 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3323 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3330 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog() local
3333 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3334 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_watchdog()
3337 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3355 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3361 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, in qla82xx_watchdog()
3363 halt_status = qla82xx_rd_32(ha, in qla82xx_watchdog()
3371 qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2), in qla82xx_watchdog()
3372 qla82xx_rd_32(ha, in qla82xx_watchdog()
3374 qla82xx_rd_32(ha, in qla82xx_watchdog()
3376 qla82xx_rd_32(ha, in qla82xx_watchdog()
3378 qla82xx_rd_32(ha, in qla82xx_watchdog()
3380 qla82xx_rd_32(ha, in qla82xx_watchdog()
3396 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3407 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc() local
3409 if (IS_QLA82XX(ha)) in qla82xx_load_risc()
3411 else if (IS_QLA8044(ha)) { in qla82xx_load_risc()
3412 qla8044_idc_lock(ha); in qla82xx_load_risc()
3415 qla8044_idc_unlock(ha); in qla82xx_load_risc()
3424 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner() local
3427 if (IS_QLA82XX(ha)) in qla82xx_set_reset_owner()
3428 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); in qla82xx_set_reset_owner()
3429 else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3435 if (IS_QLA82XX(ha)) { in qla82xx_set_reset_owner()
3436 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_set_reset_owner()
3438 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3440 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3441 } else if (IS_QLA8044(ha)) in qla82xx_set_reset_owner()
3465 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp() local
3472 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3474 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3476 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3478 if (IS_QLA82XX(ha)) in qla82xx_abort_isp()
3480 else if (IS_QLA8044(ha)) { in qla82xx_abort_isp()
3481 qla8044_idc_lock(ha); in qla82xx_abort_isp()
3484 qla8044_idc_unlock(ha); in qla82xx_abort_isp()
3488 qla82xx_idc_lock(ha); in qla82xx_abort_isp()
3489 qla82xx_clear_rst_ready(ha); in qla82xx_abort_isp()
3490 qla82xx_idc_unlock(ha); in qla82xx_abort_isp()
3493 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3494 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3501 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3509 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3515 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3518 ha->isp_abort_cnt); in qla82xx_abort_isp()
3522 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3525 ha->isp_abort_cnt); in qla82xx_abort_isp()
3608 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup() local
3614 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3617 if (IS_QLA82XX(ha)) in qla82xx_chip_reset_cleanup()
3619 else if (IS_QLA8044(ha)) in qla82xx_chip_reset_cleanup()
3622 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3630 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3633 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3638 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3639 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3640 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3649 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3651 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3652 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3661 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3666 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3685 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control() local
3694 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3701 qla82xx_md_rw_32(ha, crb_addr, in qla82xx_minidump_process_control()
3707 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3708 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3713 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3720 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3724 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3726 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); in qla82xx_minidump_process_control()
3733 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); in qla82xx_minidump_process_control()
3744 read_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_control()
3757 read_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_control()
3777 qla82xx_md_rw_32(ha, addr, read_value, 1); in qla82xx_minidump_process_control()
3802 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm() local
3813 r_value = rd_reg_dword(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3824 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux() local
3837 qla82xx_md_rw_32(ha, s_addr, s_value, 1); in qla82xx_minidump_process_rdmux()
3838 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdmux()
3850 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb() local
3861 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_rdcrb()
3873 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag() local
3895 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l2tag()
3897 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l2tag()
3902 c_value_r = qla82xx_md_rw_32(ha, c_addr, 0, 0); in qla82xx_minidump_process_l2tag()
3918 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l2tag()
3932 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache() local
3950 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); in qla82xx_minidump_process_l1cache()
3951 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); in qla82xx_minidump_process_l1cache()
3954 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); in qla82xx_minidump_process_l1cache()
3967 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue() local
3981 qla82xx_md_rw_32(ha, s_addr, qid, 1); in qla82xx_minidump_process_queue()
3984 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); in qla82xx_minidump_process_queue()
3997 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom() local
4008 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, in qla82xx_minidump_process_rdrom()
4010 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdrom()
4023 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem() local
4052 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4054 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1); in qla82xx_minidump_process_rdmem()
4056 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1); in qla82xx_minidump_process_rdmem()
4058 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4060 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); in qla82xx_minidump_process_rdmem()
4063 r_value = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4072 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4077 r_data = qla82xx_md_rw_32(ha, in qla82xx_minidump_process_rdmem()
4083 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4091 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum() local
4093 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4094 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4118 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect() local
4126 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4127 data_ptr = ha->md_dump; in qla82xx_md_collect()
4129 if (ha->fw_dumped) { in qla82xx_md_collect()
4132 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4136 ha->fw_dumped = false; in qla82xx_md_collect()
4138 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4144 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4148 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4181 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4195 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4228 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4299 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4315 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4316 ha->fw_dumped = true; in qla82xx_md_collect()
4326 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc() local
4330 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4341 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4344 if (ha->md_dump) { in qla82xx_md_alloc()
4350 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4351 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4354 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4363 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free() local
4366 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4369 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4370 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4371 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4372 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4376 if (ha->md_dump) { in qla82xx_md_free()
4379 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4380 vfree(ha->md_dump); in qla82xx_md_free()
4381 ha->md_dump_size = 0; in qla82xx_md_free()
4382 ha->md_dump = NULL; in qla82xx_md_free()
4389 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep() local
4397 ha->md_template_size / 1024); in qla82xx_md_prep()
4400 if (IS_QLA8044(ha)) in qla82xx_md_prep()
4414 ha->md_dump_size / 1024); in qla82xx_md_prep()
4418 ha->md_tmplt_hdr, in qla82xx_md_prep()
4419 ha->md_template_size / 1024); in qla82xx_md_prep()
4420 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4421 ha->md_template_size, in qla82xx_md_prep()
4422 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4423 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4435 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on() local
4437 qla82xx_idc_lock(ha); in qla82xx_beacon_on()
4445 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4447 qla82xx_idc_unlock(ha); in qla82xx_beacon_on()
4456 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off() local
4458 qla82xx_idc_lock(ha); in qla82xx_beacon_off()
4466 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4468 qla82xx_idc_unlock(ha); in qla82xx_beacon_off()
4475 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump() local
4477 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4481 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4482 qla82xx_idc_lock(ha); in qla82xx_fw_dump()
4484 qla82xx_idc_unlock(ha); in qla82xx_fw_dump()