2468 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2100_pci_config()
2519 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2300_pci_config()
2520 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2529 		wrt_reg_word(&reg->ctrl_status, 0x0);  in qla2300_pci_config()
2530 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2550 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2594 	ha->pci_attr = rd_reg_dword(&reg->ctrl_status);  in qla24xx_pci_config()
2712 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2x00_reset_chip()
2713 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2726 		wrt_reg_word(&reg->ctrl_status, 0x10);  in qla2x00_reset_chip()
2727 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2745 		wrt_reg_word(&reg->ctrl_status, 0);  in qla2x00_reset_chip()
2746 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2761 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_reset_chip()
2772 			if ((rd_reg_word(&reg->ctrl_status) &  in qla2x00_reset_chip()
2851 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
2853 		if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)  in qla24xx_reset_risc()
2859 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))  in qla24xx_reset_risc()
2865 	    rd_reg_dword(&reg->ctrl_status),  in qla24xx_reset_risc()
2866 	    (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));  in qla24xx_reset_risc()
2868 	wrt_reg_dword(&reg->ctrl_status,  in qla24xx_reset_risc()
2894 	rd_reg_dword(&reg->ctrl_status);  in qla24xx_reset_risc()
2897 		if ((rd_reg_dword(&reg->ctrl_status) &  in qla24xx_reset_risc()
2903 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))  in qla24xx_reset_risc()
2909 	    rd_reg_dword(&reg->ctrl_status));  in qla24xx_reset_risc()
3099 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_chip_diag()
3106 	data = qla2x00_debounce_register(&reg->ctrl_status);  in qla2x00_chip_diag()
3109 		data = rd_reg_word(&reg->ctrl_status);  in qla2x00_chip_diag()
4713 		if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()