scsi/pm8001/pm80xx_hwi.h

2  * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver
4  * Copyright (c) 2008-2009 USI Co., Ltd.
18  * 3. Neither the names of the above-listed copyright holders nor the names
115 /* 0x11 - SMP_RECEIVED Notification removed in SPCv*/
273 	/* Byte 4 - 11 */
276 	/* Byte 12 - 19 */
320 	/* Byte 4 - 11 */
323 	/* Byte 12 - 19 */
336 	__le32	header;	/* Bits [11:0] - Message operation code */
337 	/* Bits [15:12] - Message Category */
338 	/* Bits [21:16] - Outboundqueue ID for the
340 	/* Bits [23:22] - Reserved */
341 	/* Bits [28:24] - Buffer Count, indicates how
343 	/* Bits [30:29] - Reserved */
344 	/* Bits [31] - Message Valid bit */
369 /* set device bits fis - device to host */
375 	/* b5-b4: reserved2 */
376 	/* b3-b0: PM Port */
381 /* PIO setup FIS - device to host */
390 	/* b3-b0: PM Port */
626  * brief the data structure of SMP Request Command
627  * use to describe MPI SMP REQUEST Command (64 bytes)
633 	/* Bits [0] - Indirect response */
634 	/* Bits [1] - Indirect Payload */
635 	/* Bits [15:2] - Reserved */
636 	/* Bits [23:16] - direct payload Len */
637 	/* Bits [31:24] - Reserved */
653  * brief the data structure of SMP Completion Response
654  * use to describe MPI SMP Completion Response (64 bytes)
664  *brief the data structure of SSP SMP SATA Abort Command
665  * use to describe MPI SSP SMP & SATA Abort Command (64 bytes)
675 /* These flags used for SSP SMP & SATA Abort */
681  * brief the data structure of SSP SATA SMP Abort Response
682  * use to describe SSP SMP & SATA Abort Response ( 64 bytes)
749 	__le32	atapi_scsi_cdb[4];	/* dword 16-19. rsvd for enc I/O */
784 	/* B6-3 : taskPriority */
785 	/* B2-0 : taskAttribute */
788 	/* B7-2 : additional_cdb_len */
789 	/* B1-0 : reserved */
813 	u8	udt[12];	/* dword 16-18 */
995 	__le32	offset;  member
1064 /* new outbound structure for spcv - begins */
1132 /* new outbound structure for spcv - ends */
1195  * SSP/SMP/SATA IO Completion Status values
1403 #define SCRATCH_PAD1_BOOTSTATE_MASK		0x70	/* Bit 4-6 */
1421  Mask, bit1-0 State */
1428 /* main configuration offset - byte offset */
1440 /* 0x28 - 0x4C - RSVD */
1465 /* Gereral Status Table offset - byte offset */
1471 /* 0x14 - 0x34 - RSVD */
1473 /* 0x3c - 0x40 - RSVD */
1483 /* General Status Table - MPI state */
1526 /* inbound queue configuration offset - byte offset */
1536 /* outbound queue configuration offset - byte offset */
1550 /* PCIE registers - BAR2(0x18), BAR1(win) 0x010000 */
1570 /* SPC Reset register - BAR4(0x20), BAR2(win) (need dynamic mapping) */
1596 /* registers for BAR Shifting - BAR2(0x18), BAR1(win) */
1602 /* Dynamic map through Bar4 - 0x00700000 */
1628 /* RB6 offset */