Lines Matching refs:pm8001_ha
50 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) in pm80xx_bar4_shift() argument
54 pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); in pm80xx_bar4_shift()
58 reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); in pm80xx_bar4_shift()
61 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n", in pm80xx_bar4_shift()
68 static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, in pm80xx_pci_mem_copy() argument
77 value = pm8001_cr32(pm8001_ha, bus_base_number, offset); in pm80xx_pci_mem_copy()
89 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm80xx_get_fatal_dump() local
90 void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; in pm80xx_get_fatal_dump()
99 pm8001_ha->forensic_info.data_buf.direct_data = buf; in pm80xx_get_fatal_dump()
100 if (pm8001_ha->chip_id == chip_8001) { in pm80xx_get_fatal_dump()
101 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
102 sprintf(pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
104 return (char *)pm8001_ha->forensic_info.data_buf.direct_data - in pm80xx_get_fatal_dump()
108 if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { in pm80xx_get_fatal_dump()
109 pm8001_dbg(pm8001_ha, IO, in pm80xx_get_fatal_dump()
112 pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; in pm80xx_get_fatal_dump()
113 pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; in pm80xx_get_fatal_dump()
114 pm8001_ha->forensic_info.data_buf.direct_offset = 0; in pm80xx_get_fatal_dump()
115 pm8001_ha->forensic_info.data_buf.read_len = 0; in pm80xx_get_fatal_dump()
116 pm8001_ha->forensic_preserved_accumulated_transfer = 0; in pm80xx_get_fatal_dump()
122 pm8001_ha->forensic_info.data_buf.direct_data = direct_data; in pm80xx_get_fatal_dump()
123 pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status); in pm80xx_get_fatal_dump()
124 pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n", in pm80xx_get_fatal_dump()
125 pm8001_ha->forensic_info.data_buf.read_len); in pm80xx_get_fatal_dump()
126 pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n", in pm80xx_get_fatal_dump()
127 pm8001_ha->forensic_info.data_buf.direct_len); in pm80xx_get_fatal_dump()
128 pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n", in pm80xx_get_fatal_dump()
129 pm8001_ha->forensic_info.data_buf.direct_offset); in pm80xx_get_fatal_dump()
131 if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { in pm80xx_get_fatal_dump()
134 pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, in pm80xx_get_fatal_dump()
135 pm8001_ha->fatal_forensic_shift_offset); in pm80xx_get_fatal_dump()
136 pm8001_ha->forensic_last_offset = 0; in pm80xx_get_fatal_dump()
137 pm8001_ha->forensic_fatal_step = 0; in pm80xx_get_fatal_dump()
138 pm8001_ha->fatal_bar_loc = 0; in pm80xx_get_fatal_dump()
148 accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; in pm80xx_get_fatal_dump()
149 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n", in pm80xx_get_fatal_dump()
151 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n", in pm80xx_get_fatal_dump()
153 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n", in pm80xx_get_fatal_dump()
154 pm8001_ha->forensic_last_offset); in pm80xx_get_fatal_dump()
155 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n", in pm80xx_get_fatal_dump()
156 pm8001_ha->forensic_info.data_buf.read_len); in pm80xx_get_fatal_dump()
157 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n", in pm80xx_get_fatal_dump()
158 pm8001_ha->forensic_info.data_buf.direct_len); in pm80xx_get_fatal_dump()
159 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n", in pm80xx_get_fatal_dump()
160 pm8001_ha->forensic_info.data_buf.direct_offset); in pm80xx_get_fatal_dump()
164 pm8001_dbg(pm8001_ha, IO, in pm80xx_get_fatal_dump()
171 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
172 sprintf(pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
174 return (char *)pm8001_ha->forensic_info.data_buf.direct_data - in pm80xx_get_fatal_dump()
178 temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; in pm80xx_get_fatal_dump()
179 if (pm8001_ha->forensic_fatal_step == 0) { in pm80xx_get_fatal_dump()
184 if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET in pm80xx_get_fatal_dump()
186 pm8001_ha->forensic_info.data_buf.direct_len = in pm80xx_get_fatal_dump()
188 pm8001_ha->forensic_last_offset; in pm80xx_get_fatal_dump()
190 pm8001_ha->forensic_info.data_buf.direct_len = in pm80xx_get_fatal_dump()
193 if (pm8001_ha->forensic_info.data_buf.direct_data) { in pm80xx_get_fatal_dump()
195 pm80xx_pci_mem_copy(pm8001_ha, in pm80xx_get_fatal_dump()
196 pm8001_ha->fatal_bar_loc, in pm80xx_get_fatal_dump()
197 pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, in pm80xx_get_fatal_dump()
198 pm8001_ha->forensic_info.data_buf.direct_len, 1); in pm80xx_get_fatal_dump()
200 pm8001_ha->fatal_bar_loc += in pm80xx_get_fatal_dump()
201 pm8001_ha->forensic_info.data_buf.direct_len; in pm80xx_get_fatal_dump()
202 pm8001_ha->forensic_info.data_buf.direct_offset += in pm80xx_get_fatal_dump()
203 pm8001_ha->forensic_info.data_buf.direct_len; in pm80xx_get_fatal_dump()
204 pm8001_ha->forensic_last_offset += in pm80xx_get_fatal_dump()
205 pm8001_ha->forensic_info.data_buf.direct_len; in pm80xx_get_fatal_dump()
206 pm8001_ha->forensic_info.data_buf.read_len = in pm80xx_get_fatal_dump()
207 pm8001_ha->forensic_info.data_buf.direct_len; in pm80xx_get_fatal_dump()
209 if (pm8001_ha->forensic_last_offset >= length_to_read) { in pm80xx_get_fatal_dump()
210 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
211 sprintf(pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
214 (pm8001_ha->forensic_info.data_buf.direct_len in pm80xx_get_fatal_dump()
216 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
218 pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
222 pm8001_ha->fatal_bar_loc = 0; in pm80xx_get_fatal_dump()
223 pm8001_ha->forensic_fatal_step = 1; in pm80xx_get_fatal_dump()
224 pm8001_ha->fatal_forensic_shift_offset = 0; in pm80xx_get_fatal_dump()
225 pm8001_ha->forensic_last_offset = 0; in pm80xx_get_fatal_dump()
228 ((char *)pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
230 pm8001_dbg(pm8001_ha, IO, in pm80xx_get_fatal_dump()
232 return (char *)pm8001_ha-> in pm80xx_get_fatal_dump()
236 if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { in pm80xx_get_fatal_dump()
237 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
238 sprintf(pm8001_ha-> in pm80xx_get_fatal_dump()
242 (pm8001_ha->forensic_info.data_buf.direct_len in pm80xx_get_fatal_dump()
244 pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
245 += sprintf(pm8001_ha-> in pm80xx_get_fatal_dump()
251 ((char *)pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
253 pm8001_dbg(pm8001_ha, IO, in pm80xx_get_fatal_dump()
255 return (char *)pm8001_ha-> in pm80xx_get_fatal_dump()
261 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
262 sprintf(pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
265 (pm8001_ha->forensic_info.data_buf.direct_len in pm80xx_get_fatal_dump()
267 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
268 sprintf(pm8001_ha-> in pm80xx_get_fatal_dump()
272 pm8001_ha->fatal_forensic_shift_offset += 0x100; in pm80xx_get_fatal_dump()
273 pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, in pm80xx_get_fatal_dump()
274 pm8001_ha->fatal_forensic_shift_offset); in pm80xx_get_fatal_dump()
275 pm8001_ha->fatal_bar_loc = 0; in pm80xx_get_fatal_dump()
278 ((char *)pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
280 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n", in pm80xx_get_fatal_dump()
282 return (char *)pm8001_ha->forensic_info.data_buf.direct_data - in pm80xx_get_fatal_dump()
285 if (pm8001_ha->forensic_fatal_step == 1) { in pm80xx_get_fatal_dump()
289 pm8001_ha->forensic_preserved_accumulated_transfer = in pm80xx_get_fatal_dump()
318 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_get_fatal_dump()
322 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
324 pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
327 pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
342 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_get_fatal_dump()
346 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
348 pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
350 pm8001_cw32(pm8001_ha, 0, in pm80xx_get_fatal_dump()
352 pm8001_ha->fatal_forensic_shift_offset); in pm80xx_get_fatal_dump()
357 pm8001_ha->forensic_preserved_accumulated_transfer; in pm80xx_get_fatal_dump()
359 pm8001_ha->forensic_fatal_step = 0; in pm80xx_get_fatal_dump()
362 pm8001_ha->forensic_info.data_buf.direct_data += in pm80xx_get_fatal_dump()
364 pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_fatal_dump()
366 pm8001_ha->forensic_info.data_buf.read_len in pm80xx_get_fatal_dump()
368 pm8001_ha->forensic_info.data_buf.direct_len in pm80xx_get_fatal_dump()
370 pm8001_ha->forensic_info.data_buf.direct_offset in pm80xx_get_fatal_dump()
372 pm8001_ha->forensic_info.data_buf.read_len = 0; in pm80xx_get_fatal_dump()
376 offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data in pm80xx_get_fatal_dump()
378 pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset); in pm80xx_get_fatal_dump()
379 return (char *)pm8001_ha->forensic_info.data_buf.direct_data - in pm80xx_get_fatal_dump()
391 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm80xx_get_non_fatal_dump() local
392 void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr; in pm80xx_get_non_fatal_dump()
402 temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; in pm80xx_get_non_fatal_dump()
403 if (++pm8001_ha->non_fatal_count == 1) { in pm80xx_get_non_fatal_dump()
404 if (pm8001_ha->chip_id == chip_8001) { in pm80xx_get_non_fatal_dump()
405 snprintf(pm8001_ha->forensic_info.data_buf.direct_data, in pm80xx_get_non_fatal_dump()
409 pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n"); in pm80xx_get_non_fatal_dump()
417 pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo); in pm80xx_get_non_fatal_dump()
421 pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi); in pm80xx_get_non_fatal_dump()
442 pm8001_ha->forensic_preserved_accumulated_transfer = 0; in pm80xx_get_non_fatal_dump()
443 pm8001_ha->non_fatal_read_length = 0; in pm80xx_get_non_fatal_dump()
454 pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, in pm80xx_get_non_fatal_dump()
464 reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) & in pm80xx_get_non_fatal_dump()
481 pm8001_ha->non_fatal_read_length = 0; in pm80xx_get_non_fatal_dump()
483 pm8001_ha->non_fatal_count = 0; in pm80xx_get_non_fatal_dump()
489 (pm8001_ha->non_fatal_read_length >= total_len)) { in pm80xx_get_non_fatal_dump()
490 pm8001_ha->non_fatal_read_length = 0; in pm80xx_get_non_fatal_dump()
492 pm8001_ha->non_fatal_count = 0; in pm80xx_get_non_fatal_dump()
497 pm8001_ha->forensic_preserved_accumulated_transfer; in pm80xx_get_non_fatal_dump()
503 pm8001_ha->non_fatal_read_length += output_length; in pm80xx_get_non_fatal_dump()
508 pm8001_ha->forensic_preserved_accumulated_transfer = accum_len; in pm80xx_get_non_fatal_dump()
516 static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) in read_main_config_table() argument
518 void __iomem *address = pm8001_ha->main_cfg_tbl_addr; in read_main_config_table()
520 pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = in read_main_config_table()
522 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = in read_main_config_table()
524 pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = in read_main_config_table()
526 pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = in read_main_config_table()
528 pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = in read_main_config_table()
530 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = in read_main_config_table()
532 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = in read_main_config_table()
534 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = in read_main_config_table()
536 pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = in read_main_config_table()
540 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = in read_main_config_table()
542 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = in read_main_config_table()
544 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = in read_main_config_table()
546 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = in read_main_config_table()
550 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = in read_main_config_table()
554 pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = in read_main_config_table()
557 pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = in read_main_config_table()
559 pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = in read_main_config_table()
562 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = in read_main_config_table()
565 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = in read_main_config_table()
567 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = in read_main_config_table()
570 pm8001_dbg(pm8001_ha, DEV, in read_main_config_table()
572 pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, in read_main_config_table()
573 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, in read_main_config_table()
574 pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev); in read_main_config_table()
576 pm8001_dbg(pm8001_ha, DEV, in read_main_config_table()
578 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, in read_main_config_table()
579 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, in read_main_config_table()
580 pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, in read_main_config_table()
581 pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, in read_main_config_table()
582 pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset); in read_main_config_table()
584 pm8001_dbg(pm8001_ha, DEV, in read_main_config_table()
586 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, in read_main_config_table()
587 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version); in read_main_config_table()
594 static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) in read_general_status_table() argument
596 void __iomem *address = pm8001_ha->general_stat_tbl_addr; in read_general_status_table()
597 pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = in read_general_status_table()
599 pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = in read_general_status_table()
601 pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = in read_general_status_table()
603 pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = in read_general_status_table()
605 pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = in read_general_status_table()
607 pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = in read_general_status_table()
609 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = in read_general_status_table()
611 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = in read_general_status_table()
613 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = in read_general_status_table()
615 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = in read_general_status_table()
617 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = in read_general_status_table()
619 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = in read_general_status_table()
621 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = in read_general_status_table()
623 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = in read_general_status_table()
630 static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) in read_phy_attr_table() argument
632 void __iomem *address = pm8001_ha->pspa_q_tbl_addr; in read_phy_attr_table()
633 pm8001_ha->phy_attr_table.phystart1_16[0] = in read_phy_attr_table()
635 pm8001_ha->phy_attr_table.phystart1_16[1] = in read_phy_attr_table()
637 pm8001_ha->phy_attr_table.phystart1_16[2] = in read_phy_attr_table()
639 pm8001_ha->phy_attr_table.phystart1_16[3] = in read_phy_attr_table()
641 pm8001_ha->phy_attr_table.phystart1_16[4] = in read_phy_attr_table()
643 pm8001_ha->phy_attr_table.phystart1_16[5] = in read_phy_attr_table()
645 pm8001_ha->phy_attr_table.phystart1_16[6] = in read_phy_attr_table()
647 pm8001_ha->phy_attr_table.phystart1_16[7] = in read_phy_attr_table()
649 pm8001_ha->phy_attr_table.phystart1_16[8] = in read_phy_attr_table()
651 pm8001_ha->phy_attr_table.phystart1_16[9] = in read_phy_attr_table()
653 pm8001_ha->phy_attr_table.phystart1_16[10] = in read_phy_attr_table()
655 pm8001_ha->phy_attr_table.phystart1_16[11] = in read_phy_attr_table()
657 pm8001_ha->phy_attr_table.phystart1_16[12] = in read_phy_attr_table()
659 pm8001_ha->phy_attr_table.phystart1_16[13] = in read_phy_attr_table()
661 pm8001_ha->phy_attr_table.phystart1_16[14] = in read_phy_attr_table()
663 pm8001_ha->phy_attr_table.phystart1_16[15] = in read_phy_attr_table()
666 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = in read_phy_attr_table()
668 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = in read_phy_attr_table()
670 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = in read_phy_attr_table()
672 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = in read_phy_attr_table()
674 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = in read_phy_attr_table()
676 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = in read_phy_attr_table()
678 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = in read_phy_attr_table()
680 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = in read_phy_attr_table()
682 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = in read_phy_attr_table()
684 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = in read_phy_attr_table()
686 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = in read_phy_attr_table()
688 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = in read_phy_attr_table()
690 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = in read_phy_attr_table()
692 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = in read_phy_attr_table()
694 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = in read_phy_attr_table()
696 pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = in read_phy_attr_table()
705 static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) in read_inbnd_queue_table() argument
708 void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; in read_inbnd_queue_table()
711 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = in read_inbnd_queue_table()
714 pm8001_ha->inbnd_q_tbl[i].pi_offset = in read_inbnd_queue_table()
723 static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) in read_outbnd_queue_table() argument
726 void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; in read_outbnd_queue_table()
729 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = in read_outbnd_queue_table()
732 pm8001_ha->outbnd_q_tbl[i].ci_offset = in read_outbnd_queue_table()
741 static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) in init_default_table_values() argument
745 void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; in init_default_table_values()
746 void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; in init_default_table_values()
747 u32 ib_offset = pm8001_ha->ib_offset; in init_default_table_values()
748 u32 ob_offset = pm8001_ha->ob_offset; in init_default_table_values()
749 u32 ci_offset = pm8001_ha->ci_offset; in init_default_table_values()
750 u32 pi_offset = pm8001_ha->pi_offset; in init_default_table_values()
752 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = in init_default_table_values()
753 pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; in init_default_table_values()
754 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = in init_default_table_values()
755 pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; in init_default_table_values()
756 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = in init_default_table_values()
758 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; in init_default_table_values()
759 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = in init_default_table_values()
760 pm8001_ha->memoryMap.region[IOP].phys_addr_hi; in init_default_table_values()
761 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = in init_default_table_values()
762 pm8001_ha->memoryMap.region[IOP].phys_addr_lo; in init_default_table_values()
763 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = in init_default_table_values()
765 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; in init_default_table_values()
766 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; in init_default_table_values()
769 if (pm8001_ha->max_q_num > 32) in init_default_table_values()
770 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= in init_default_table_values()
773 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); in init_default_table_values()
775 for (i = 0; i < pm8001_ha->max_q_num; i++) { in init_default_table_values()
776 pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = in init_default_table_values()
777 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); in init_default_table_values()
778 pm8001_ha->inbnd_q_tbl[i].upper_base_addr = in init_default_table_values()
779 pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; in init_default_table_values()
780 pm8001_ha->inbnd_q_tbl[i].lower_base_addr = in init_default_table_values()
781 pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; in init_default_table_values()
782 pm8001_ha->inbnd_q_tbl[i].base_virt = in init_default_table_values()
783 (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; in init_default_table_values()
784 pm8001_ha->inbnd_q_tbl[i].total_length = in init_default_table_values()
785 pm8001_ha->memoryMap.region[ib_offset + i].total_len; in init_default_table_values()
786 pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = in init_default_table_values()
787 pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; in init_default_table_values()
788 pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = in init_default_table_values()
789 pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; in init_default_table_values()
790 pm8001_ha->inbnd_q_tbl[i].ci_virt = in init_default_table_values()
791 pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; in init_default_table_values()
793 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = in init_default_table_values()
796 pm8001_ha->inbnd_q_tbl[i].pi_offset = in init_default_table_values()
798 pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; in init_default_table_values()
799 pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; in init_default_table_values()
801 pm8001_dbg(pm8001_ha, DEV, in init_default_table_values()
803 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, in init_default_table_values()
804 pm8001_ha->inbnd_q_tbl[i].pi_offset); in init_default_table_values()
806 for (i = 0; i < pm8001_ha->max_q_num; i++) { in init_default_table_values()
807 pm8001_ha->outbnd_q_tbl[i].element_size_cnt = in init_default_table_values()
808 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); in init_default_table_values()
809 pm8001_ha->outbnd_q_tbl[i].upper_base_addr = in init_default_table_values()
810 pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; in init_default_table_values()
811 pm8001_ha->outbnd_q_tbl[i].lower_base_addr = in init_default_table_values()
812 pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; in init_default_table_values()
813 pm8001_ha->outbnd_q_tbl[i].base_virt = in init_default_table_values()
814 (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; in init_default_table_values()
815 pm8001_ha->outbnd_q_tbl[i].total_length = in init_default_table_values()
816 pm8001_ha->memoryMap.region[ob_offset + i].total_len; in init_default_table_values()
817 pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = in init_default_table_values()
818 pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; in init_default_table_values()
819 pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = in init_default_table_values()
820 pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; in init_default_table_values()
822 pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); in init_default_table_values()
823 pm8001_ha->outbnd_q_tbl[i].pi_virt = in init_default_table_values()
824 pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; in init_default_table_values()
826 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = in init_default_table_values()
829 pm8001_ha->outbnd_q_tbl[i].ci_offset = in init_default_table_values()
831 pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; in init_default_table_values()
832 pm8001_ha->outbnd_q_tbl[i].producer_index = 0; in init_default_table_values()
834 pm8001_dbg(pm8001_ha, DEV, in init_default_table_values()
836 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, in init_default_table_values()
837 pm8001_ha->outbnd_q_tbl[i].ci_offset); in init_default_table_values()
845 static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) in update_main_config_table() argument
847 void __iomem *address = pm8001_ha->main_cfg_tbl_addr; in update_main_config_table()
849 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); in update_main_config_table()
851 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); in update_main_config_table()
853 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); in update_main_config_table()
855 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); in update_main_config_table()
857 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); in update_main_config_table()
859 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); in update_main_config_table()
861 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); in update_main_config_table()
863 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); in update_main_config_table()
865 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); in update_main_config_table()
867 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= in update_main_config_table()
868 ((pm8001_ha->max_q_num - 1) << 8); in update_main_config_table()
870 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); in update_main_config_table()
871 pm8001_dbg(pm8001_ha, DEV, in update_main_config_table()
876 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); in update_main_config_table()
879 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; in update_main_config_table()
881 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; in update_main_config_table()
883 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); in update_main_config_table()
884 pm8001_dbg(pm8001_ha, DEV, in update_main_config_table()
889 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); in update_main_config_table()
891 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); in update_main_config_table()
893 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; in update_main_config_table()
894 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= in update_main_config_table()
896 if (pm8001_ha->chip_id == chip_8006) { in update_main_config_table()
897 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= in update_main_config_table()
899 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= in update_main_config_table()
903 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); in update_main_config_table()
911 static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, in update_inbnd_queue_table() argument
914 void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; in update_inbnd_queue_table()
917 pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); in update_inbnd_queue_table()
919 pm8001_ha->inbnd_q_tbl[number].upper_base_addr); in update_inbnd_queue_table()
921 pm8001_ha->inbnd_q_tbl[number].lower_base_addr); in update_inbnd_queue_table()
923 pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); in update_inbnd_queue_table()
925 pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); in update_inbnd_queue_table()
927 pm8001_dbg(pm8001_ha, DEV, in update_inbnd_queue_table()
930 pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); in update_inbnd_queue_table()
932 pm8001_dbg(pm8001_ha, DEV, in update_inbnd_queue_table()
934 pm8001_ha->inbnd_q_tbl[number].upper_base_addr, in update_inbnd_queue_table()
935 pm8001_ha->inbnd_q_tbl[number].lower_base_addr); in update_inbnd_queue_table()
937 pm8001_dbg(pm8001_ha, DEV, in update_inbnd_queue_table()
939 pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, in update_inbnd_queue_table()
940 pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); in update_inbnd_queue_table()
948 static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, in update_outbnd_queue_table() argument
951 void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; in update_outbnd_queue_table()
954 pm8001_ha->outbnd_q_tbl[number].element_size_cnt); in update_outbnd_queue_table()
956 pm8001_ha->outbnd_q_tbl[number].upper_base_addr); in update_outbnd_queue_table()
958 pm8001_ha->outbnd_q_tbl[number].lower_base_addr); in update_outbnd_queue_table()
960 pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); in update_outbnd_queue_table()
962 pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); in update_outbnd_queue_table()
964 pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); in update_outbnd_queue_table()
966 pm8001_dbg(pm8001_ha, DEV, in update_outbnd_queue_table()
969 pm8001_ha->outbnd_q_tbl[number].element_size_cnt); in update_outbnd_queue_table()
971 pm8001_dbg(pm8001_ha, DEV, in update_outbnd_queue_table()
973 pm8001_ha->outbnd_q_tbl[number].upper_base_addr, in update_outbnd_queue_table()
974 pm8001_ha->outbnd_q_tbl[number].lower_base_addr); in update_outbnd_queue_table()
976 pm8001_dbg(pm8001_ha, DEV, in update_outbnd_queue_table()
978 pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, in update_outbnd_queue_table()
979 pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); in update_outbnd_queue_table()
986 static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) in mpi_init_check() argument
994 pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); in mpi_init_check()
996 if (IS_SPCV_12G(pm8001_ha->pdev)) { in mpi_init_check()
1003 value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); in mpi_init_check()
1009 pm8001_dbg(pm8001_ha, FAIL, in mpi_init_check()
1019 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_init_check()
1045 static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) in check_fw_ready() argument
1056 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in check_fw_ready()
1063 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in check_fw_ready()
1069 pm8001_dbg(pm8001_ha, MSG, in check_fw_ready()
1078 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in check_fw_ready()
1084 pm8001_dbg(pm8001_ha, MSG, in check_fw_ready()
1093 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in check_fw_ready()
1099 pm8001_dbg(pm8001_ha, MSG, in check_fw_ready()
1105 if ((pm8001_ha->chip_id != chip_8008) && in check_fw_ready()
1106 (pm8001_ha->chip_id != chip_8009)) { in check_fw_ready()
1111 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in check_fw_ready()
1117 pm8001_dbg(pm8001_ha, MSG, in check_fw_ready()
1126 static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) in init_pci_device_addresses() argument
1134 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); in init_pci_device_addresses()
1137 pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n", in init_pci_device_addresses()
1141 pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); in init_pci_device_addresses()
1142 pm8001_ha->main_cfg_tbl_addr = base_addr = in init_pci_device_addresses()
1143 pm8001_ha->io_mem[pcibar].memvirtaddr + offset; in init_pci_device_addresses()
1144 pm8001_ha->general_stat_tbl_addr = in init_pci_device_addresses()
1145 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & in init_pci_device_addresses()
1147 pm8001_ha->inbnd_q_tbl_addr = in init_pci_device_addresses()
1148 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & in init_pci_device_addresses()
1150 pm8001_ha->outbnd_q_tbl_addr = in init_pci_device_addresses()
1151 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & in init_pci_device_addresses()
1153 pm8001_ha->ivt_tbl_addr = in init_pci_device_addresses()
1154 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & in init_pci_device_addresses()
1156 pm8001_ha->pspa_q_tbl_addr = in init_pci_device_addresses()
1157 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & in init_pci_device_addresses()
1159 pm8001_ha->fatal_tbl_addr = in init_pci_device_addresses()
1160 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & in init_pci_device_addresses()
1163 pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n", in init_pci_device_addresses()
1164 pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)); in init_pci_device_addresses()
1165 pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n", in init_pci_device_addresses()
1166 pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)); in init_pci_device_addresses()
1167 pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n", in init_pci_device_addresses()
1168 pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)); in init_pci_device_addresses()
1169 pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n", in init_pci_device_addresses()
1170 pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)); in init_pci_device_addresses()
1171 pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n", in init_pci_device_addresses()
1172 pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)); in init_pci_device_addresses()
1173 pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n", in init_pci_device_addresses()
1174 pm8001_ha->main_cfg_tbl_addr, in init_pci_device_addresses()
1175 pm8001_ha->general_stat_tbl_addr); in init_pci_device_addresses()
1176 pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n", in init_pci_device_addresses()
1177 pm8001_ha->inbnd_q_tbl_addr, in init_pci_device_addresses()
1178 pm8001_ha->outbnd_q_tbl_addr); in init_pci_device_addresses()
1179 pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n", in init_pci_device_addresses()
1180 pm8001_ha->pspa_q_tbl_addr, in init_pci_device_addresses()
1181 pm8001_ha->ivt_tbl_addr); in init_pci_device_addresses()
1189 pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) in pm80xx_set_thermal_config() argument
1199 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm80xx_set_thermal_config()
1203 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_set_thermal_config()
1206 if (IS_SPCV_12G(pm8001_ha->pdev)) in pm80xx_set_thermal_config()
1217 pm8001_dbg(pm8001_ha, DEV, in pm80xx_set_thermal_config()
1221 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_set_thermal_config()
1224 pm8001_tag_free(pm8001_ha, tag); in pm80xx_set_thermal_config()
1235 pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) in pm80xx_set_sas_protocol_timer_config() argument
1247 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm80xx_set_sas_protocol_timer_config()
1252 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_set_sas_protocol_timer_config()
1272 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1274 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1276 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1278 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1280 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1282 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1284 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1286 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1288 pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n", in pm80xx_set_sas_protocol_timer_config()
1294 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_set_sas_protocol_timer_config()
1297 pm8001_tag_free(pm8001_ha, tag); in pm80xx_set_sas_protocol_timer_config()
1307 pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) in pm80xx_get_encrypt_info() argument
1313 scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); in pm80xx_get_encrypt_info()
1318 pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; in pm80xx_get_encrypt_info()
1321 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; in pm80xx_get_encrypt_info()
1324 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; in pm80xx_get_encrypt_info()
1327 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; in pm80xx_get_encrypt_info()
1328 pm8001_ha->encrypt_info.status = 0; in pm80xx_get_encrypt_info()
1329 pm8001_dbg(pm8001_ha, INIT, in pm80xx_get_encrypt_info()
1332 pm8001_ha->encrypt_info.cipher_mode, in pm80xx_get_encrypt_info()
1333 pm8001_ha->encrypt_info.sec_mode, in pm80xx_get_encrypt_info()
1334 pm8001_ha->encrypt_info.status); in pm80xx_get_encrypt_info()
1338 pm8001_dbg(pm8001_ha, INIT, in pm80xx_get_encrypt_info()
1341 pm8001_ha->encrypt_info.status = 0xFFFFFFFF; in pm80xx_get_encrypt_info()
1342 pm8001_ha->encrypt_info.cipher_mode = 0; in pm80xx_get_encrypt_info()
1343 pm8001_ha->encrypt_info.sec_mode = 0; in pm80xx_get_encrypt_info()
1347 pm8001_ha->encrypt_info.status = in pm80xx_get_encrypt_info()
1350 pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; in pm80xx_get_encrypt_info()
1353 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; in pm80xx_get_encrypt_info()
1356 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; in pm80xx_get_encrypt_info()
1359 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; in pm80xx_get_encrypt_info()
1360 pm8001_dbg(pm8001_ha, INIT, in pm80xx_get_encrypt_info()
1363 pm8001_ha->encrypt_info.cipher_mode, in pm80xx_get_encrypt_info()
1364 pm8001_ha->encrypt_info.sec_mode, in pm80xx_get_encrypt_info()
1365 pm8001_ha->encrypt_info.status); in pm80xx_get_encrypt_info()
1369 pm8001_ha->encrypt_info.status = in pm80xx_get_encrypt_info()
1372 pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; in pm80xx_get_encrypt_info()
1375 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; in pm80xx_get_encrypt_info()
1378 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; in pm80xx_get_encrypt_info()
1381 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; in pm80xx_get_encrypt_info()
1383 pm8001_dbg(pm8001_ha, INIT, in pm80xx_get_encrypt_info()
1386 pm8001_ha->encrypt_info.cipher_mode, in pm80xx_get_encrypt_info()
1387 pm8001_ha->encrypt_info.sec_mode, in pm80xx_get_encrypt_info()
1388 pm8001_ha->encrypt_info.status); in pm80xx_get_encrypt_info()
1397 static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) in pm80xx_encrypt_update() argument
1406 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm80xx_encrypt_update()
1410 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_encrypt_update()
1419 pm8001_dbg(pm8001_ha, DEV, in pm80xx_encrypt_update()
1423 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_encrypt_update()
1426 pm8001_tag_free(pm8001_ha, tag); in pm80xx_encrypt_update()
1435 static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) in pm80xx_chip_init() argument
1441 if (-1 == check_fw_ready(pm8001_ha)) { in pm80xx_chip_init()
1442 pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); in pm80xx_chip_init()
1447 pm8001_ha->controller_fatal_error = false; in pm80xx_chip_init()
1450 init_pci_device_addresses(pm8001_ha); in pm80xx_chip_init()
1451 init_default_table_values(pm8001_ha); in pm80xx_chip_init()
1452 read_main_config_table(pm8001_ha); in pm80xx_chip_init()
1453 read_general_status_table(pm8001_ha); in pm80xx_chip_init()
1454 read_inbnd_queue_table(pm8001_ha); in pm80xx_chip_init()
1455 read_outbnd_queue_table(pm8001_ha); in pm80xx_chip_init()
1456 read_phy_attr_table(pm8001_ha); in pm80xx_chip_init()
1459 update_main_config_table(pm8001_ha); in pm80xx_chip_init()
1460 for (i = 0; i < pm8001_ha->max_q_num; i++) { in pm80xx_chip_init()
1461 update_inbnd_queue_table(pm8001_ha, i); in pm80xx_chip_init()
1462 update_outbnd_queue_table(pm8001_ha, i); in pm80xx_chip_init()
1465 if (0 == mpi_init_check(pm8001_ha)) { in pm80xx_chip_init()
1466 pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); in pm80xx_chip_init()
1471 ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); in pm80xx_chip_init()
1474 if (pm8001_ha->chip->encrypt) { in pm80xx_chip_init()
1475 pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n"); in pm80xx_chip_init()
1476 ret = pm80xx_get_encrypt_info(pm8001_ha); in pm80xx_chip_init()
1478 pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n"); in pm80xx_chip_init()
1479 if (pm8001_ha->encrypt_info.status == 0x81) { in pm80xx_chip_init()
1480 pm8001_dbg(pm8001_ha, INIT, in pm80xx_chip_init()
1482 pm80xx_encrypt_update(pm8001_ha); in pm80xx_chip_init()
1489 static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) in mpi_uninit_check() argument
1494 init_pci_device_addresses(pm8001_ha); in mpi_uninit_check()
1497 pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); in mpi_uninit_check()
1500 if (IS_SPCV_12G(pm8001_ha->pdev)) { in mpi_uninit_check()
1507 value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); in mpi_uninit_check()
1512 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value); in mpi_uninit_check()
1522 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_uninit_check()
1529 pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", in mpi_uninit_check()
1544 pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) in pm80xx_chip_soft_rst() argument
1551 if (!pm8001_ha->controller_fatal_error) { in pm80xx_chip_soft_rst()
1553 if (mpi_uninit_check(pm8001_ha) != 0) { in pm80xx_chip_soft_rst()
1554 u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); in pm80xx_chip_soft_rst()
1555 u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in pm80xx_chip_soft_rst()
1556 u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); in pm80xx_chip_soft_rst()
1557 u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); in pm80xx_chip_soft_rst()
1558 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_soft_rst()
1569 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); in pm80xx_chip_soft_rst()
1570 pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n", in pm80xx_chip_soft_rst()
1573 pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); in pm80xx_chip_soft_rst()
1576 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); in pm80xx_chip_soft_rst()
1577 pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n", in pm80xx_chip_soft_rst()
1582 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1586 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1592 pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & in pm80xx_chip_soft_rst()
1596 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1600 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1604 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1608 pm8001_dbg(pm8001_ha, MSG, in pm80xx_chip_soft_rst()
1615 if (-1 == check_fw_ready(pm8001_ha)) { in pm80xx_chip_soft_rst()
1616 pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); in pm80xx_chip_soft_rst()
1618 if (pm8001_ha->pdev->subsystem_vendor != in pm80xx_chip_soft_rst()
1620 pm8001_ha->pdev->subsystem_vendor != in pm80xx_chip_soft_rst()
1622 pm8001_ha->pdev->subsystem_vendor != 0) { in pm80xx_chip_soft_rst()
1623 ibutton0 = pm8001_cr32(pm8001_ha, 0, in pm80xx_chip_soft_rst()
1625 ibutton1 = pm8001_cr32(pm8001_ha, 0, in pm80xx_chip_soft_rst()
1628 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_soft_rst()
1633 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_soft_rst()
1639 pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n"); in pm80xx_chip_soft_rst()
1643 static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) in pm80xx_hw_chip_rst() argument
1647 pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); in pm80xx_hw_chip_rst()
1650 pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); in pm80xx_hw_chip_rst()
1651 pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); in pm80xx_hw_chip_rst()
1663 pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); in pm80xx_hw_chip_rst()
1671 pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) in pm80xx_chip_intx_interrupt_enable() argument
1673 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); in pm80xx_chip_intx_interrupt_enable()
1674 pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); in pm80xx_chip_intx_interrupt_enable()
1682 pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) in pm80xx_chip_intx_interrupt_disable() argument
1684 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); in pm80xx_chip_intx_interrupt_disable()
1693 pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) in pm80xx_chip_interrupt_enable() argument
1697 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec); in pm80xx_chip_interrupt_enable()
1699 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U, in pm80xx_chip_interrupt_enable()
1703 pm80xx_chip_intx_interrupt_enable(pm8001_ha); in pm80xx_chip_interrupt_enable()
1713 pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) in pm80xx_chip_interrupt_disable() argument
1718 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF); in pm80xx_chip_interrupt_disable()
1719 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF); in pm80xx_chip_interrupt_disable()
1721 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec); in pm80xx_chip_interrupt_disable()
1723 pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, in pm80xx_chip_interrupt_disable()
1727 pm80xx_chip_intx_interrupt_disable(pm8001_ha); in pm80xx_chip_interrupt_disable()
1730 static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, in pm80xx_send_abort_all() argument
1743 pm8001_dbg(pm8001_ha, FAIL, "dev is null\n"); in pm80xx_send_abort_all()
1750 pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n"); in pm80xx_send_abort_all()
1756 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); in pm80xx_send_abort_all()
1762 ccb = &pm8001_ha->ccb_info[ccb_tag]; in pm80xx_send_abort_all()
1768 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_send_abort_all()
1775 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, in pm80xx_send_abort_all()
1777 pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n"); in pm80xx_send_abort_all()
1780 pm8001_tag_free(pm8001_ha, ccb_tag); in pm80xx_send_abort_all()
1784 static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, in pm80xx_send_read_log() argument
1800 pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n"); in pm80xx_send_read_log()
1805 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); in pm80xx_send_read_log()
1808 pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n"); in pm80xx_send_read_log()
1818 pm8001_tag_free(pm8001_ha, ccb_tag); in pm80xx_send_read_log()
1819 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_send_read_log()
1827 ccb = &pm8001_ha->ccb_info[ccb_tag]; in pm80xx_send_read_log()
1836 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_send_read_log()
1851 res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, in pm80xx_send_read_log()
1853 pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n"); in pm80xx_send_read_log()
1856 pm8001_tag_free(pm8001_ha, ccb_tag); in pm80xx_send_read_log()
1873 mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) in mpi_ssp_completion() argument
1888 ccb = &pm8001_ha->ccb_info[tag]; in mpi_ssp_completion()
1899 pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); in mpi_ssp_completion()
1904 pm8001_dbg(pm8001_ha, DEV, in mpi_ssp_completion()
1910 pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", in mpi_ssp_completion()
1915 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n", in mpi_ssp_completion()
1925 sas_ssp_task_response(pm8001_ha->dev, t, iu); in mpi_ssp_completion()
1931 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); in mpi_ssp_completion()
1939 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n", in mpi_ssp_completion()
1948 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_ssp_completion()
1955 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_ssp_completion()
1964 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_ssp_completion()
1972 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1981 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1990 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1999 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_ssp_completion()
2012 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_ssp_completion()
2017 pm8001_handle_event(pm8001_ha, in mpi_ssp_completion()
2022 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
2031 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
2040 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
2049 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_ssp_completion()
2057 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_ssp_completion()
2064 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); in mpi_ssp_completion()
2071 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_ssp_completion()
2079 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_ssp_completion()
2086 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_ssp_completion()
2093 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_ssp_completion()
2097 pm8001_handle_event(pm8001_ha, in mpi_ssp_completion()
2102 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); in mpi_ssp_completion()
2109 pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); in mpi_ssp_completion()
2116 pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); in mpi_ssp_completion()
2123 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
2132 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_ssp_completion()
2140 pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ", in mpi_ssp_completion()
2148 pm8001_dbg(pm8001_ha, FAIL, in mpi_ssp_completion()
2151 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_ssp_completion()
2156 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_ssp_completion()
2163 static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) in mpi_ssp_event() argument
2176 ccb = &pm8001_ha->ccb_info[tag]; in mpi_ssp_event()
2180 pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); in mpi_ssp_event()
2184 pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", in mpi_ssp_event()
2188 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_ssp_event()
2196 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_ssp_event()
2197 pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); in mpi_ssp_event()
2200 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_ssp_event()
2206 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2213 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2220 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_ssp_event()
2231 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_ssp_event()
2236 pm8001_handle_event(pm8001_ha, in mpi_ssp_event()
2241 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2248 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2255 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2262 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_ssp_event()
2268 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_ssp_event()
2273 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_ssp_event()
2274 pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); in mpi_ssp_event()
2277 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); in mpi_ssp_event()
2282 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); in mpi_ssp_event()
2287 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2293 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2299 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_ssp_event()
2304 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2310 pm8001_dbg(pm8001_ha, IOERR, in mpi_ssp_event()
2317 pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); in mpi_ssp_event()
2320 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); in mpi_ssp_event()
2332 pm8001_dbg(pm8001_ha, FAIL, in mpi_ssp_event()
2335 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_ssp_event()
2338 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_ssp_event()
2346 mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_sata_completion() argument
2369 pm8001_dbg(pm8001_ha, FAIL, "tag null\n"); in mpi_sata_completion()
2372 ccb = &pm8001_ha->ccb_info[tag]; in mpi_sata_completion()
2378 pm8001_dbg(pm8001_ha, FAIL, "ccb null\n"); in mpi_sata_completion()
2386 pm8001_dbg(pm8001_ha, FAIL, "task null\n"); in mpi_sata_completion()
2392 pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); in mpi_sata_completion()
2398 pm8001_dbg(pm8001_ha, FAIL, "ts null\n"); in mpi_sata_completion()
2403 pm8001_dbg(pm8001_ha, IOERR, in mpi_sata_completion()
2413 sata_addr_low[i] = pm8001_ha->sas_addr[j]; in mpi_sata_completion()
2415 sata_addr_hi[i] = pm8001_ha->sas_addr[j]; in mpi_sata_completion()
2437 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_completion()
2443 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_completion()
2450 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); in mpi_sata_completion()
2461 pm80xx_send_abort_all(pm8001_ha, pm8001_dev); in mpi_sata_completion()
2463 pm8001_tag_free(pm8001_ha, tag); in mpi_sata_completion()
2472 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2480 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2485 pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", in mpi_sata_completion()
2489 pm8001_dbg(pm8001_ha, IO, "other len = %d\n", in mpi_sata_completion()
2497 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2504 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); in mpi_sata_completion()
2513 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); in mpi_sata_completion()
2521 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_sata_completion()
2528 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_sata_completion()
2535 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_sata_completion()
2543 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2552 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2561 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_sata_completion()
2574 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_sata_completion()
2578 pm8001_handle_event(pm8001_ha, in mpi_sata_completion()
2583 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2588 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2594 pm8001_handle_event(pm8001_ha, in mpi_sata_completion()
2599 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2604 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2613 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2618 pm8001_handle_event(pm8001_ha, in mpi_sata_completion()
2623 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2628 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2637 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_sata_completion()
2644 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_sata_completion()
2651 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); in mpi_sata_completion()
2658 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); in mpi_sata_completion()
2665 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); in mpi_sata_completion()
2672 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_sata_completion()
2679 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_sata_completion()
2686 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_sata_completion()
2690 pm8001_handle_event(pm8001_ha, pm8001_dev, in mpi_sata_completion()
2694 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2699 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); in mpi_sata_completion()
2706 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); in mpi_sata_completion()
2710 pm8001_handle_event(pm8001_ha, pm8001_dev, in mpi_sata_completion()
2714 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2719 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2728 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_sata_completion()
2742 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_completion()
2745 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2750 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_completion()
2755 static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) in mpi_sata_event() argument
2769 ccb = &pm8001_ha->ccb_info[tag]; in mpi_sata_event()
2775 pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n"); in mpi_sata_event()
2779 pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); in mpi_sata_event()
2784 pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); in mpi_sata_event()
2787 pm80xx_send_read_log(pm8001_ha, pm8001_dev); in mpi_sata_event()
2792 pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); in mpi_sata_event()
2797 pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", in mpi_sata_event()
2801 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_sata_event()
2809 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_sata_event()
2814 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_sata_event()
2820 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2827 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2834 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_sata_event()
2845 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_event()
2850 pm8001_handle_event(pm8001_ha, in mpi_sata_event()
2855 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_event()
2860 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2867 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2874 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2881 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_sata_event()
2886 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); in mpi_sata_event()
2891 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); in mpi_sata_event()
2896 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_sata_event()
2901 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); in mpi_sata_event()
2906 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); in mpi_sata_event()
2911 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2917 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_sata_event()
2922 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2928 pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); in mpi_sata_event()
2931 pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); in mpi_sata_event()
2936 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_event()
2943 pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n"); in mpi_sata_event()
2949 pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event); in mpi_sata_event()
2961 pm8001_dbg(pm8001_ha, FAIL, in mpi_sata_event()
2964 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_sata_event()
2967 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); in mpi_sata_event()
2973 mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_smp_completion() argument
2990 ccb = &pm8001_ha->ccb_info[tag]; in mpi_smp_completion()
2996 pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); in mpi_smp_completion()
3000 pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status); in mpi_smp_completion()
3005 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); in mpi_smp_completion()
3010 if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { in mpi_smp_completion()
3011 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3019 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3027 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); in mpi_smp_completion()
3034 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_smp_completion()
3042 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_smp_completion()
3047 pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); in mpi_smp_completion()
3052 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_smp_completion()
3057 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_smp_completion()
3062 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3069 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3076 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_smp_completion()
3087 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_smp_completion()
3091 pm8001_handle_event(pm8001_ha, in mpi_smp_completion()
3096 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3103 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3110 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3117 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); in mpi_smp_completion()
3122 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_smp_completion()
3128 pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); in mpi_smp_completion()
3133 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_smp_completion()
3139 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_smp_completion()
3144 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); in mpi_smp_completion()
3150 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
3157 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_smp_completion()
3169 pm8001_dbg(pm8001_ha, FAIL, in mpi_smp_completion()
3172 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_smp_completion()
3175 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); in mpi_smp_completion()
3191 static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_hw_event_ack_req() argument
3200 circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; in pm80xx_hw_event_ack_req()
3206 pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_hw_event_ack_req()
3210 static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
3213 static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, in hw_event_port_recover() argument
3223 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_port_recover()
3225 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_port_recover()
3228 pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, in hw_event_port_recover()
3245 hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) in hw_event_sas_phy_up() argument
3260 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_sas_phy_up()
3261 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_sas_phy_up()
3267 pm8001_dbg(pm8001_ha, MSG, in hw_event_sas_phy_up()
3273 pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); in hw_event_sas_phy_up()
3276 pm8001_dbg(pm8001_ha, MSG, "end device.\n"); in hw_event_sas_phy_up()
3277 pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, in hw_event_sas_phy_up()
3283 pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); in hw_event_sas_phy_up()
3288 pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); in hw_event_sas_phy_up()
3293 pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", in hw_event_sas_phy_up()
3312 if (pm8001_ha->flags == PM8001F_RUN_TIME) in hw_event_sas_phy_up()
3314 pm8001_bytes_dmaed(pm8001_ha, phy_id); in hw_event_sas_phy_up()
3323 hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) in hw_event_sata_phy_up() argument
3338 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_sata_phy_up()
3339 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_sata_phy_up()
3341 pm8001_dbg(pm8001_ha, DEVIO, in hw_event_sata_phy_up()
3361 pm8001_bytes_dmaed(pm8001_ha, phy_id); in hw_event_sata_phy_up()
3370 hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) in hw_event_phy_down() argument
3383 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_phy_down()
3384 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_phy_down()
3393 pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", in hw_event_phy_down()
3395 pm8001_dbg(pm8001_ha, MSG, in hw_event_phy_down()
3400 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, in hw_event_phy_down()
3406 pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", in hw_event_phy_down()
3410 pm8001_dbg(pm8001_ha, MSG, in hw_event_phy_down()
3415 pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n"); in hw_event_phy_down()
3416 pm8001_dbg(pm8001_ha, MSG, in hw_event_phy_down()
3421 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, in hw_event_phy_down()
3428 pm8001_dbg(pm8001_ha, DEVIO, in hw_event_phy_down()
3438 static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_phy_start_resp() argument
3446 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in mpi_phy_start_resp()
3448 pm8001_dbg(pm8001_ha, INIT, in mpi_phy_start_resp()
3454 if (pm8001_ha->flags == PM8001F_RUN_TIME && in mpi_phy_start_resp()
3468 static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_thermal_hw_event() argument
3477 pm8001_dbg(pm8001_ha, IO, in mpi_thermal_hw_event()
3479 pm8001_dbg(pm8001_ha, IO, in mpi_thermal_hw_event()
3484 pm8001_dbg(pm8001_ha, IO, in mpi_thermal_hw_event()
3486 pm8001_dbg(pm8001_ha, IO, in mpi_thermal_hw_event()
3498 static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_hw_event() argument
3513 struct sas_ha_struct *sas_ha = pm8001_ha->sas; in mpi_hw_event()
3514 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in mpi_hw_event()
3515 struct pm8001_port *port = &pm8001_ha->port[port_id]; in mpi_hw_event()
3517 pm8001_dbg(pm8001_ha, DEV, in mpi_hw_event()
3524 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); in mpi_hw_event()
3525 hw_event_sas_phy_up(pm8001_ha, piomb); in mpi_hw_event()
3528 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); in mpi_hw_event()
3529 hw_event_sata_phy_up(pm8001_ha, piomb); in mpi_hw_event()
3532 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); in mpi_hw_event()
3536 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); in mpi_hw_event()
3537 hw_event_phy_down(pm8001_ha, piomb); in mpi_hw_event()
3538 if (pm8001_ha->reset_in_progress) { in mpi_hw_event()
3539 pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n"); in mpi_hw_event()
3546 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); in mpi_hw_event()
3554 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); in mpi_hw_event()
3555 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, in mpi_hw_event()
3563 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); in mpi_hw_event()
3569 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); in mpi_hw_event()
3576 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3578 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3582 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3584 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3589 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3591 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3596 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3598 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3603 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); in mpi_hw_event()
3606 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); in mpi_hw_event()
3613 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); in mpi_hw_event()
3614 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3619 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); in mpi_hw_event()
3623 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); in mpi_hw_event()
3629 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3631 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3639 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); in mpi_hw_event()
3640 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, in mpi_hw_event()
3645 if (pm8001_ha->phy[phy_id].reset_completion) { in mpi_hw_event()
3646 pm8001_ha->phy[phy_id].port_reset_status = in mpi_hw_event()
3648 complete(pm8001_ha->phy[phy_id].reset_completion); in mpi_hw_event()
3649 pm8001_ha->phy[phy_id].reset_completion = NULL; in mpi_hw_event()
3653 pm8001_dbg(pm8001_ha, MSG, in mpi_hw_event()
3655 pm80xx_hw_event_ack_req(pm8001_ha, 0, in mpi_hw_event()
3658 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in mpi_hw_event()
3660 phy = &pm8001_ha->phy[i]; in mpi_hw_event()
3668 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); in mpi_hw_event()
3669 hw_event_port_recover(pm8001_ha, piomb); in mpi_hw_event()
3672 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); in mpi_hw_event()
3673 if (pm8001_ha->phy[phy_id].reset_completion) { in mpi_hw_event()
3674 pm8001_ha->phy[phy_id].port_reset_status = in mpi_hw_event()
3676 complete(pm8001_ha->phy[phy_id].reset_completion); in mpi_hw_event()
3677 pm8001_ha->phy[phy_id].reset_completion = NULL; in mpi_hw_event()
3681 pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); in mpi_hw_event()
3684 pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n", in mpi_hw_event()
3696 static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_phy_stop_resp() argument
3704 struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; in mpi_phy_stop_resp()
3705 pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n", in mpi_phy_stop_resp()
3718 static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, in mpi_set_controller_config_resp() argument
3726 pm8001_dbg(pm8001_ha, MSG, in mpi_set_controller_config_resp()
3738 static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, in mpi_get_controller_config_resp() argument
3741 pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); in mpi_get_controller_config_resp()
3751 static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, in mpi_get_phy_profile_resp() argument
3754 pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); in mpi_get_phy_profile_resp()
3764 static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) in mpi_flash_op_ext_resp() argument
3766 pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); in mpi_flash_op_ext_resp()
3776 static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, in mpi_set_phy_profile_resp() argument
3791 pm8001_dbg(pm8001_ha, FAIL, in mpi_set_phy_profile_resp()
3797 pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n", in mpi_set_phy_profile_resp()
3802 pm8001_tag_free(pm8001_ha, tag); in mpi_set_phy_profile_resp()
3811 static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, in mpi_kek_management_resp() argument
3820 pm8001_dbg(pm8001_ha, MSG, in mpi_kek_management_resp()
3832 static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, in mpi_dek_management_resp() argument
3835 pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); in mpi_dek_management_resp()
3845 static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, in ssp_coalesced_comp_resp() argument
3848 pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); in ssp_coalesced_comp_resp()
3858 static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) in process_one_iomb() argument
3865 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); in process_one_iomb()
3868 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); in process_one_iomb()
3869 mpi_hw_event(pm8001_ha, piomb); in process_one_iomb()
3872 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n"); in process_one_iomb()
3873 mpi_thermal_hw_event(pm8001_ha, piomb); in process_one_iomb()
3876 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); in process_one_iomb()
3877 mpi_ssp_completion(pm8001_ha, piomb); in process_one_iomb()
3880 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); in process_one_iomb()
3881 mpi_smp_completion(pm8001_ha, piomb); in process_one_iomb()
3884 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); in process_one_iomb()
3885 pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); in process_one_iomb()
3888 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); in process_one_iomb()
3889 pm8001_mpi_reg_resp(pm8001_ha, piomb); in process_one_iomb()
3892 pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); in process_one_iomb()
3893 pm8001_mpi_dereg_resp(pm8001_ha, piomb); in process_one_iomb()
3896 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); in process_one_iomb()
3899 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); in process_one_iomb()
3900 mpi_sata_completion(pm8001_ha, piomb); in process_one_iomb()
3903 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); in process_one_iomb()
3904 mpi_sata_event(pm8001_ha, piomb); in process_one_iomb()
3907 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); in process_one_iomb()
3908 mpi_ssp_event(pm8001_ha, piomb); in process_one_iomb()
3911 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); in process_one_iomb()
3915 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); in process_one_iomb()
3919 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); in process_one_iomb()
3920 pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); in process_one_iomb()
3923 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); in process_one_iomb()
3926 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); in process_one_iomb()
3929 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); in process_one_iomb()
3930 pm8001_mpi_general_event(pm8001_ha, piomb); in process_one_iomb()
3933 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); in process_one_iomb()
3934 pm8001_mpi_task_abort_resp(pm8001_ha, piomb); in process_one_iomb()
3937 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); in process_one_iomb()
3938 pm8001_mpi_task_abort_resp(pm8001_ha, piomb); in process_one_iomb()
3941 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
3945 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); in process_one_iomb()
3948 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); in process_one_iomb()
3951 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); in process_one_iomb()
3954 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); in process_one_iomb()
3957 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); in process_one_iomb()
3958 pm8001_mpi_task_abort_resp(pm8001_ha, piomb); in process_one_iomb()
3961 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); in process_one_iomb()
3962 pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); in process_one_iomb()
3965 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); in process_one_iomb()
3966 pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); in process_one_iomb()
3969 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); in process_one_iomb()
3972 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); in process_one_iomb()
3973 pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); in process_one_iomb()
3976 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); in process_one_iomb()
3979 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); in process_one_iomb()
3983 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
3985 mpi_phy_start_resp(pm8001_ha, piomb); in process_one_iomb()
3988 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
3990 mpi_phy_stop_resp(pm8001_ha, piomb); in process_one_iomb()
3993 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
3995 mpi_set_controller_config_resp(pm8001_ha, piomb); in process_one_iomb()
3998 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4000 mpi_get_controller_config_resp(pm8001_ha, piomb); in process_one_iomb()
4003 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4005 mpi_get_phy_profile_resp(pm8001_ha, piomb); in process_one_iomb()
4008 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4010 mpi_flash_op_ext_resp(pm8001_ha, piomb); in process_one_iomb()
4013 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4015 mpi_set_phy_profile_resp(pm8001_ha, piomb); in process_one_iomb()
4018 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4020 mpi_kek_management_resp(pm8001_ha, piomb); in process_one_iomb()
4023 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4025 mpi_dek_management_resp(pm8001_ha, piomb); in process_one_iomb()
4028 pm8001_dbg(pm8001_ha, MSG, in process_one_iomb()
4030 ssp_coalesced_comp_resp(pm8001_ha, piomb); in process_one_iomb()
4033 pm8001_dbg(pm8001_ha, DEVIO, in process_one_iomb()
4039 static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) in print_scratchpad_registers() argument
4041 pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n", in print_scratchpad_registers()
4042 pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)); in print_scratchpad_registers()
4043 pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n", in print_scratchpad_registers()
4044 pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)); in print_scratchpad_registers()
4045 pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n", in print_scratchpad_registers()
4046 pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)); in print_scratchpad_registers()
4047 pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n", in print_scratchpad_registers()
4048 pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)); in print_scratchpad_registers()
4049 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", in print_scratchpad_registers()
4050 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)); in print_scratchpad_registers()
4051 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", in print_scratchpad_registers()
4052 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)); in print_scratchpad_registers()
4053 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", in print_scratchpad_registers()
4054 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)); in print_scratchpad_registers()
4055 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", in print_scratchpad_registers()
4056 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)); in print_scratchpad_registers()
4057 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", in print_scratchpad_registers()
4058 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)); in print_scratchpad_registers()
4059 pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", in print_scratchpad_registers()
4060 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)); in print_scratchpad_registers()
4061 pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", in print_scratchpad_registers()
4062 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)); in print_scratchpad_registers()
4063 pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", in print_scratchpad_registers()
4064 pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)); in print_scratchpad_registers()
4067 static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) in process_oq() argument
4081 if (vec == (pm8001_ha->max_q_num - 1)) { in process_oq()
4084 if (pm8001_ha->chip_id == chip_8008 || in process_oq()
4085 pm8001_ha->chip_id == chip_8009) in process_oq()
4090 regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); in process_oq()
4092 pm8001_ha->controller_fatal_error = true; in process_oq()
4093 pm8001_dbg(pm8001_ha, FAIL, in process_oq()
4096 print_scratchpad_registers(pm8001_ha); in process_oq()
4100 spin_lock_irqsave(&pm8001_ha->lock, flags); in process_oq()
4101 circularQ = &pm8001_ha->outbnd_q_tbl[vec]; in process_oq()
4109 ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); in process_oq()
4112 process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); in process_oq()
4114 pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, in process_oq()
4127 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in process_oq()
4157 static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_smp_req() argument
4178 elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); in pm80xx_chip_smp_req()
4184 elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); in pm80xx_chip_smp_req()
4197 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_chip_smp_req()
4201 pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length); in pm80xx_chip_smp_req()
4203 pm8001_ha->smp_exp_mode = SMP_DIRECT; in pm80xx_chip_smp_req()
4205 pm8001_ha->smp_exp_mode = SMP_INDIRECT; in pm80xx_chip_smp_req()
4212 if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { in pm80xx_chip_smp_req()
4213 pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n"); in pm80xx_chip_smp_req()
4244 if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { in pm80xx_chip_smp_req()
4245 pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n"); in pm80xx_chip_smp_req()
4249 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_smp_req()
4255 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_smp_req()
4263 &smp_cmd, pm8001_ha->smp_exp_mode, length); in pm80xx_chip_smp_req()
4264 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, in pm80xx_chip_smp_req()
4271 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, in pm80xx_chip_smp_req()
4274 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, in pm80xx_chip_smp_req()
4317 static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_ssp_io_req() argument
4351 q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); in pm80xx_chip_ssp_io_req()
4352 circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; in pm80xx_chip_ssp_io_req()
4355 if (pm8001_ha->chip->encrypt && in pm80xx_chip_ssp_io_req()
4356 !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { in pm80xx_chip_ssp_io_req()
4357 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_ssp_io_req()
4391 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_ssp_io_req()
4421 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_ssp_io_req()
4448 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_ssp_io_req()
4469 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, in pm80xx_chip_ssp_io_req()
4474 static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_sata_req() argument
4494 q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); in pm80xx_chip_sata_req()
4495 circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; in pm80xx_chip_sata_req()
4499 pm8001_dbg(pm8001_ha, IO, "no data\n"); in pm80xx_chip_sata_req()
4504 pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); in pm80xx_chip_sata_req()
4507 pm8001_dbg(pm8001_ha, IO, "DMA\n"); in pm80xx_chip_sata_req()
4510 pm8001_dbg(pm8001_ha, IO, "PIO\n"); in pm80xx_chip_sata_req()
4528 if (pm8001_ha->chip->encrypt && in pm80xx_chip_sata_req()
4529 !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { in pm80xx_chip_sata_req()
4530 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_sata_req()
4565 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_sata_req()
4599 pm8001_dbg(pm8001_ha, IO, in pm80xx_chip_sata_req()
4628 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_sata_req()
4690 pm8001_dbg(pm8001_ha, FAIL, in pm80xx_chip_sata_req()
4694 pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); in pm80xx_chip_sata_req()
4699 pm8001_ccb_task_free_done(pm8001_ha, task, in pm80xx_chip_sata_req()
4706 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, in pm80xx_chip_sata_req()
4717 pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) in pm80xx_chip_phy_start_req() argument
4724 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_chip_phy_start_req()
4728 pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id); in pm80xx_chip_phy_start_req()
4731 LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); in pm80xx_chip_phy_start_req()
4744 &pm8001_ha->sas_addr, SAS_ADDR_SIZE); in pm80xx_chip_phy_start_req()
4746 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, in pm80xx_chip_phy_start_req()
4756 static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_phy_stop_req() argument
4764 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_chip_phy_stop_req()
4768 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, in pm80xx_chip_phy_stop_req()
4776 static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_reg_dev_req() argument
4791 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_chip_reg_dev_req()
4794 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm80xx_chip_reg_dev_req()
4797 ccb = &pm8001_ha->ccb_info[tag]; in pm80xx_chip_reg_dev_req()
4835 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_chip_reg_dev_req()
4838 pm8001_tag_free(pm8001_ha, tag); in pm80xx_chip_reg_dev_req()
4849 static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, in pm80xx_chip_phy_ctl_req() argument
4858 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm80xx_chip_phy_ctl_req()
4861 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm80xx_chip_phy_ctl_req()
4866 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm80xx_chip_phy_ctl_req()
4869 pm8001_tag_free(pm8001_ha, tag); in pm80xx_chip_phy_ctl_req()
4874 static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) in pm80xx_chip_is_our_interrupt() argument
4881 value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); in pm80xx_chip_is_our_interrupt()
4894 pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) in pm80xx_chip_isr() argument
4896 pm80xx_chip_interrupt_disable(pm8001_ha, vec); in pm80xx_chip_isr()
4897 pm8001_dbg(pm8001_ha, DEVIO, in pm80xx_chip_isr()
4899 vec, pm8001_cr32(pm8001_ha, 0, 0x30)); in pm80xx_chip_isr()
4900 process_oq(pm8001_ha, vec); in pm80xx_chip_isr()
4901 pm80xx_chip_interrupt_enable(pm8001_ha, vec); in pm80xx_chip_isr()
4905 static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, in mpi_set_phy_profile_req() argument
4916 rc = pm8001_tag_alloc(pm8001_ha, &tag); in mpi_set_phy_profile_req()
4918 pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n"); in mpi_set_phy_profile_req()
4919 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in mpi_set_phy_profile_req()
4922 pm8001_dbg(pm8001_ha, INIT, in mpi_set_phy_profile_req()
4929 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in mpi_set_phy_profile_req()
4932 pm8001_tag_free(pm8001_ha, tag); in mpi_set_phy_profile_req()
4935 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, in pm8001_set_phy_profile() argument
4940 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_profile()
4941 mpi_set_phy_profile_req(pm8001_ha, in pm8001_set_phy_profile()
4945 pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n"); in pm8001_set_phy_profile()
4948 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, in pm8001_set_phy_profile_single() argument
4958 rc = pm8001_tag_alloc(pm8001_ha, &tag); in pm8001_set_phy_profile_single()
4960 pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n"); in pm8001_set_phy_profile_single()
4962 circularQ = &pm8001_ha->inbnd_q_tbl[0]; in pm8001_set_phy_profile_single()
4972 rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, in pm8001_set_phy_profile_single()
4975 pm8001_tag_free(pm8001_ha, tag); in pm8001_set_phy_profile_single()
4977 pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy); in pm8001_set_phy_profile_single()