Lines Matching refs:ioc
127 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc,
130 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc);
132 _base_clear_outstanding_commands(struct MPT3SAS_ADAPTER *ioc);
147 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_check_cmd_timeout() argument
155 ioc_err(ioc, "Command %s\n", in mpt3sas_base_check_cmd_timeout()
173 struct MPT3SAS_ADAPTER *ioc; in _scsih_set_fwfault_debug() local
181 list_for_each_entry(ioc, &mpt3sas_ioc_list, list) in _scsih_set_fwfault_debug()
182 ioc->fwfault_debug = mpt3sas_fwfault_debug; in _scsih_set_fwfault_debug()
224 _base_clone_reply_to_sys_mem(struct MPT3SAS_ADAPTER *ioc, u32 reply, in _base_clone_reply_to_sys_mem() argument
232 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_clone_reply_to_sys_mem()
233 void __iomem *reply_free_iomem = (void __iomem *)ioc->chip + in _base_clone_reply_to_sys_mem()
235 (cmd_credit * ioc->request_sz) + (index * sizeof(u32)); in _base_clone_reply_to_sys_mem()
288 _base_get_chain(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_get_chain() argument
292 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain()
294 base_chain = (void __iomem *)ioc->chip + MPI_FRAME_START_OFFSET + in _base_get_chain()
295 (cmd_credit * ioc->request_sz) + in _base_get_chain()
297 chain_virt = base_chain + (smid * ioc->facts.MaxChainDepth * in _base_get_chain()
298 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain()
314 _base_get_chain_phys(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_get_chain_phys() argument
318 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain_phys()
320 base_chain_phys = ioc->chip_phys + MPI_FRAME_START_OFFSET + in _base_get_chain_phys()
321 (cmd_credit * ioc->request_sz) + in _base_get_chain_phys()
323 chain_phys = base_chain_phys + (smid * ioc->facts.MaxChainDepth * in _base_get_chain_phys()
324 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain_phys()
340 _base_get_buffer_bar0(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_get_buffer_bar0() argument
342 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_bar0()
344 void __iomem *chain_end = _base_get_chain(ioc, in _base_get_buffer_bar0()
346 ioc->facts.MaxChainDepth); in _base_get_buffer_bar0()
361 _base_get_buffer_phys_bar0(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_get_buffer_phys_bar0() argument
363 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_phys_bar0()
364 phys_addr_t chain_end_phys = _base_get_chain_phys(ioc, in _base_get_buffer_phys_bar0()
366 ioc->facts.MaxChainDepth); in _base_get_buffer_phys_bar0()
382 _base_get_chain_buffer_dma_to_chain_buffer(struct MPT3SAS_ADAPTER *ioc, in _base_get_chain_buffer_dma_to_chain_buffer() argument
388 for (index = 0; index < ioc->scsiio_depth; index++) { in _base_get_chain_buffer_dma_to_chain_buffer()
389 for (j = 0; j < ioc->chains_needed_per_io; j++) { in _base_get_chain_buffer_dma_to_chain_buffer()
390 ct = &ioc->chain_lookup[index].chains_per_smid[j]; in _base_get_chain_buffer_dma_to_chain_buffer()
395 ioc_info(ioc, "Provided chain_buffer_dma address is not in the lookup list\n"); in _base_get_chain_buffer_dma_to_chain_buffer()
409 static void _clone_sg_entries(struct MPT3SAS_ADAPTER *ioc, in _clone_sg_entries() argument
449 scmd = mpt3sas_scsih_scsi_lookup_get(ioc, smid); in _clone_sg_entries()
451 ioc_err(ioc, "scmd is NULL\n"); in _clone_sg_entries()
474 buffer_iomem = _base_get_buffer_bar0(ioc, smid); in _clone_sg_entries()
475 buffer_iomem_phys = _base_get_buffer_phys_bar0(ioc, smid); in _clone_sg_entries()
485 for (i = 0; i < MPT_MIN_PHYS_SEGMENTS + ioc->facts.MaxChainDepth; i++) { in _clone_sg_entries()
498 _base_get_chain_buffer_dma_to_chain_buffer(ioc, in _clone_sg_entries()
507 _base_get_chain(ioc, in _clone_sg_entries()
511 dst_addr_phys = _base_get_chain_phys(ioc, in _clone_sg_entries()
534 ioc->config_vaddr, in _clone_sg_entries()
572 src_chain_addr[i], ioc->request_sz); in _clone_sg_entries()
586 struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg; in mpt3sas_remove_dead_ioc_func() local
589 if (!ioc) in mpt3sas_remove_dead_ioc_func()
592 pdev = ioc->pdev; in mpt3sas_remove_dead_ioc_func()
608 struct MPT3SAS_ADAPTER *ioc = in _base_fault_reset_work() local
616 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
617 if ((ioc->shost_recovery && (ioc->ioc_coredump_loop == 0)) || in _base_fault_reset_work()
618 ioc->pci_error_recovery) in _base_fault_reset_work()
620 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
622 doorbell = mpt3sas_base_get_iocstate(ioc, 0); in _base_fault_reset_work()
624 ioc_err(ioc, "SAS host is non-operational !!!!\n"); in _base_fault_reset_work()
634 if (ioc->non_operational_loop++ < 5) { in _base_fault_reset_work()
635 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, in _base_fault_reset_work()
647 ioc->schedule_dead_ioc_flush_running_cmds(ioc); in _base_fault_reset_work()
652 ioc->remove_host = 1; in _base_fault_reset_work()
654 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc, in _base_fault_reset_work()
655 "%s_dead_ioc_%d", ioc->driver_name, ioc->id); in _base_fault_reset_work()
657 ioc_err(ioc, "%s: Running mpt3sas_dead_ioc thread failed !!!!\n", in _base_fault_reset_work()
660 ioc_err(ioc, "%s: Running mpt3sas_dead_ioc thread success !!!!\n", in _base_fault_reset_work()
666 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in _base_fault_reset_work()
667 ioc->manu_pg11.CoreDumpTOSec : in _base_fault_reset_work()
672 if (ioc->ioc_coredump_loop == 0) { in _base_fault_reset_work()
673 mpt3sas_print_coredump_info(ioc, in _base_fault_reset_work()
677 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
678 ioc->shost_recovery = 1; in _base_fault_reset_work()
680 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
681 mpt3sas_base_mask_interrupts(ioc); in _base_fault_reset_work()
682 _base_clear_outstanding_commands(ioc); in _base_fault_reset_work()
685 ioc_info(ioc, "%s: CoreDump loop %d.", in _base_fault_reset_work()
686 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
689 if (ioc->ioc_coredump_loop++ < timeout) { in _base_fault_reset_work()
691 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
696 if (ioc->ioc_coredump_loop) { in _base_fault_reset_work()
698 ioc_err(ioc, "%s: CoreDump completed. LoopCount: %d", in _base_fault_reset_work()
699 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
701 ioc_err(ioc, "%s: CoreDump Timed out. LoopCount: %d", in _base_fault_reset_work()
702 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
703 ioc->ioc_coredump_loop = MPT3SAS_COREDUMP_LOOP_DONE; in _base_fault_reset_work()
705 ioc->non_operational_loop = 0; in _base_fault_reset_work()
707 rc = mpt3sas_base_hard_reset_handler(ioc, FORCE_BIG_HAMMER); in _base_fault_reset_work()
708 ioc_warn(ioc, "%s: hard reset: %s\n", in _base_fault_reset_work()
710 doorbell = mpt3sas_base_get_iocstate(ioc, 0); in _base_fault_reset_work()
712 mpt3sas_print_fault_code(ioc, doorbell & in _base_fault_reset_work()
716 mpt3sas_print_coredump_info(ioc, doorbell & in _base_fault_reset_work()
722 ioc->ioc_coredump_loop = 0; in _base_fault_reset_work()
724 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
726 if (ioc->fault_reset_work_q) in _base_fault_reset_work()
727 queue_delayed_work(ioc->fault_reset_work_q, in _base_fault_reset_work()
728 &ioc->fault_reset_work, in _base_fault_reset_work()
730 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
740 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_start_watchdog() argument
744 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
749 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); in mpt3sas_base_start_watchdog()
750 snprintf(ioc->fault_reset_work_q_name, in mpt3sas_base_start_watchdog()
751 sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status", in mpt3sas_base_start_watchdog()
752 ioc->driver_name, ioc->id); in mpt3sas_base_start_watchdog()
753 ioc->fault_reset_work_q = in mpt3sas_base_start_watchdog()
754 create_singlethread_workqueue(ioc->fault_reset_work_q_name); in mpt3sas_base_start_watchdog()
755 if (!ioc->fault_reset_work_q) { in mpt3sas_base_start_watchdog()
756 ioc_err(ioc, "%s: failed (line=%d)\n", __func__, __LINE__); in mpt3sas_base_start_watchdog()
759 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
760 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
761 queue_delayed_work(ioc->fault_reset_work_q, in mpt3sas_base_start_watchdog()
762 &ioc->fault_reset_work, in mpt3sas_base_start_watchdog()
764 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
774 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_stop_watchdog() argument
779 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
780 wq = ioc->fault_reset_work_q; in mpt3sas_base_stop_watchdog()
781 ioc->fault_reset_work_q = NULL; in mpt3sas_base_stop_watchdog()
782 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
784 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) in mpt3sas_base_stop_watchdog()
796 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code) in mpt3sas_base_fault_info() argument
798 ioc_err(ioc, "fault_state(0x%04x)!\n", fault_code); in mpt3sas_base_fault_info()
809 mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code) in mpt3sas_base_coredump_info() argument
811 ioc_err(ioc, "coredump_state(0x%04x)!\n", fault_code); in mpt3sas_base_coredump_info()
823 mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_wait_for_coredump_completion() argument
826 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in mpt3sas_base_wait_for_coredump_completion()
827 ioc->manu_pg11.CoreDumpTOSec : in mpt3sas_base_wait_for_coredump_completion()
830 int ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_FAULT, in mpt3sas_base_wait_for_coredump_completion()
834 ioc_err(ioc, in mpt3sas_base_wait_for_coredump_completion()
838 ioc_info(ioc, in mpt3sas_base_wait_for_coredump_completion()
855 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_halt_firmware() argument
859 if (!ioc->fwfault_debug) in mpt3sas_halt_firmware()
864 doorbell = ioc->base_readl(&ioc->chip->Doorbell); in mpt3sas_halt_firmware()
866 mpt3sas_print_fault_code(ioc, doorbell & in mpt3sas_halt_firmware()
870 mpt3sas_print_coredump_info(ioc, doorbell & in mpt3sas_halt_firmware()
873 writel(0xC0FFEE00, &ioc->chip->Doorbell); in mpt3sas_halt_firmware()
874 ioc_err(ioc, "Firmware is halted due to command timeout\n"); in mpt3sas_halt_firmware()
877 if (ioc->fwfault_debug == 2) in mpt3sas_halt_firmware()
891 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, in _base_sas_ioc_info() argument
1063 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1087 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1092 ioc->sge_size; in _base_sas_ioc_info()
1101 ioc_warn(ioc, "ioc_status: %s(0x%04x), request(0x%p),(%s)\n", in _base_sas_ioc_info()
1113 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc, in _base_display_event_data() argument
1119 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) in _base_display_event_data()
1141 if (!ioc->hide_ir_msg) in _base_display_event_data()
1148 ioc_info(ioc, "Discovery: (%s)", in _base_display_event_data()
1173 if (!ioc->hide_ir_msg) in _base_display_event_data()
1177 if (!ioc->hide_ir_msg) in _base_display_event_data()
1181 if (!ioc->hide_ir_msg) in _base_display_event_data()
1185 if (!ioc->hide_ir_msg) in _base_display_event_data()
1204 ioc_info(ioc, "PCIE Enumeration: (%s)", in _base_display_event_data()
1221 ioc_info(ioc, "%s\n", desc); in _base_display_event_data()
1230 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info) in _base_sas_log_info() argument
1253 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == in _base_sas_log_info()
1265 if (!ioc->hide_ir_msg) in _base_sas_log_info()
1272 ioc_warn(ioc, "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n", in _base_sas_log_info()
1285 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, in _base_display_reply_info() argument
1292 mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply); in _base_display_reply_info()
1294 ioc_err(ioc, "mpi_reply not valid at %s:%d/%s()!\n", in _base_display_reply_info()
1301 (ioc->logging_level & MPT_DEBUG_REPLY)) { in _base_display_reply_info()
1302 _base_sas_ioc_info(ioc , mpi_reply, in _base_display_reply_info()
1303 mpt3sas_base_get_msg_frame(ioc, smid)); in _base_display_reply_info()
1308 _base_sas_log_info(ioc, loginfo); in _base_display_reply_info()
1313 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo); in _base_display_reply_info()
1329 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, in mpt3sas_base_done() argument
1334 mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply); in mpt3sas_base_done()
1336 return mpt3sas_check_for_pending_internal_cmds(ioc, smid); in mpt3sas_base_done()
1338 if (ioc->base_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_base_done()
1341 ioc->base_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_base_done()
1343 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_base_done()
1344 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_base_done()
1346 ioc->base_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_base_done()
1348 complete(&ioc->base_cmds.done); in mpt3sas_base_done()
1363 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply) in _base_async_event() argument
1370 mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply); in _base_async_event()
1376 _base_display_event_data(ioc, mpi_reply); in _base_async_event()
1380 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_async_event()
1390 &ioc->delayed_event_ack_list); in _base_async_event()
1391 dewtprintk(ioc, in _base_async_event()
1392 ioc_info(ioc, "DELAYED: EVENT ACK: event (0x%04x)\n", in _base_async_event()
1397 ack_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_async_event()
1404 ioc->put_smid_default(ioc, smid); in _base_async_event()
1409 mpt3sas_scsih_event_callback(ioc, msix_index, reply); in _base_async_event()
1412 mpt3sas_ctl_event_callback(ioc, msix_index, reply); in _base_async_event()
1418 _get_st_from_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _get_st_from_smid() argument
1423 WARN_ON(smid >= ioc->hi_priority_smid)) in _get_st_from_smid()
1426 cmd = mpt3sas_scsih_scsi_lookup_get(ioc, smid); in _get_st_from_smid()
1441 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_get_cb_idx() argument
1444 u16 ctl_smid = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT + 1; in _base_get_cb_idx()
1447 if (smid < ioc->hi_priority_smid) { in _base_get_cb_idx()
1451 st = _get_st_from_smid(ioc, smid); in _base_get_cb_idx()
1455 cb_idx = ioc->ctl_cb_idx; in _base_get_cb_idx()
1456 } else if (smid < ioc->internal_smid) { in _base_get_cb_idx()
1457 i = smid - ioc->hi_priority_smid; in _base_get_cb_idx()
1458 cb_idx = ioc->hpr_lookup[i].cb_idx; in _base_get_cb_idx()
1459 } else if (smid <= ioc->hba_queue_depth) { in _base_get_cb_idx()
1460 i = smid - ioc->internal_smid; in _base_get_cb_idx()
1461 cb_idx = ioc->internal_lookup[i].cb_idx; in _base_get_cb_idx()
1473 mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_mask_interrupts() argument
1477 ioc->mask_interrupts = 1; in mpt3sas_base_mask_interrupts()
1478 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1480 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1481 ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1491 mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_unmask_interrupts() argument
1495 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1497 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1498 ioc->mask_interrupts = 0; in mpt3sas_base_unmask_interrupts()
1537 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_process_reply_queue() local
1566 cb_idx = _base_get_cb_idx(ioc, smid); in _base_process_reply_queue()
1569 rc = mpt_callbacks[cb_idx](ioc, smid, in _base_process_reply_queue()
1572 mpt3sas_base_free_smid(ioc, smid); in _base_process_reply_queue()
1578 if (reply > ioc->reply_dma_max_address || in _base_process_reply_queue()
1579 reply < ioc->reply_dma_min_address) in _base_process_reply_queue()
1582 cb_idx = _base_get_cb_idx(ioc, smid); in _base_process_reply_queue()
1585 rc = mpt_callbacks[cb_idx](ioc, smid, in _base_process_reply_queue()
1588 _base_display_reply_info(ioc, in _base_process_reply_queue()
1591 mpt3sas_base_free_smid(ioc, in _base_process_reply_queue()
1595 _base_async_event(ioc, msix_index, reply); in _base_process_reply_queue()
1600 ioc->reply_free_host_index = in _base_process_reply_queue()
1601 (ioc->reply_free_host_index == in _base_process_reply_queue()
1602 (ioc->reply_free_queue_depth - 1)) ? in _base_process_reply_queue()
1603 0 : ioc->reply_free_host_index + 1; in _base_process_reply_queue()
1604 ioc->reply_free[ioc->reply_free_host_index] = in _base_process_reply_queue()
1606 if (ioc->is_mcpu_endpoint) in _base_process_reply_queue()
1607 _base_clone_reply_to_sys_mem(ioc, in _base_process_reply_queue()
1609 ioc->reply_free_host_index); in _base_process_reply_queue()
1610 writel(ioc->reply_free_host_index, in _base_process_reply_queue()
1611 &ioc->chip->ReplyFreeHostIndex); in _base_process_reply_queue()
1618 (ioc->reply_post_queue_depth - 1)) ? 0 : in _base_process_reply_queue()
1629 if (completed_cmds >= ioc->thresh_hold) { in _base_process_reply_queue()
1630 if (ioc->combined_reply_queue) { in _base_process_reply_queue()
1634 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1639 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1663 if (ioc->is_warpdrive) { in _base_process_reply_queue()
1665 ioc->reply_post_host_index[msix_index]); in _base_process_reply_queue()
1685 if (ioc->combined_reply_queue) in _base_process_reply_queue()
1688 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1692 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1708 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_interrupt() local
1710 if (ioc->mask_interrupts) in _base_interrupt()
1762 _base_init_irqpolls(struct MPT3SAS_ADAPTER *ioc) in _base_init_irqpolls() argument
1766 if (list_empty(&ioc->reply_queue_list)) in _base_init_irqpolls()
1769 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in _base_init_irqpolls()
1771 ioc->hba_queue_depth/4, _base_irqpoll); in _base_init_irqpolls()
1774 reply_q->os_irq = pci_irq_vector(ioc->pdev, in _base_init_irqpolls()
1786 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc) in _base_is_controller_msix_enabled() argument
1788 return (ioc->facts.IOCCapabilities & in _base_is_controller_msix_enabled()
1789 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; in _base_is_controller_msix_enabled()
1802 mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll) in mpt3sas_base_sync_reply_irqs() argument
1809 if (!_base_is_controller_msix_enabled(ioc)) in mpt3sas_base_sync_reply_irqs()
1812 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_sync_reply_irqs()
1813 if (ioc->shost_recovery || ioc->remove_host || in mpt3sas_base_sync_reply_irqs()
1814 ioc->pci_error_recovery) in mpt3sas_base_sync_reply_irqs()
1819 synchronize_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_sync_reply_irqs()
1893 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr) in _base_build_zero_len_sge() argument
1899 ioc->base_add_sg_single(paddr, flags_length, -1); in _base_build_zero_len_sge()
1946 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, in _base_get_chain_buffer_tracker() argument
1953 atomic_read(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
1955 if (chain_offset == ioc->chains_needed_per_io) in _base_get_chain_buffer_tracker()
1958 chain_req = &ioc->chain_lookup[smid - 1].chains_per_smid[chain_offset]; in _base_get_chain_buffer_tracker()
1959 atomic_inc(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
1974 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge, in _base_build_sg() argument
1981 _base_build_zero_len_sge(ioc, psge); in _base_build_sg()
1990 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
1994 psge += ioc->sge_size; in _base_build_sg()
2001 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2008 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2015 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2077 _base_build_nvme_prp(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_build_nvme_prp() argument
2105 prp_page = (__le64 *)mpt3sas_base_get_pcie_sgl(ioc, smid); in _base_build_nvme_prp()
2106 prp_page_dma = mpt3sas_base_get_pcie_sgl_dma(ioc, smid); in _base_build_nvme_prp()
2112 page_mask = ioc->page_size - 1; in _base_build_nvme_prp()
2162 entry_len = ioc->page_size - offset; in _base_build_nvme_prp()
2182 if (length > ioc->page_size) { in _base_build_nvme_prp()
2244 base_make_prp_nvme(struct MPT3SAS_ADAPTER *ioc, in base_make_prp_nvme() argument
2259 nvme_pg_size = max_t(u32, ioc->page_size, NVME_PRP_PAGE_SIZE); in base_make_prp_nvme()
2298 curr_buff = mpt3sas_base_get_pcie_sgl(ioc, smid); in base_make_prp_nvme()
2299 msg_dma = mpt3sas_base_get_pcie_sgl_dma(ioc, smid); in base_make_prp_nvme()
2371 base_is_prp_possible(struct MPT3SAS_ADAPTER *ioc, in base_is_prp_possible() argument
2409 _base_check_pcie_native_sgl(struct MPT3SAS_ADAPTER *ioc, in _base_check_pcie_native_sgl() argument
2425 if (base_is_prp_possible(ioc, pcie_device, in _base_check_pcie_native_sgl()
2434 base_make_prp_nvme(ioc, scmd, mpi_request, in _base_check_pcie_native_sgl()
2473 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr) in _base_build_zero_len_sge_ieee() argument
2497 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc, in _base_build_sg_scmd() argument
2514 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_build_sg_scmd()
2537 sges_in_segment = ioc->max_sges_in_main_message; in _base_build_sg_scmd()
2542 (sges_in_segment * ioc->sge_size))/4; in _base_build_sg_scmd()
2547 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2551 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2554 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2561 chain_req = _base_get_chain_buffer_tracker(ioc, scmd); in _base_build_sg_scmd()
2568 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd()
2569 ioc->max_sges_in_chain_message; in _base_build_sg_scmd()
2571 0 : (sges_in_segment * ioc->sge_size)/4; in _base_build_sg_scmd()
2572 chain_length = sges_in_segment * ioc->sge_size; in _base_build_sg_scmd()
2576 chain_length += ioc->sge_size; in _base_build_sg_scmd()
2578 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset | in _base_build_sg_scmd()
2587 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2592 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2596 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2601 chain_req = _base_get_chain_buffer_tracker(ioc, scmd); in _base_build_sg_scmd()
2614 ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer | in _base_build_sg_scmd()
2617 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2620 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2642 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc, in _base_build_sg_scmd_ieee() argument
2658 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_build_sg_scmd_ieee()
2669 if ((pcie_device) && (_base_check_pcie_native_sgl(ioc, mpi_request, in _base_build_sg_scmd_ieee()
2685 sges_in_segment = (ioc->request_sz - in _base_build_sg_scmd_ieee()
2686 offsetof(Mpi25SCSIIORequest_t, SGL))/ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2691 (offsetof(Mpi25SCSIIORequest_t, SGL)/ioc->sge_size_ieee); in _base_build_sg_scmd_ieee()
2698 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2704 chain_req = _base_get_chain_buffer_tracker(ioc, scmd); in _base_build_sg_scmd_ieee()
2711 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd_ieee()
2712 ioc->max_sges_in_chain_message; in _base_build_sg_scmd_ieee()
2715 chain_length = sges_in_segment * ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2717 chain_length += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2730 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2735 chain_req = _base_get_chain_buffer_tracker(ioc, scmd); in _base_build_sg_scmd_ieee()
2755 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2772 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge, in _base_build_sg_ieee() argument
2779 _base_build_zero_len_sge_ieee(ioc, psge); in _base_build_sg_ieee()
2791 psge += ioc->sge_size_ieee; in _base_build_sg_ieee()
2822 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev) in _base_config_dma_addressing() argument
2826 if (ioc->is_mcpu_endpoint || in _base_config_dma_addressing()
2827 sizeof(dma_addr_t) == 4 || ioc->use_32bit_dma || in _base_config_dma_addressing()
2829 ioc->dma_mask = 32; in _base_config_dma_addressing()
2831 else if (ioc->hba_mpi_version_belonged > MPI2_VERSION) in _base_config_dma_addressing()
2832 ioc->dma_mask = 63; in _base_config_dma_addressing()
2834 ioc->dma_mask = 64; in _base_config_dma_addressing()
2836 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(ioc->dma_mask)) || in _base_config_dma_addressing()
2837 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(ioc->dma_mask))) in _base_config_dma_addressing()
2840 if (ioc->dma_mask > 32) { in _base_config_dma_addressing()
2841 ioc->base_add_sg_single = &_base_add_sg_single_64; in _base_config_dma_addressing()
2842 ioc->sge_size = sizeof(Mpi2SGESimple64_t); in _base_config_dma_addressing()
2844 ioc->base_add_sg_single = &_base_add_sg_single_32; in _base_config_dma_addressing()
2845 ioc->sge_size = sizeof(Mpi2SGESimple32_t); in _base_config_dma_addressing()
2849 ioc_info(ioc, "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n", in _base_config_dma_addressing()
2850 ioc->dma_mask, convert_to_kb(s.totalram)); in _base_config_dma_addressing()
2863 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc) in _base_check_enable_msix() argument
2871 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && in _base_check_enable_msix()
2872 ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) { in _base_check_enable_msix()
2876 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); in _base_check_enable_msix()
2878 dfailprintk(ioc, ioc_info(ioc, "msix not supported\n")); in _base_check_enable_msix()
2884 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || in _base_check_enable_msix()
2885 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || in _base_check_enable_msix()
2886 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || in _base_check_enable_msix()
2887 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || in _base_check_enable_msix()
2888 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || in _base_check_enable_msix()
2889 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || in _base_check_enable_msix()
2890 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) in _base_check_enable_msix()
2891 ioc->msix_vector_count = 1; in _base_check_enable_msix()
2893 pci_read_config_word(ioc->pdev, base + 2, &message_control); in _base_check_enable_msix()
2894 ioc->msix_vector_count = (message_control & 0x3FF) + 1; in _base_check_enable_msix()
2896 dinitprintk(ioc, ioc_info(ioc, "msix is supported, vector_count(%d)\n", in _base_check_enable_msix()
2897 ioc->msix_vector_count)); in _base_check_enable_msix()
2908 _base_free_irq(struct MPT3SAS_ADAPTER *ioc) in _base_free_irq() argument
2912 if (list_empty(&ioc->reply_queue_list)) in _base_free_irq()
2915 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in _base_free_irq()
2917 if (ioc->smp_affinity_enable) in _base_free_irq()
2918 irq_set_affinity_hint(pci_irq_vector(ioc->pdev, in _base_free_irq()
2920 free_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index), in _base_free_irq()
2934 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index) in _base_request_irq() argument
2936 struct pci_dev *pdev = ioc->pdev; in _base_request_irq()
2942 ioc_err(ioc, "unable to allocate memory %zu!\n", in _base_request_irq()
2946 reply_q->ioc = ioc; in _base_request_irq()
2950 if (ioc->msix_enable) in _base_request_irq()
2952 ioc->driver_name, ioc->id, index); in _base_request_irq()
2955 ioc->driver_name, ioc->id); in _base_request_irq()
2966 list_add_tail(&reply_q->list, &ioc->reply_queue_list); in _base_request_irq()
2980 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc) in _base_assign_reply_queues() argument
2986 if (!_base_is_controller_msix_enabled(ioc)) in _base_assign_reply_queues()
2989 if (ioc->msix_load_balance) in _base_assign_reply_queues()
2992 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); in _base_assign_reply_queues()
2995 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, in _base_assign_reply_queues()
2996 ioc->facts.MaxMSIxVectors); in _base_assign_reply_queues()
3000 if (ioc->smp_affinity_enable) { in _base_assign_reply_queues()
3006 if (ioc->high_iops_queues) { in _base_assign_reply_queues()
3007 local_numa_node = dev_to_node(&ioc->pdev->dev); in _base_assign_reply_queues()
3008 for (index = 0; index < ioc->high_iops_queues; in _base_assign_reply_queues()
3010 irq_set_affinity_hint(pci_irq_vector(ioc->pdev, in _base_assign_reply_queues()
3015 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3018 if (reply_q->msix_index < ioc->high_iops_queues) in _base_assign_reply_queues()
3021 mask = pci_irq_get_affinity(ioc->pdev, in _base_assign_reply_queues()
3024 ioc_warn(ioc, "no affinity for msi %x\n", in _base_assign_reply_queues()
3030 if (cpu >= ioc->cpu_msix_table_sz) in _base_assign_reply_queues()
3032 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3040 nr_msix -= ioc->high_iops_queues; in _base_assign_reply_queues()
3043 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3046 if (reply_q->msix_index < ioc->high_iops_queues) in _base_assign_reply_queues()
3056 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3078 _base_check_and_enable_high_iops_queues(struct MPT3SAS_ADAPTER *ioc, in _base_check_and_enable_high_iops_queues() argument
3085 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3091 pcie_capability_read_word(ioc->pdev, PCI_EXP_LNKSTA, &lnksta); in _base_check_and_enable_high_iops_queues()
3095 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3100 if (!reset_devices && ioc->is_aero_ioc && in _base_check_and_enable_high_iops_queues()
3104 ioc->high_iops_queues = MPT3SAS_HIGH_IOPS_REPLY_QUEUES; in _base_check_and_enable_high_iops_queues()
3106 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3115 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc) in _base_disable_msix() argument
3117 if (!ioc->msix_enable) in _base_disable_msix()
3119 pci_free_irq_vectors(ioc->pdev); in _base_disable_msix()
3120 ioc->msix_enable = 0; in _base_disable_msix()
3129 _base_alloc_irq_vectors(struct MPT3SAS_ADAPTER *ioc) in _base_alloc_irq_vectors() argument
3132 struct irq_affinity desc = { .pre_vectors = ioc->high_iops_queues }; in _base_alloc_irq_vectors()
3135 if (ioc->smp_affinity_enable) in _base_alloc_irq_vectors()
3140 ioc_info(ioc, " %d %d\n", ioc->high_iops_queues, in _base_alloc_irq_vectors()
3141 ioc->reply_queue_count); in _base_alloc_irq_vectors()
3143 i = pci_alloc_irq_vectors_affinity(ioc->pdev, in _base_alloc_irq_vectors()
3144 ioc->high_iops_queues, in _base_alloc_irq_vectors()
3145 ioc->reply_queue_count, irq_flags, descp); in _base_alloc_irq_vectors()
3156 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc) in _base_enable_msix() argument
3162 ioc->msix_load_balance = false; in _base_enable_msix()
3170 if (_base_check_enable_msix(ioc) != 0) in _base_enable_msix()
3173 ioc_info(ioc, "MSI-X vectors supported: %d\n", ioc->msix_vector_count); in _base_enable_msix()
3175 ioc->cpu_count, max_msix_vectors); in _base_enable_msix()
3176 if (ioc->is_aero_ioc) in _base_enable_msix()
3177 _base_check_and_enable_high_iops_queues(ioc, in _base_enable_msix()
3178 ioc->msix_vector_count); in _base_enable_msix()
3179 ioc->reply_queue_count = in _base_enable_msix()
3180 min_t(int, ioc->cpu_count + ioc->high_iops_queues, in _base_enable_msix()
3181 ioc->msix_vector_count); in _base_enable_msix()
3183 if (!ioc->rdpq_array_enable && max_msix_vectors == -1) in _base_enable_msix()
3189 ioc->reply_queue_count = min_t(int, local_max_msix_vectors, in _base_enable_msix()
3190 ioc->reply_queue_count); in _base_enable_msix()
3198 if (!ioc->combined_reply_queue && in _base_enable_msix()
3199 ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_enable_msix()
3200 ioc_info(ioc, in _base_enable_msix()
3202 ioc->msix_load_balance = true; in _base_enable_msix()
3209 if (ioc->msix_load_balance) in _base_enable_msix()
3210 ioc->smp_affinity_enable = 0; in _base_enable_msix()
3212 r = _base_alloc_irq_vectors(ioc); in _base_enable_msix()
3214 ioc_info(ioc, "pci_alloc_irq_vectors failed (r=%d) !!!\n", r); in _base_enable_msix()
3218 ioc->msix_enable = 1; in _base_enable_msix()
3219 ioc->reply_queue_count = r; in _base_enable_msix()
3220 for (i = 0; i < ioc->reply_queue_count; i++) { in _base_enable_msix()
3221 r = _base_request_irq(ioc, i); in _base_enable_msix()
3223 _base_free_irq(ioc); in _base_enable_msix()
3224 _base_disable_msix(ioc); in _base_enable_msix()
3229 ioc_info(ioc, "High IOPs queues : %s\n", in _base_enable_msix()
3230 ioc->high_iops_queues ? "enabled" : "disabled"); in _base_enable_msix()
3236 ioc->high_iops_queues = 0; in _base_enable_msix()
3237 ioc_info(ioc, "High IOPs queues : disabled\n"); in _base_enable_msix()
3238 ioc->reply_queue_count = 1; in _base_enable_msix()
3239 r = pci_alloc_irq_vectors(ioc->pdev, 1, 1, PCI_IRQ_LEGACY); in _base_enable_msix()
3241 dfailprintk(ioc, in _base_enable_msix()
3242 ioc_info(ioc, "pci_alloc_irq_vector(legacy) failed (r=%d) !!!\n", in _base_enable_msix()
3245 r = _base_request_irq(ioc, 0); in _base_enable_msix()
3255 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_unmap_resources() argument
3257 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_unmap_resources()
3259 dexitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_unmap_resources()
3261 _base_free_irq(ioc); in mpt3sas_base_unmap_resources()
3262 _base_disable_msix(ioc); in mpt3sas_base_unmap_resources()
3264 kfree(ioc->replyPostRegisterIndex); in mpt3sas_base_unmap_resources()
3265 ioc->replyPostRegisterIndex = NULL; in mpt3sas_base_unmap_resources()
3268 if (ioc->chip_phys) { in mpt3sas_base_unmap_resources()
3269 iounmap(ioc->chip); in mpt3sas_base_unmap_resources()
3270 ioc->chip_phys = 0; in mpt3sas_base_unmap_resources()
3274 pci_release_selected_regions(ioc->pdev, ioc->bars); in mpt3sas_base_unmap_resources()
3281 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc);
3291 _base_check_for_fault_and_issue_reset(struct MPT3SAS_ADAPTER *ioc) in _base_check_for_fault_and_issue_reset() argument
3296 dinitprintk(ioc, pr_info("%s\n", __func__)); in _base_check_for_fault_and_issue_reset()
3297 if (ioc->pci_error_recovery) in _base_check_for_fault_and_issue_reset()
3299 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in _base_check_for_fault_and_issue_reset()
3300 dhsprintk(ioc, pr_info("%s: ioc_state(0x%08x)\n", __func__, ioc_state)); in _base_check_for_fault_and_issue_reset()
3303 mpt3sas_print_fault_code(ioc, ioc_state & in _base_check_for_fault_and_issue_reset()
3305 rc = _base_diag_reset(ioc); in _base_check_for_fault_and_issue_reset()
3308 mpt3sas_print_coredump_info(ioc, ioc_state & in _base_check_for_fault_and_issue_reset()
3310 mpt3sas_base_wait_for_coredump_completion(ioc, __func__); in _base_check_for_fault_and_issue_reset()
3311 rc = _base_diag_reset(ioc); in _base_check_for_fault_and_issue_reset()
3324 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_map_resources() argument
3326 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_map_resources()
3334 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_map_resources()
3336 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); in mpt3sas_base_map_resources()
3338 ioc_warn(ioc, "pci_enable_device_mem: failed\n"); in mpt3sas_base_map_resources()
3339 ioc->bars = 0; in mpt3sas_base_map_resources()
3344 if (pci_request_selected_regions(pdev, ioc->bars, in mpt3sas_base_map_resources()
3345 ioc->driver_name)) { in mpt3sas_base_map_resources()
3346 ioc_warn(ioc, "pci_request_selected_regions: failed\n"); in mpt3sas_base_map_resources()
3347 ioc->bars = 0; in mpt3sas_base_map_resources()
3358 if (_base_config_dma_addressing(ioc, pdev) != 0) { in mpt3sas_base_map_resources()
3359 ioc_warn(ioc, "no suitable DMA mask for %s\n", pci_name(pdev)); in mpt3sas_base_map_resources()
3374 ioc->chip_phys = pci_resource_start(pdev, i); in mpt3sas_base_map_resources()
3375 chip_phys = ioc->chip_phys; in mpt3sas_base_map_resources()
3377 ioc->chip = ioremap(ioc->chip_phys, memap_sz); in mpt3sas_base_map_resources()
3381 if (ioc->chip == NULL) { in mpt3sas_base_map_resources()
3382 ioc_err(ioc, in mpt3sas_base_map_resources()
3388 mpt3sas_base_mask_interrupts(ioc); in mpt3sas_base_map_resources()
3390 r = _base_get_ioc_facts(ioc); in mpt3sas_base_map_resources()
3392 rc = _base_check_for_fault_and_issue_reset(ioc); in mpt3sas_base_map_resources()
3393 if (rc || (_base_get_ioc_facts(ioc))) in mpt3sas_base_map_resources()
3397 if (!ioc->rdpq_array_enable_assigned) { in mpt3sas_base_map_resources()
3398 ioc->rdpq_array_enable = ioc->rdpq_array_capable; in mpt3sas_base_map_resources()
3399 ioc->rdpq_array_enable_assigned = 1; in mpt3sas_base_map_resources()
3402 r = _base_enable_msix(ioc); in mpt3sas_base_map_resources()
3406 if (!ioc->is_driver_loading) in mpt3sas_base_map_resources()
3407 _base_init_irqpolls(ioc); in mpt3sas_base_map_resources()
3411 if (ioc->combined_reply_queue) { in mpt3sas_base_map_resources()
3418 ioc->replyPostRegisterIndex = kcalloc( in mpt3sas_base_map_resources()
3419 ioc->combined_reply_index_count, in mpt3sas_base_map_resources()
3421 if (!ioc->replyPostRegisterIndex) { in mpt3sas_base_map_resources()
3422 ioc_err(ioc, in mpt3sas_base_map_resources()
3428 for (i = 0; i < ioc->combined_reply_index_count; i++) { in mpt3sas_base_map_resources()
3429 ioc->replyPostRegisterIndex[i] = (resource_size_t *) in mpt3sas_base_map_resources()
3430 ((u8 __force *)&ioc->chip->Doorbell + in mpt3sas_base_map_resources()
3436 if (ioc->is_warpdrive) { in mpt3sas_base_map_resources()
3437 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) in mpt3sas_base_map_resources()
3438 &ioc->chip->ReplyPostHostIndex; in mpt3sas_base_map_resources()
3440 for (i = 1; i < ioc->cpu_msix_table_sz; i++) in mpt3sas_base_map_resources()
3441 ioc->reply_post_host_index[i] = in mpt3sas_base_map_resources()
3443 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) in mpt3sas_base_map_resources()
3447 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) in mpt3sas_base_map_resources()
3450 ioc->msix_enable ? "PCI-MSI-X" : "IO-APIC", in mpt3sas_base_map_resources()
3451 pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_map_resources()
3453 ioc_info(ioc, "iomem(%pap), mapped(0x%p), size(%d)\n", in mpt3sas_base_map_resources()
3454 &chip_phys, ioc->chip, memap_sz); in mpt3sas_base_map_resources()
3455 ioc_info(ioc, "ioport(0x%016llx), size(%d)\n", in mpt3sas_base_map_resources()
3463 mpt3sas_base_unmap_resources(ioc); in mpt3sas_base_map_resources()
3475 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_get_msg_frame() argument
3477 return (void *)(ioc->request + (smid * ioc->request_sz)); in mpt3sas_base_get_msg_frame()
3488 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_get_sense_buffer() argument
3490 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); in mpt3sas_base_get_sense_buffer()
3501 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_get_sense_buffer_dma() argument
3503 return cpu_to_le32(ioc->sense_dma + ((smid - 1) * in mpt3sas_base_get_sense_buffer_dma()
3515 mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_get_pcie_sgl() argument
3517 return (void *)(ioc->pcie_sg_lookup[smid - 1].pcie_sgl); in mpt3sas_base_get_pcie_sgl()
3528 mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_get_pcie_sgl_dma() argument
3530 return ioc->pcie_sg_lookup[smid - 1].pcie_sgl_dma; in mpt3sas_base_get_pcie_sgl_dma()
3541 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr) in mpt3sas_base_get_reply_virt_addr() argument
3545 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); in mpt3sas_base_get_reply_virt_addr()
3558 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc, in _base_get_msix_index() argument
3562 if (ioc->msix_load_balance) in _base_get_msix_index()
3563 return ioc->reply_queue_count ? in _base_get_msix_index()
3565 &ioc->total_io_cnt), ioc->reply_queue_count) : 0; in _base_get_msix_index()
3567 return ioc->cpu_msix_table[raw_smp_processor_id()]; in _base_get_msix_index()
3597 _base_get_high_iops_msix_index(struct MPT3SAS_ADAPTER *ioc, in _base_get_high_iops_msix_index() argument
3608 atomic64_add_return(1, &ioc->high_iops_outstanding) / in _base_get_high_iops_msix_index()
3612 return _base_get_msix_index(ioc, scmd); in _base_get_high_iops_msix_index()
3623 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx) in mpt3sas_base_get_smid() argument
3629 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3630 if (list_empty(&ioc->internal_free_list)) { in mpt3sas_base_get_smid()
3631 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3632 ioc_err(ioc, "%s: smid not available\n", __func__); in mpt3sas_base_get_smid()
3636 request = list_entry(ioc->internal_free_list.next, in mpt3sas_base_get_smid()
3641 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3654 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, in mpt3sas_base_get_smid_scsiio() argument
3677 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx) in mpt3sas_base_get_smid_hpr() argument
3683 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3684 if (list_empty(&ioc->hpr_free_list)) { in mpt3sas_base_get_smid_hpr()
3685 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3689 request = list_entry(ioc->hpr_free_list.next, in mpt3sas_base_get_smid_hpr()
3694 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3699 _base_recovery_check(struct MPT3SAS_ADAPTER *ioc) in _base_recovery_check() argument
3704 if (ioc->shost_recovery && ioc->pending_io_count) { in _base_recovery_check()
3705 ioc->pending_io_count = scsi_host_busy(ioc->shost); in _base_recovery_check()
3706 if (ioc->pending_io_count == 0) in _base_recovery_check()
3707 wake_up(&ioc->reset_wq); in _base_recovery_check()
3711 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_clear_st() argument
3719 atomic_set(&ioc->chain_lookup[st->smid - 1].chain_offset, 0); in mpt3sas_base_clear_st()
3729 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_free_smid() argument
3734 if (smid < ioc->hi_priority_smid) { in mpt3sas_base_free_smid()
3738 st = _get_st_from_smid(ioc, smid); in mpt3sas_base_free_smid()
3740 _base_recovery_check(ioc); in mpt3sas_base_free_smid()
3745 request = mpt3sas_base_get_msg_frame(ioc, smid); in mpt3sas_base_free_smid()
3746 memset(request, 0, ioc->request_sz); in mpt3sas_base_free_smid()
3748 mpt3sas_base_clear_st(ioc, st); in mpt3sas_base_free_smid()
3749 _base_recovery_check(ioc); in mpt3sas_base_free_smid()
3753 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
3754 if (smid < ioc->internal_smid) { in mpt3sas_base_free_smid()
3756 i = smid - ioc->hi_priority_smid; in mpt3sas_base_free_smid()
3757 ioc->hpr_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
3758 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list); in mpt3sas_base_free_smid()
3759 } else if (smid <= ioc->hba_queue_depth) { in mpt3sas_base_free_smid()
3761 i = smid - ioc->internal_smid; in mpt3sas_base_free_smid()
3762 ioc->internal_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
3763 list_add(&ioc->internal_lookup[i].tracker_list, in mpt3sas_base_free_smid()
3764 &ioc->internal_free_list); in mpt3sas_base_free_smid()
3766 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
3826 _base_set_and_get_msix_index(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_set_and_get_msix_index() argument
3830 if (smid < ioc->hi_priority_smid) in _base_set_and_get_msix_index()
3831 st = _get_st_from_smid(ioc, smid); in _base_set_and_get_msix_index()
3834 return _base_get_msix_index(ioc, NULL); in _base_set_and_get_msix_index()
3836 st->msix_io = ioc->get_msix_index_for_smlio(ioc, st->scmd); in _base_set_and_get_msix_index()
3847 _base_put_smid_mpi_ep_scsi_io(struct MPT3SAS_ADAPTER *ioc, in _base_put_smid_mpi_ep_scsi_io() argument
3853 __le32 *mfp = (__le32 *)mpt3sas_base_get_msg_frame(ioc, smid); in _base_put_smid_mpi_ep_scsi_io()
3855 _clone_sg_entries(ioc, (void *) mfp, smid); in _base_put_smid_mpi_ep_scsi_io()
3856 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_mpi_ep_scsi_io()
3857 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
3859 ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
3861 descriptor.SCSIIO.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_mpi_ep_scsi_io()
3865 _base_mpi_ep_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_mpi_ep_scsi_io()
3866 &ioc->scsi_lookup_lock); in _base_put_smid_mpi_ep_scsi_io()
3876 _base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle) in _base_put_smid_scsi_io() argument
3883 descriptor.SCSIIO.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_scsi_io()
3887 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_scsi_io()
3888 &ioc->scsi_lookup_lock); in _base_put_smid_scsi_io()
3898 _base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_put_smid_fast_path() argument
3906 descriptor.SCSIIO.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_fast_path()
3910 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_fast_path()
3911 &ioc->scsi_lookup_lock); in _base_put_smid_fast_path()
3921 _base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_put_smid_hi_priority() argument
3928 if (ioc->is_mcpu_endpoint) { in _base_put_smid_hi_priority()
3929 __le32 *mfp = (__le32 *)mpt3sas_base_get_msg_frame(ioc, smid); in _base_put_smid_hi_priority()
3932 mpi_req_iomem = (void __force *)ioc->chip in _base_put_smid_hi_priority()
3934 + (smid * ioc->request_sz); in _base_put_smid_hi_priority()
3936 ioc->request_sz); in _base_put_smid_hi_priority()
3947 if (ioc->is_mcpu_endpoint) in _base_put_smid_hi_priority()
3949 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
3950 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
3952 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
3953 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
3963 mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid) in mpt3sas_base_put_smid_nvme_encap() argument
3970 descriptor.Default.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in mpt3sas_base_put_smid_nvme_encap()
3974 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in mpt3sas_base_put_smid_nvme_encap()
3975 &ioc->scsi_lookup_lock); in mpt3sas_base_put_smid_nvme_encap()
3984 _base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_put_smid_default() argument
3990 if (ioc->is_mcpu_endpoint) { in _base_put_smid_default()
3991 __le32 *mfp = (__le32 *)mpt3sas_base_get_msg_frame(ioc, smid); in _base_put_smid_default()
3993 _clone_sg_entries(ioc, (void *) mfp, smid); in _base_put_smid_default()
3995 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_default()
3996 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_default()
3998 ioc->request_sz); in _base_put_smid_default()
4002 descriptor.Default.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_default()
4006 if (ioc->is_mcpu_endpoint) in _base_put_smid_default()
4008 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4009 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4011 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4012 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4025 _base_put_smid_scsi_io_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_put_smid_scsi_io_atomic() argument
4032 descriptor.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_scsi_io_atomic()
4035 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_scsi_io_atomic()
4047 _base_put_smid_fast_path_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_put_smid_fast_path_atomic() argument
4054 descriptor.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_fast_path_atomic()
4057 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_fast_path_atomic()
4070 _base_put_smid_hi_priority_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid, in _base_put_smid_hi_priority_atomic() argument
4080 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_hi_priority_atomic()
4092 _base_put_smid_default_atomic(struct MPT3SAS_ADAPTER *ioc, u16 smid) in _base_put_smid_default_atomic() argument
4098 descriptor.MSIxIndex = _base_set_and_get_msix_index(ioc, smid); in _base_put_smid_default_atomic()
4101 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_default_atomic()
4109 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER *ioc) in _base_display_OEMs_branding() argument
4111 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) in _base_display_OEMs_branding()
4114 switch (ioc->pdev->subsystem_vendor) { in _base_display_OEMs_branding()
4116 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4118 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4120 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4124 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4128 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4132 ioc_info(ioc, "Intel(R) Controller: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4133 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4138 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4140 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4144 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4148 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4152 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4156 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4160 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4164 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4168 ioc_info(ioc, "Intel(R) Controller: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4169 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4174 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4176 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4181 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4185 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4189 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4193 ioc_info(ioc, "Intel(R) Controller: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4194 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4199 ioc_info(ioc, "Intel(R) Controller: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4200 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4205 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4207 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4209 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4213 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4217 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4221 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4225 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4229 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4233 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4237 ioc_info(ioc, "Dell 6Gbps HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4238 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4243 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4245 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4249 ioc_info(ioc, "Dell 12Gbps HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4250 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4255 ioc_info(ioc, "Dell HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4256 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4261 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4263 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4265 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4269 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4273 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4277 ioc_info(ioc, "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4278 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4283 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4285 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4289 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4293 ioc_info(ioc, "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4294 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4299 ioc_info(ioc, "Cisco SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4300 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4305 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4307 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4309 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4313 ioc_info(ioc, "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4314 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4319 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4321 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4325 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4329 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4333 ioc_info(ioc, "%s\n", in _base_display_OEMs_branding()
4337 ioc_info(ioc, "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4338 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4343 ioc_info(ioc, "HP SAS HBA: Subsystem ID: 0x%X\n", in _base_display_OEMs_branding()
4344 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4360 _base_display_fwpkg_version(struct MPT3SAS_ADAPTER *ioc) in _base_display_fwpkg_version() argument
4373 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_display_fwpkg_version()
4375 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_display_fwpkg_version()
4376 ioc_err(ioc, "%s: internal command already in use\n", __func__); in _base_display_fwpkg_version()
4381 fwpkg_data = dma_alloc_coherent(&ioc->pdev->dev, data_length, in _base_display_fwpkg_version()
4384 ioc_err(ioc, in _base_display_fwpkg_version()
4390 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_display_fwpkg_version()
4392 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in _base_display_fwpkg_version()
4397 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_display_fwpkg_version()
4398 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_display_fwpkg_version()
4399 ioc->base_cmds.smid = smid; in _base_display_fwpkg_version()
4404 ioc->build_sg(ioc, &mpi_request->SGL, 0, 0, fwpkg_data_dma, in _base_display_fwpkg_version()
4406 init_completion(&ioc->base_cmds.done); in _base_display_fwpkg_version()
4407 ioc->put_smid_default(ioc, smid); in _base_display_fwpkg_version()
4409 wait_for_completion_timeout(&ioc->base_cmds.done, in _base_display_fwpkg_version()
4411 ioc_info(ioc, "%s: complete\n", __func__); in _base_display_fwpkg_version()
4412 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_display_fwpkg_version()
4413 ioc_err(ioc, "%s: timeout\n", __func__); in _base_display_fwpkg_version()
4419 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_display_fwpkg_version()
4420 memcpy(&mpi_reply, ioc->base_cmds.reply, in _base_display_fwpkg_version()
4439 ioc_info(ioc, in _base_display_fwpkg_version()
4451 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_display_fwpkg_version()
4454 dma_free_coherent(&ioc->pdev->dev, data_length, fwpkg_data, in _base_display_fwpkg_version()
4464 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc) in _base_display_ioc_capabilities() argument
4471 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion); in _base_display_ioc_capabilities()
4472 strncpy(desc, ioc->manu_pg0.ChipName, 16); in _base_display_ioc_capabilities()
4473 …ioc_info(ioc, "%s: FWVersion(%02d.%02d.%02d.%02d), ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02… in _base_display_ioc_capabilities()
4475 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, in _base_display_ioc_capabilities()
4476 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, in _base_display_ioc_capabilities()
4477 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, in _base_display_ioc_capabilities()
4478 ioc->facts.FWVersion.Word & 0x000000FF, in _base_display_ioc_capabilities()
4479 ioc->pdev->revision, in _base_display_ioc_capabilities()
4485 _base_display_OEMs_branding(ioc); in _base_display_ioc_capabilities()
4487 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_display_ioc_capabilities()
4492 ioc_info(ioc, "Protocol=("); in _base_display_ioc_capabilities()
4494 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { in _base_display_ioc_capabilities()
4499 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { in _base_display_ioc_capabilities()
4507 if (!ioc->hide_ir_msg) { in _base_display_ioc_capabilities()
4508 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4515 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { in _base_display_ioc_capabilities()
4520 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { in _base_display_ioc_capabilities()
4525 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4531 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { in _base_display_ioc_capabilities()
4536 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4542 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4548 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4554 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4560 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_display_ioc_capabilities()
4580 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_update_missing_delay() argument
4591 mpt3sas_config_get_number_hba_phys(ioc, &num_phys); in mpt3sas_base_update_missing_delay()
4599 ioc_err(ioc, "failure at %s:%d/%s()!\n", in mpt3sas_base_update_missing_delay()
4603 if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply, in mpt3sas_base_update_missing_delay()
4605 ioc_err(ioc, "failure at %s:%d/%s()!\n", in mpt3sas_base_update_missing_delay()
4612 ioc_err(ioc, "failure at %s:%d/%s()!\n", in mpt3sas_base_update_missing_delay()
4637 if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1, in mpt3sas_base_update_missing_delay()
4645 ioc_info(ioc, "device_missing_delay: old(%d), new(%d)\n", in mpt3sas_base_update_missing_delay()
4647 ioc_info(ioc, "ioc_missing_delay: old(%d), new(%d)\n", in mpt3sas_base_update_missing_delay()
4650 ioc->device_missing_delay = dmd_new; in mpt3sas_base_update_missing_delay()
4651 ioc->io_missing_delay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4666 _base_update_ioc_page1_inlinewith_perf_mode(struct MPT3SAS_ADAPTER *ioc) in _base_update_ioc_page1_inlinewith_perf_mode() argument
4671 mpt3sas_config_get_ioc_pg1(ioc, &mpi_reply, &ioc->ioc_pg1_copy); in _base_update_ioc_page1_inlinewith_perf_mode()
4672 memcpy(&ioc_pg1, &ioc->ioc_pg1_copy, sizeof(Mpi2IOCPage1_t)); in _base_update_ioc_page1_inlinewith_perf_mode()
4677 if (ioc->high_iops_queues) { in _base_update_ioc_page1_inlinewith_perf_mode()
4678 ioc_info(ioc, in _base_update_ioc_page1_inlinewith_perf_mode()
4693 mpt3sas_config_set_ioc_pg1(ioc, &mpi_reply, &ioc_pg1); in _base_update_ioc_page1_inlinewith_perf_mode()
4694 ioc_info(ioc, "performance mode: balanced\n"); in _base_update_ioc_page1_inlinewith_perf_mode()
4706 mpt3sas_config_set_ioc_pg1(ioc, &mpi_reply, &ioc_pg1); in _base_update_ioc_page1_inlinewith_perf_mode()
4707 ioc_info(ioc, "performance mode: latency\n"); in _base_update_ioc_page1_inlinewith_perf_mode()
4713 ioc_info(ioc, in _base_update_ioc_page1_inlinewith_perf_mode()
4718 mpt3sas_config_set_ioc_pg1(ioc, &mpi_reply, &ioc_pg1); in _base_update_ioc_page1_inlinewith_perf_mode()
4728 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc) in _base_static_config_pages() argument
4733 ioc->nvme_abort_timeout = 30; in _base_static_config_pages()
4734 mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); in _base_static_config_pages()
4735 if (ioc->ir_firmware) in _base_static_config_pages()
4736 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply, in _base_static_config_pages()
4737 &ioc->manu_pg10); in _base_static_config_pages()
4743 mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11); in _base_static_config_pages()
4744 if (!ioc->is_gen35_ioc && ioc->manu_pg11.EEDPTagMode == 0) { in _base_static_config_pages()
4746 ioc->name); in _base_static_config_pages()
4747 ioc->manu_pg11.EEDPTagMode &= ~0x3; in _base_static_config_pages()
4748 ioc->manu_pg11.EEDPTagMode |= 0x1; in _base_static_config_pages()
4749 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply, in _base_static_config_pages()
4750 &ioc->manu_pg11); in _base_static_config_pages()
4752 if (ioc->manu_pg11.AddlFlags2 & NVME_TASK_MNGT_CUSTOM_MASK) in _base_static_config_pages()
4753 ioc->tm_custom_handling = 1; in _base_static_config_pages()
4755 ioc->tm_custom_handling = 0; in _base_static_config_pages()
4756 if (ioc->manu_pg11.NVMeAbortTO < NVME_TASK_ABORT_MIN_TIMEOUT) in _base_static_config_pages()
4757 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MIN_TIMEOUT; in _base_static_config_pages()
4758 else if (ioc->manu_pg11.NVMeAbortTO > in _base_static_config_pages()
4760 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MAX_TIMEOUT; in _base_static_config_pages()
4762 ioc->nvme_abort_timeout = ioc->manu_pg11.NVMeAbortTO; in _base_static_config_pages()
4765 mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); in _base_static_config_pages()
4766 mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); in _base_static_config_pages()
4767 mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); in _base_static_config_pages()
4768 mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); in _base_static_config_pages()
4769 mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
4770 mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8); in _base_static_config_pages()
4771 _base_display_ioc_capabilities(ioc); in _base_static_config_pages()
4777 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_static_config_pages()
4778 if ((ioc->facts.IOCCapabilities & in _base_static_config_pages()
4785 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); in _base_static_config_pages()
4786 mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
4788 if (ioc->iounit_pg8.NumSensors) in _base_static_config_pages()
4789 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors; in _base_static_config_pages()
4790 if (ioc->is_aero_ioc) in _base_static_config_pages()
4791 _base_update_ioc_page1_inlinewith_perf_mode(ioc); in _base_static_config_pages()
4801 mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_free_enclosure_list() argument
4807 enclosure_dev_next, &ioc->enclosure_list, list) { in mpt3sas_free_enclosure_list()
4820 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc) in _base_release_memory_pools() argument
4826 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in _base_release_memory_pools()
4828 dexitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_release_memory_pools()
4830 if (ioc->request) { in _base_release_memory_pools()
4831 dma_free_coherent(&ioc->pdev->dev, ioc->request_dma_sz, in _base_release_memory_pools()
4832 ioc->request, ioc->request_dma); in _base_release_memory_pools()
4833 dexitprintk(ioc, in _base_release_memory_pools()
4834 ioc_info(ioc, "request_pool(0x%p): free\n", in _base_release_memory_pools()
4835 ioc->request)); in _base_release_memory_pools()
4836 ioc->request = NULL; in _base_release_memory_pools()
4839 if (ioc->sense) { in _base_release_memory_pools()
4840 dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); in _base_release_memory_pools()
4841 dma_pool_destroy(ioc->sense_dma_pool); in _base_release_memory_pools()
4842 dexitprintk(ioc, in _base_release_memory_pools()
4843 ioc_info(ioc, "sense_pool(0x%p): free\n", in _base_release_memory_pools()
4844 ioc->sense)); in _base_release_memory_pools()
4845 ioc->sense = NULL; in _base_release_memory_pools()
4848 if (ioc->reply) { in _base_release_memory_pools()
4849 dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); in _base_release_memory_pools()
4850 dma_pool_destroy(ioc->reply_dma_pool); in _base_release_memory_pools()
4851 dexitprintk(ioc, in _base_release_memory_pools()
4852 ioc_info(ioc, "reply_pool(0x%p): free\n", in _base_release_memory_pools()
4853 ioc->reply)); in _base_release_memory_pools()
4854 ioc->reply = NULL; in _base_release_memory_pools()
4857 if (ioc->reply_free) { in _base_release_memory_pools()
4858 dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, in _base_release_memory_pools()
4859 ioc->reply_free_dma); in _base_release_memory_pools()
4860 dma_pool_destroy(ioc->reply_free_dma_pool); in _base_release_memory_pools()
4861 dexitprintk(ioc, in _base_release_memory_pools()
4862 ioc_info(ioc, "reply_free_pool(0x%p): free\n", in _base_release_memory_pools()
4863 ioc->reply_free)); in _base_release_memory_pools()
4864 ioc->reply_free = NULL; in _base_release_memory_pools()
4867 if (ioc->reply_post) { in _base_release_memory_pools()
4873 if (ioc->reply_post[i].reply_post_free) { in _base_release_memory_pools()
4875 ioc->reply_post_free_dma_pool, in _base_release_memory_pools()
4876 ioc->reply_post[i].reply_post_free, in _base_release_memory_pools()
4877 ioc->reply_post[i].reply_post_free_dma); in _base_release_memory_pools()
4878 dexitprintk(ioc, ioc_info(ioc, in _base_release_memory_pools()
4880 ioc->reply_post[i].reply_post_free)); in _base_release_memory_pools()
4881 ioc->reply_post[i].reply_post_free = in _base_release_memory_pools()
4887 dma_pool_destroy(ioc->reply_post_free_dma_pool); in _base_release_memory_pools()
4888 if (ioc->reply_post_free_array && in _base_release_memory_pools()
4889 ioc->rdpq_array_enable) { in _base_release_memory_pools()
4890 dma_pool_free(ioc->reply_post_free_array_dma_pool, in _base_release_memory_pools()
4891 ioc->reply_post_free_array, in _base_release_memory_pools()
4892 ioc->reply_post_free_array_dma); in _base_release_memory_pools()
4893 ioc->reply_post_free_array = NULL; in _base_release_memory_pools()
4895 dma_pool_destroy(ioc->reply_post_free_array_dma_pool); in _base_release_memory_pools()
4896 kfree(ioc->reply_post); in _base_release_memory_pools()
4899 if (ioc->pcie_sgl_dma_pool) { in _base_release_memory_pools()
4900 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
4901 dma_pool_free(ioc->pcie_sgl_dma_pool, in _base_release_memory_pools()
4902 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_release_memory_pools()
4903 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_release_memory_pools()
4904 ioc->pcie_sg_lookup[i].pcie_sgl = NULL; in _base_release_memory_pools()
4906 dma_pool_destroy(ioc->pcie_sgl_dma_pool); in _base_release_memory_pools()
4908 if (ioc->config_page) { in _base_release_memory_pools()
4909 dexitprintk(ioc, in _base_release_memory_pools()
4910 ioc_info(ioc, "config_page(0x%p): free\n", in _base_release_memory_pools()
4911 ioc->config_page)); in _base_release_memory_pools()
4912 dma_free_coherent(&ioc->pdev->dev, ioc->config_page_sz, in _base_release_memory_pools()
4913 ioc->config_page, ioc->config_page_dma); in _base_release_memory_pools()
4916 kfree(ioc->hpr_lookup); in _base_release_memory_pools()
4917 ioc->hpr_lookup = NULL; in _base_release_memory_pools()
4918 kfree(ioc->internal_lookup); in _base_release_memory_pools()
4919 ioc->internal_lookup = NULL; in _base_release_memory_pools()
4920 if (ioc->chain_lookup) { in _base_release_memory_pools()
4921 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
4922 for (j = ioc->chains_per_prp_buffer; in _base_release_memory_pools()
4923 j < ioc->chains_needed_per_io; j++) { in _base_release_memory_pools()
4924 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_release_memory_pools()
4926 dma_pool_free(ioc->chain_dma_pool, in _base_release_memory_pools()
4930 kfree(ioc->chain_lookup[i].chains_per_smid); in _base_release_memory_pools()
4932 dma_pool_destroy(ioc->chain_dma_pool); in _base_release_memory_pools()
4933 kfree(ioc->chain_lookup); in _base_release_memory_pools()
4934 ioc->chain_lookup = NULL; in _base_release_memory_pools()
4969 _base_reduce_hba_queue_depth(struct MPT3SAS_ADAPTER *ioc) in _base_reduce_hba_queue_depth() argument
4973 if ((ioc->hba_queue_depth - reduce_sz) > in _base_reduce_hba_queue_depth()
4974 (ioc->internal_depth + INTERNAL_SCSIIO_CMDS_COUNT)) { in _base_reduce_hba_queue_depth()
4975 ioc->hba_queue_depth -= reduce_sz; in _base_reduce_hba_queue_depth()
4991 _base_allocate_pcie_sgl_pool(struct MPT3SAS_ADAPTER *ioc, u32 sz) in _base_allocate_pcie_sgl_pool() argument
4996 ioc->pcie_sgl_dma_pool = in _base_allocate_pcie_sgl_pool()
4997 dma_pool_create("PCIe SGL pool", &ioc->pdev->dev, sz, in _base_allocate_pcie_sgl_pool()
4998 ioc->page_size, 0); in _base_allocate_pcie_sgl_pool()
4999 if (!ioc->pcie_sgl_dma_pool) { in _base_allocate_pcie_sgl_pool()
5000 ioc_err(ioc, "PCIe SGL pool: dma_pool_create failed\n"); in _base_allocate_pcie_sgl_pool()
5004 ioc->chains_per_prp_buffer = sz/ioc->chain_segment_sz; in _base_allocate_pcie_sgl_pool()
5005 ioc->chains_per_prp_buffer = in _base_allocate_pcie_sgl_pool()
5006 min(ioc->chains_per_prp_buffer, ioc->chains_needed_per_io); in _base_allocate_pcie_sgl_pool()
5007 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_pcie_sgl_pool()
5008 ioc->pcie_sg_lookup[i].pcie_sgl = in _base_allocate_pcie_sgl_pool()
5009 dma_pool_alloc(ioc->pcie_sgl_dma_pool, GFP_KERNEL, in _base_allocate_pcie_sgl_pool()
5010 &ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5011 if (!ioc->pcie_sg_lookup[i].pcie_sgl) { in _base_allocate_pcie_sgl_pool()
5012 ioc_err(ioc, "PCIe SGL pool: dma_pool_alloc failed\n"); in _base_allocate_pcie_sgl_pool()
5017 (long)ioc->pcie_sg_lookup[i].pcie_sgl, sz)) { in _base_allocate_pcie_sgl_pool()
5018 ioc_err(ioc, "PCIE SGLs are not in same 4G !! pcie sgl (0x%p) dma = (0x%llx)\n", in _base_allocate_pcie_sgl_pool()
5019 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_allocate_pcie_sgl_pool()
5021 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5022 ioc->use_32bit_dma = true; in _base_allocate_pcie_sgl_pool()
5026 for (j = 0; j < ioc->chains_per_prp_buffer; j++) { in _base_allocate_pcie_sgl_pool()
5027 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_pcie_sgl_pool()
5029 ioc->pcie_sg_lookup[i].pcie_sgl + in _base_allocate_pcie_sgl_pool()
5030 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5032 ioc->pcie_sg_lookup[i].pcie_sgl_dma + in _base_allocate_pcie_sgl_pool()
5033 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5036 dinitprintk(ioc, ioc_info(ioc, in _base_allocate_pcie_sgl_pool()
5038 ioc->scsiio_depth, sz, (sz * ioc->scsiio_depth)/1024)); in _base_allocate_pcie_sgl_pool()
5039 dinitprintk(ioc, ioc_info(ioc, in _base_allocate_pcie_sgl_pool()
5041 ioc->chains_per_prp_buffer)); in _base_allocate_pcie_sgl_pool()
5053 base_alloc_rdpq_dma_pool(struct MPT3SAS_ADAPTER *ioc, int sz) in base_alloc_rdpq_dma_pool() argument
5057 int reply_post_free_sz = ioc->reply_post_queue_depth * in base_alloc_rdpq_dma_pool()
5059 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in base_alloc_rdpq_dma_pool()
5061 ioc->reply_post = kcalloc(count, sizeof(struct reply_post_struct), in base_alloc_rdpq_dma_pool()
5063 if (!ioc->reply_post) in base_alloc_rdpq_dma_pool()
5076 ioc->reply_post_free_dma_pool = in base_alloc_rdpq_dma_pool()
5078 &ioc->pdev->dev, sz, 16, 0); in base_alloc_rdpq_dma_pool()
5079 if (!ioc->reply_post_free_dma_pool) in base_alloc_rdpq_dma_pool()
5083 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
5084 dma_pool_zalloc(ioc->reply_post_free_dma_pool, in base_alloc_rdpq_dma_pool()
5086 &ioc->reply_post[i].reply_post_free_dma); in base_alloc_rdpq_dma_pool()
5087 if (!ioc->reply_post[i].reply_post_free) in base_alloc_rdpq_dma_pool()
5099 (long)ioc->reply_post[i].reply_post_free, sz)) { in base_alloc_rdpq_dma_pool()
5100 dinitprintk(ioc, in base_alloc_rdpq_dma_pool()
5101 ioc_err(ioc, "bad Replypost free pool(0x%p)" in base_alloc_rdpq_dma_pool()
5103 ioc->reply_post[i].reply_post_free, in base_alloc_rdpq_dma_pool()
5105 ioc->reply_post[i].reply_post_free_dma)); in base_alloc_rdpq_dma_pool()
5111 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
5113 ((long)ioc->reply_post[i-1].reply_post_free in base_alloc_rdpq_dma_pool()
5115 ioc->reply_post[i].reply_post_free_dma = in base_alloc_rdpq_dma_pool()
5117 (ioc->reply_post[i-1].reply_post_free_dma + in base_alloc_rdpq_dma_pool()
5131 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc) in _base_allocate_memory_pools() argument
5146 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_allocate_memory_pools()
5150 facts = &ioc->facts; in _base_allocate_memory_pools()
5156 if (ioc->hba_mpi_version_belonged == MPI2_VERSION) in _base_allocate_memory_pools()
5167 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
5168 ioc->shost->sg_tablesize = MPT_MIN_PHYS_SEGMENTS; in _base_allocate_memory_pools()
5175 ioc_warn(ioc, "sg_tablesize(%u) is bigger than kernel defined SG_CHUNK_SIZE(%u)\n", in _base_allocate_memory_pools()
5178 ioc->shost->sg_tablesize = sg_tablesize; in _base_allocate_memory_pools()
5181 ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)), in _base_allocate_memory_pools()
5183 if (ioc->internal_depth < INTERNAL_CMDS_COUNT) { in _base_allocate_memory_pools()
5186 ioc_err(ioc, "IOC doesn't have enough Request Credits, it has just %d number of credits\n", in _base_allocate_memory_pools()
5190 ioc->internal_depth = 10; in _base_allocate_memory_pools()
5193 ioc->hi_priority_depth = ioc->internal_depth - (5); in _base_allocate_memory_pools()
5197 ioc->internal_depth, facts->RequestCredit); in _base_allocate_memory_pools()
5202 (MPT3SAS_KDUMP_SCSI_IO_DEPTH + ioc->internal_depth)); in _base_allocate_memory_pools()
5211 ioc->hba_queue_depth = max_request_credit + ioc->hi_priority_depth; in _base_allocate_memory_pools()
5214 ioc->request_sz = facts->IOCRequestFrameSize * 4; in _base_allocate_memory_pools()
5217 ioc->reply_sz = facts->ReplyFrameSize * 4; in _base_allocate_memory_pools()
5220 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_allocate_memory_pools()
5222 ioc->chain_segment_sz = in _base_allocate_memory_pools()
5227 ioc->chain_segment_sz = DEFAULT_NUM_FWCHAIN_ELEMTS * in _base_allocate_memory_pools()
5230 ioc->chain_segment_sz = ioc->request_sz; in _base_allocate_memory_pools()
5233 sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee); in _base_allocate_memory_pools()
5238 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - in _base_allocate_memory_pools()
5240 ioc->max_sges_in_main_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
5243 max_sge_elements = ioc->chain_segment_sz - sge_size; in _base_allocate_memory_pools()
5244 ioc->max_sges_in_chain_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
5249 chains_needed_per_io = ((ioc->shost->sg_tablesize - in _base_allocate_memory_pools()
5250 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) in _base_allocate_memory_pools()
5254 ioc->shost->sg_tablesize = min_t(u16, in _base_allocate_memory_pools()
5255 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message in _base_allocate_memory_pools()
5256 * chains_needed_per_io), ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
5258 ioc->chains_needed_per_io = chains_needed_per_io; in _base_allocate_memory_pools()
5261 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
5264 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
5265 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth; in _base_allocate_memory_pools()
5268 ioc->reply_post_queue_depth = ioc->hba_queue_depth + in _base_allocate_memory_pools()
5269 ioc->reply_free_queue_depth + 1; in _base_allocate_memory_pools()
5271 if (ioc->reply_post_queue_depth % 16) in _base_allocate_memory_pools()
5272 ioc->reply_post_queue_depth += 16 - in _base_allocate_memory_pools()
5273 (ioc->reply_post_queue_depth % 16); in _base_allocate_memory_pools()
5276 if (ioc->reply_post_queue_depth > in _base_allocate_memory_pools()
5278 ioc->reply_post_queue_depth = in _base_allocate_memory_pools()
5281 ioc->hba_queue_depth = in _base_allocate_memory_pools()
5282 ((ioc->reply_post_queue_depth - 64) / 2) - 1; in _base_allocate_memory_pools()
5283 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
5286 ioc_info(ioc, in _base_allocate_memory_pools()
5289 ioc->max_sges_in_main_message, in _base_allocate_memory_pools()
5290 ioc->max_sges_in_chain_message, in _base_allocate_memory_pools()
5291 ioc->shost->sg_tablesize, in _base_allocate_memory_pools()
5292 ioc->chains_needed_per_io); in _base_allocate_memory_pools()
5295 reply_post_free_sz = ioc->reply_post_queue_depth * in _base_allocate_memory_pools()
5298 if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable) in _base_allocate_memory_pools()
5299 rdpq_sz = reply_post_free_sz * ioc->reply_queue_count; in _base_allocate_memory_pools()
5300 ret = base_alloc_rdpq_dma_pool(ioc, rdpq_sz); in _base_allocate_memory_pools()
5306 _base_release_memory_pools(ioc); in _base_allocate_memory_pools()
5307 ioc->use_32bit_dma = true; in _base_allocate_memory_pools()
5308 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
5309 ioc_err(ioc, in _base_allocate_memory_pools()
5310 "32 DMA mask failed %s\n", pci_name(ioc->pdev)); in _base_allocate_memory_pools()
5313 if (base_alloc_rdpq_dma_pool(ioc, rdpq_sz)) in _base_allocate_memory_pools()
5317 total_sz = rdpq_sz * (!ioc->rdpq_array_enable ? 1 : in _base_allocate_memory_pools()
5318 DIV_ROUND_UP(ioc->reply_queue_count, RDPQ_MAX_INDEX_IN_ONE_CHUNK)); in _base_allocate_memory_pools()
5319 ioc->scsiio_depth = ioc->hba_queue_depth - in _base_allocate_memory_pools()
5320 ioc->hi_priority_depth - ioc->internal_depth; in _base_allocate_memory_pools()
5325 ioc->shost->can_queue = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT; in _base_allocate_memory_pools()
5326 dinitprintk(ioc, in _base_allocate_memory_pools()
5327 ioc_info(ioc, "scsi host: can_queue depth (%d)\n", in _base_allocate_memory_pools()
5328 ioc->shost->can_queue)); in _base_allocate_memory_pools()
5333 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; in _base_allocate_memory_pools()
5334 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); in _base_allocate_memory_pools()
5337 sz += (ioc->hi_priority_depth * ioc->request_sz); in _base_allocate_memory_pools()
5340 sz += (ioc->internal_depth * ioc->request_sz); in _base_allocate_memory_pools()
5342 ioc->request_dma_sz = sz; in _base_allocate_memory_pools()
5343 ioc->request = dma_alloc_coherent(&ioc->pdev->dev, sz, in _base_allocate_memory_pools()
5344 &ioc->request_dma, GFP_KERNEL); in _base_allocate_memory_pools()
5345 if (!ioc->request) { in _base_allocate_memory_pools()
5346 …ioc_err(ioc, "request pool: dma_alloc_coherent failed: hba_depth(%d), chains_per_io(%d), frame_sz(… in _base_allocate_memory_pools()
5347 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
5348 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
5349 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH) in _base_allocate_memory_pools()
5352 ioc->hba_queue_depth -= retry_sz; in _base_allocate_memory_pools()
5353 _base_release_memory_pools(ioc); in _base_allocate_memory_pools()
5358 …ioc_err(ioc, "request pool: dma_alloc_coherent succeed: hba_depth(%d), chains_per_io(%d), frame_sz… in _base_allocate_memory_pools()
5359 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
5360 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
5363 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
5364 ioc->request_sz); in _base_allocate_memory_pools()
5365 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
5366 ioc->request_sz); in _base_allocate_memory_pools()
5369 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
5370 ioc->request_sz); in _base_allocate_memory_pools()
5371 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
5372 ioc->request_sz); in _base_allocate_memory_pools()
5374 ioc_info(ioc, in _base_allocate_memory_pools()
5377 ioc->request, (unsigned long long) ioc->request_dma, in _base_allocate_memory_pools()
5378 ioc->hba_queue_depth, ioc->request_sz, in _base_allocate_memory_pools()
5379 (ioc->hba_queue_depth * ioc->request_sz) / 1024); in _base_allocate_memory_pools()
5383 dinitprintk(ioc, in _base_allocate_memory_pools()
5384 ioc_info(ioc, "scsiio(0x%p): depth(%d)\n", in _base_allocate_memory_pools()
5385 ioc->request, ioc->scsiio_depth)); in _base_allocate_memory_pools()
5387 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); in _base_allocate_memory_pools()
5388 sz = ioc->scsiio_depth * sizeof(struct chain_lookup); in _base_allocate_memory_pools()
5389 ioc->chain_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
5390 if (!ioc->chain_lookup) { in _base_allocate_memory_pools()
5391 ioc_err(ioc, "chain_lookup: __get_free_pages failed\n"); in _base_allocate_memory_pools()
5395 sz = ioc->chains_needed_per_io * sizeof(struct chain_tracker); in _base_allocate_memory_pools()
5396 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_memory_pools()
5397 ioc->chain_lookup[i].chains_per_smid = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
5398 if (!ioc->chain_lookup[i].chains_per_smid) { in _base_allocate_memory_pools()
5399 ioc_err(ioc, "chain_lookup: kzalloc failed\n"); in _base_allocate_memory_pools()
5405 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, in _base_allocate_memory_pools()
5407 if (!ioc->hpr_lookup) { in _base_allocate_memory_pools()
5408 ioc_err(ioc, "hpr_lookup: kcalloc failed\n"); in _base_allocate_memory_pools()
5411 ioc->hi_priority_smid = ioc->scsiio_depth + 1; in _base_allocate_memory_pools()
5412 dinitprintk(ioc, in _base_allocate_memory_pools()
5413 ioc_info(ioc, "hi_priority(0x%p): depth(%d), start smid(%d)\n", in _base_allocate_memory_pools()
5414 ioc->hi_priority, in _base_allocate_memory_pools()
5415 ioc->hi_priority_depth, ioc->hi_priority_smid)); in _base_allocate_memory_pools()
5418 ioc->internal_lookup = kcalloc(ioc->internal_depth, in _base_allocate_memory_pools()
5420 if (!ioc->internal_lookup) { in _base_allocate_memory_pools()
5421 ioc_err(ioc, "internal_lookup: kcalloc failed\n"); in _base_allocate_memory_pools()
5424 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; in _base_allocate_memory_pools()
5425 dinitprintk(ioc, in _base_allocate_memory_pools()
5426 ioc_info(ioc, "internal(0x%p): depth(%d), start smid(%d)\n", in _base_allocate_memory_pools()
5427 ioc->internal, in _base_allocate_memory_pools()
5428 ioc->internal_depth, ioc->internal_smid)); in _base_allocate_memory_pools()
5443 ioc->chains_per_prp_buffer = 0; in _base_allocate_memory_pools()
5444 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_allocate_memory_pools()
5446 (ioc->shost->sg_tablesize * NVME_PRP_SIZE) - 1; in _base_allocate_memory_pools()
5447 nvme_blocks_needed /= (ioc->page_size - NVME_PRP_SIZE); in _base_allocate_memory_pools()
5450 sz = sizeof(struct pcie_sg_list) * ioc->scsiio_depth; in _base_allocate_memory_pools()
5451 ioc->pcie_sg_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
5452 if (!ioc->pcie_sg_lookup) { in _base_allocate_memory_pools()
5453 ioc_info(ioc, "PCIe SGL lookup: kzalloc failed\n"); in _base_allocate_memory_pools()
5456 sz = nvme_blocks_needed * ioc->page_size; in _base_allocate_memory_pools()
5457 rc = _base_allocate_pcie_sgl_pool(ioc, sz); in _base_allocate_memory_pools()
5462 total_sz += sz * ioc->scsiio_depth; in _base_allocate_memory_pools()
5465 ioc->chain_dma_pool = dma_pool_create("chain pool", &ioc->pdev->dev, in _base_allocate_memory_pools()
5466 ioc->chain_segment_sz, 16, 0); in _base_allocate_memory_pools()
5467 if (!ioc->chain_dma_pool) { in _base_allocate_memory_pools()
5468 ioc_err(ioc, "chain_dma_pool: dma_pool_create failed\n"); in _base_allocate_memory_pools()
5471 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_memory_pools()
5472 for (j = ioc->chains_per_prp_buffer; in _base_allocate_memory_pools()
5473 j < ioc->chains_needed_per_io; j++) { in _base_allocate_memory_pools()
5474 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_memory_pools()
5476 ioc->chain_dma_pool, GFP_KERNEL, in _base_allocate_memory_pools()
5479 ioc_err(ioc, "chain_lookup: pci_pool_alloc failed\n"); in _base_allocate_memory_pools()
5483 total_sz += ioc->chain_segment_sz; in _base_allocate_memory_pools()
5486 dinitprintk(ioc, in _base_allocate_memory_pools()
5487 ioc_info(ioc, "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n", in _base_allocate_memory_pools()
5488 ioc->chain_depth, ioc->chain_segment_sz, in _base_allocate_memory_pools()
5489 (ioc->chain_depth * ioc->chain_segment_sz) / 1024)); in _base_allocate_memory_pools()
5492 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; in _base_allocate_memory_pools()
5493 ioc->sense_dma_pool = dma_pool_create("sense pool", &ioc->pdev->dev, sz, in _base_allocate_memory_pools()
5495 if (!ioc->sense_dma_pool) { in _base_allocate_memory_pools()
5496 ioc_err(ioc, "sense pool: dma_pool_create failed\n"); in _base_allocate_memory_pools()
5499 ioc->sense = dma_pool_alloc(ioc->sense_dma_pool, GFP_KERNEL, in _base_allocate_memory_pools()
5500 &ioc->sense_dma); in _base_allocate_memory_pools()
5501 if (!ioc->sense) { in _base_allocate_memory_pools()
5502 ioc_err(ioc, "sense pool: dma_pool_alloc failed\n"); in _base_allocate_memory_pools()
5514 if (!mpt3sas_check_same_4gb_region((long)ioc->sense, sz)) { in _base_allocate_memory_pools()
5516 dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); in _base_allocate_memory_pools()
5517 dma_pool_destroy(ioc->sense_dma_pool); in _base_allocate_memory_pools()
5518 ioc->sense = NULL; in _base_allocate_memory_pools()
5520 ioc->sense_dma_pool = in _base_allocate_memory_pools()
5521 dma_pool_create("sense pool", &ioc->pdev->dev, sz, in _base_allocate_memory_pools()
5523 if (!ioc->sense_dma_pool) { in _base_allocate_memory_pools()
5524 ioc_err(ioc, "sense pool: pci_pool_create failed\n"); in _base_allocate_memory_pools()
5527 ioc->sense = dma_pool_alloc(ioc->sense_dma_pool, GFP_KERNEL, in _base_allocate_memory_pools()
5528 &ioc->sense_dma); in _base_allocate_memory_pools()
5529 if (!ioc->sense) { in _base_allocate_memory_pools()
5530 ioc_err(ioc, "sense pool: pci_pool_alloc failed\n"); in _base_allocate_memory_pools()
5534 ioc_info(ioc, in _base_allocate_memory_pools()
5537 ioc->sense, (unsigned long long)ioc->sense_dma, ioc->scsiio_depth, in _base_allocate_memory_pools()
5543 sz = ioc->reply_free_queue_depth * ioc->reply_sz; in _base_allocate_memory_pools()
5544 ioc->reply_dma_pool = dma_pool_create("reply pool", &ioc->pdev->dev, sz, in _base_allocate_memory_pools()
5546 if (!ioc->reply_dma_pool) { in _base_allocate_memory_pools()
5547 ioc_err(ioc, "reply pool: dma_pool_create failed\n"); in _base_allocate_memory_pools()
5550 ioc->reply = dma_pool_alloc(ioc->reply_dma_pool, GFP_KERNEL, in _base_allocate_memory_pools()
5551 &ioc->reply_dma); in _base_allocate_memory_pools()
5552 if (!ioc->reply) { in _base_allocate_memory_pools()
5553 ioc_err(ioc, "reply pool: dma_pool_alloc failed\n"); in _base_allocate_memory_pools()
5556 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); in _base_allocate_memory_pools()
5557 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; in _base_allocate_memory_pools()
5558 dinitprintk(ioc, in _base_allocate_memory_pools()
5559 ioc_info(ioc, "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n", in _base_allocate_memory_pools()
5560 ioc->reply, ioc->reply_free_queue_depth, in _base_allocate_memory_pools()
5561 ioc->reply_sz, sz / 1024)); in _base_allocate_memory_pools()
5562 dinitprintk(ioc, in _base_allocate_memory_pools()
5563 ioc_info(ioc, "reply_dma(0x%llx)\n", in _base_allocate_memory_pools()
5564 (unsigned long long)ioc->reply_dma)); in _base_allocate_memory_pools()
5568 sz = ioc->reply_free_queue_depth * 4; in _base_allocate_memory_pools()
5569 ioc->reply_free_dma_pool = dma_pool_create("reply_free pool", in _base_allocate_memory_pools()
5570 &ioc->pdev->dev, sz, 16, 0); in _base_allocate_memory_pools()
5571 if (!ioc->reply_free_dma_pool) { in _base_allocate_memory_pools()
5572 ioc_err(ioc, "reply_free pool: dma_pool_create failed\n"); in _base_allocate_memory_pools()
5575 ioc->reply_free = dma_pool_zalloc(ioc->reply_free_dma_pool, GFP_KERNEL, in _base_allocate_memory_pools()
5576 &ioc->reply_free_dma); in _base_allocate_memory_pools()
5577 if (!ioc->reply_free) { in _base_allocate_memory_pools()
5578 ioc_err(ioc, "reply_free pool: dma_pool_alloc failed\n"); in _base_allocate_memory_pools()
5581 dinitprintk(ioc, in _base_allocate_memory_pools()
5582 ioc_info(ioc, "reply_free pool(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", in _base_allocate_memory_pools()
5583 ioc->reply_free, ioc->reply_free_queue_depth, in _base_allocate_memory_pools()
5585 dinitprintk(ioc, in _base_allocate_memory_pools()
5586 ioc_info(ioc, "reply_free_dma (0x%llx)\n", in _base_allocate_memory_pools()
5587 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_memory_pools()
5590 if (ioc->rdpq_array_enable) { in _base_allocate_memory_pools()
5591 reply_post_free_array_sz = ioc->reply_queue_count * in _base_allocate_memory_pools()
5593 ioc->reply_post_free_array_dma_pool = in _base_allocate_memory_pools()
5595 &ioc->pdev->dev, reply_post_free_array_sz, 16, 0); in _base_allocate_memory_pools()
5596 if (!ioc->reply_post_free_array_dma_pool) { in _base_allocate_memory_pools()
5597 dinitprintk(ioc, in _base_allocate_memory_pools()
5598 ioc_info(ioc, "reply_post_free_array pool: dma_pool_create failed\n")); in _base_allocate_memory_pools()
5601 ioc->reply_post_free_array = in _base_allocate_memory_pools()
5602 dma_pool_alloc(ioc->reply_post_free_array_dma_pool, in _base_allocate_memory_pools()
5603 GFP_KERNEL, &ioc->reply_post_free_array_dma); in _base_allocate_memory_pools()
5604 if (!ioc->reply_post_free_array) { in _base_allocate_memory_pools()
5605 dinitprintk(ioc, in _base_allocate_memory_pools()
5606 ioc_info(ioc, "reply_post_free_array pool: dma_pool_alloc failed\n")); in _base_allocate_memory_pools()
5610 ioc->config_page_sz = 512; in _base_allocate_memory_pools()
5611 ioc->config_page = dma_alloc_coherent(&ioc->pdev->dev, in _base_allocate_memory_pools()
5612 ioc->config_page_sz, &ioc->config_page_dma, GFP_KERNEL); in _base_allocate_memory_pools()
5613 if (!ioc->config_page) { in _base_allocate_memory_pools()
5614 ioc_err(ioc, "config page: dma_pool_alloc failed\n"); in _base_allocate_memory_pools()
5618 ioc_info(ioc, "config page(0x%p) - dma(0x%llx): size(%d)\n", in _base_allocate_memory_pools()
5619 ioc->config_page, (unsigned long long)ioc->config_page_dma, in _base_allocate_memory_pools()
5620 ioc->config_page_sz); in _base_allocate_memory_pools()
5621 total_sz += ioc->config_page_sz; in _base_allocate_memory_pools()
5623 ioc_info(ioc, "Allocated physical memory: size(%d kB)\n", in _base_allocate_memory_pools()
5625 ioc_info(ioc, "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n", in _base_allocate_memory_pools()
5626 ioc->shost->can_queue, facts->RequestCredit); in _base_allocate_memory_pools()
5627 ioc_info(ioc, "Scatter Gather Elements per IO(%d)\n", in _base_allocate_memory_pools()
5628 ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
5632 _base_release_memory_pools(ioc); in _base_allocate_memory_pools()
5633 if (ioc->use_32bit_dma && (ioc->dma_mask > 32)) { in _base_allocate_memory_pools()
5635 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
5637 pci_name(ioc->pdev)); in _base_allocate_memory_pools()
5640 } else if (_base_reduce_hba_queue_depth(ioc) != 0) in _base_allocate_memory_pools()
5657 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked) in mpt3sas_base_get_iocstate() argument
5661 s = ioc->base_readl(&ioc->chip->Doorbell); in mpt3sas_base_get_iocstate()
5675 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout) in _base_wait_on_iocstate() argument
5683 current_state = mpt3sas_base_get_iocstate(ioc, 1); in _base_wait_on_iocstate()
5705 _base_dump_reg_set(struct MPT3SAS_ADAPTER *ioc) in _base_dump_reg_set() argument
5708 u32 __iomem *reg = (u32 __iomem *)ioc->chip; in _base_dump_reg_set()
5710 ioc_info(ioc, "System Register set:\n"); in _base_dump_reg_set()
5727 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout) in _base_wait_for_doorbell_int() argument
5735 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_int()
5737 dhsprintk(ioc, in _base_wait_for_doorbell_int()
5738 ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n", in _base_wait_for_doorbell_int()
5747 ioc_err(ioc, "%s: failed due to timeout count(%d), int_status(%x)!\n", in _base_wait_for_doorbell_int()
5753 _base_spin_on_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout) in _base_spin_on_doorbell_int() argument
5761 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_spin_on_doorbell_int()
5763 dhsprintk(ioc, in _base_spin_on_doorbell_int()
5764 ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n", in _base_spin_on_doorbell_int()
5773 ioc_err(ioc, "%s: failed due to timeout count(%d), int_status(%x)!\n", in _base_spin_on_doorbell_int()
5790 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout) in _base_wait_for_doorbell_ack() argument
5799 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_ack()
5801 dhsprintk(ioc, in _base_wait_for_doorbell_ack()
5802 ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n", in _base_wait_for_doorbell_ack()
5806 doorbell = ioc->base_readl(&ioc->chip->Doorbell); in _base_wait_for_doorbell_ack()
5809 mpt3sas_print_fault_code(ioc, doorbell); in _base_wait_for_doorbell_ack()
5814 mpt3sas_print_coredump_info(ioc, doorbell); in _base_wait_for_doorbell_ack()
5825 ioc_err(ioc, "%s: failed due to timeout count(%d), int_status(%x)!\n", in _base_wait_for_doorbell_ack()
5838 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout) in _base_wait_for_doorbell_not_used() argument
5846 doorbell_reg = ioc->base_readl(&ioc->chip->Doorbell); in _base_wait_for_doorbell_not_used()
5848 dhsprintk(ioc, in _base_wait_for_doorbell_not_used()
5849 ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n", in _base_wait_for_doorbell_not_used()
5858 ioc_err(ioc, "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n", in _base_wait_for_doorbell_not_used()
5872 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout) in _base_send_ioc_reset() argument
5879 ioc_err(ioc, "%s: unknown reset_type\n", __func__); in _base_send_ioc_reset()
5883 if (!(ioc->facts.IOCCapabilities & in _base_send_ioc_reset()
5887 ioc_info(ioc, "sending message unit reset !!\n"); in _base_send_ioc_reset()
5890 &ioc->chip->Doorbell); in _base_send_ioc_reset()
5891 if ((_base_wait_for_doorbell_ack(ioc, 15))) { in _base_send_ioc_reset()
5896 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, timeout); in _base_send_ioc_reset()
5898 ioc_err(ioc, "%s: failed going to ready state (ioc_state=0x%x)\n", in _base_send_ioc_reset()
5905 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in _base_send_ioc_reset()
5906 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
5912 MPI2_IOC_STATE_COREDUMP && (ioc->is_driver_loading == 1 || in _base_send_ioc_reset()
5913 ioc->fault_reset_work_q == NULL)) { in _base_send_ioc_reset()
5915 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
5916 mpt3sas_print_coredump_info(ioc, ioc_state); in _base_send_ioc_reset()
5917 mpt3sas_base_wait_for_coredump_completion(ioc, in _base_send_ioc_reset()
5920 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
5922 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
5924 ioc_info(ioc, "message unit reset: %s\n", in _base_send_ioc_reset()
5940 mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int timeout) in mpt3sas_wait_for_ioc() argument
5946 ioc_state = mpt3sas_base_get_iocstate(ioc, 1); in mpt3sas_wait_for_ioc()
5950 ioc_info(ioc, "%s: waiting for operational state(count=%d)\n", in mpt3sas_wait_for_ioc()
5954 ioc_err(ioc, "%s: failed due to ioc not operational\n", __func__); in mpt3sas_wait_for_ioc()
5958 ioc_info(ioc, "ioc is operational\n"); in mpt3sas_wait_for_ioc()
5974 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes, in _base_handshake_req_reply_wait() argument
5983 if ((ioc->base_readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { in _base_handshake_req_reply_wait()
5984 ioc_err(ioc, "doorbell is in use (line=%d)\n", __LINE__); in _base_handshake_req_reply_wait()
5989 if (ioc->base_readl(&ioc->chip->HostInterruptStatus) & in _base_handshake_req_reply_wait()
5991 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
5996 &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
5998 if ((_base_spin_on_doorbell_int(ioc, 5))) { in _base_handshake_req_reply_wait()
5999 ioc_err(ioc, "doorbell handshake int failed (line=%d)\n", in _base_handshake_req_reply_wait()
6003 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
6005 if ((_base_wait_for_doorbell_ack(ioc, 5))) { in _base_handshake_req_reply_wait()
6006 ioc_err(ioc, "doorbell handshake ack failed (line=%d)\n", in _base_handshake_req_reply_wait()
6013 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
6014 if ((_base_wait_for_doorbell_ack(ioc, 5))) in _base_handshake_req_reply_wait()
6019 ioc_err(ioc, "doorbell handshake sending request failed (line=%d)\n", in _base_handshake_req_reply_wait()
6025 if ((_base_wait_for_doorbell_int(ioc, timeout))) { in _base_handshake_req_reply_wait()
6026 ioc_err(ioc, "doorbell handshake int failed (line=%d)\n", in _base_handshake_req_reply_wait()
6032 reply[0] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
6034 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
6035 if ((_base_wait_for_doorbell_int(ioc, 5))) { in _base_handshake_req_reply_wait()
6036 ioc_err(ioc, "doorbell handshake int failed (line=%d)\n", in _base_handshake_req_reply_wait()
6040 reply[1] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
6042 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
6045 if ((_base_wait_for_doorbell_int(ioc, 5))) { in _base_handshake_req_reply_wait()
6046 ioc_err(ioc, "doorbell handshake int failed (line=%d)\n", in _base_handshake_req_reply_wait()
6051 ioc->base_readl(&ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
6054 ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
6056 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
6059 _base_wait_for_doorbell_int(ioc, 5); in _base_handshake_req_reply_wait()
6060 if (_base_wait_for_doorbell_not_used(ioc, 5) != 0) { in _base_handshake_req_reply_wait()
6061 dhsprintk(ioc, in _base_handshake_req_reply_wait()
6062 ioc_info(ioc, "doorbell is in use (line=%d)\n", in _base_handshake_req_reply_wait()
6065 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
6067 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_handshake_req_reply_wait()
6071 ioc_info(ioc, "\t[0x%02x]:%08x\n", i*4, in _base_handshake_req_reply_wait()
6092 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_sas_iounit_control() argument
6101 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_sas_iounit_control()
6103 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
6105 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_sas_iounit_control()
6106 ioc_err(ioc, "%s: base_cmd in use\n", __func__); in mpt3sas_base_sas_iounit_control()
6111 rc = mpt3sas_wait_for_ioc(ioc, IOC_OPERATIONAL_WAIT_COUNT); in mpt3sas_base_sas_iounit_control()
6115 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_sas_iounit_control()
6117 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in mpt3sas_base_sas_iounit_control()
6123 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_sas_iounit_control()
6124 request = mpt3sas_base_get_msg_frame(ioc, smid); in mpt3sas_base_sas_iounit_control()
6125 ioc->base_cmds.smid = smid; in mpt3sas_base_sas_iounit_control()
6129 ioc->ioc_link_reset_in_progress = 1; in mpt3sas_base_sas_iounit_control()
6130 init_completion(&ioc->base_cmds.done); in mpt3sas_base_sas_iounit_control()
6131 ioc->put_smid_default(ioc, smid); in mpt3sas_base_sas_iounit_control()
6132 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_sas_iounit_control()
6136 ioc->ioc_link_reset_in_progress) in mpt3sas_base_sas_iounit_control()
6137 ioc->ioc_link_reset_in_progress = 0; in mpt3sas_base_sas_iounit_control()
6138 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_sas_iounit_control()
6139 mpt3sas_check_cmd_timeout(ioc, ioc->base_cmds.status, in mpt3sas_base_sas_iounit_control()
6144 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_sas_iounit_control()
6145 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_sas_iounit_control()
6149 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
6154 mpt3sas_base_hard_reset_handler(ioc, FORCE_BIG_HAMMER); in mpt3sas_base_sas_iounit_control()
6155 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
6158 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
6174 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_scsi_enclosure_processor() argument
6182 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_scsi_enclosure_processor()
6184 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
6186 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_scsi_enclosure_processor()
6187 ioc_err(ioc, "%s: base_cmd in use\n", __func__); in mpt3sas_base_scsi_enclosure_processor()
6192 rc = mpt3sas_wait_for_ioc(ioc, IOC_OPERATIONAL_WAIT_COUNT); in mpt3sas_base_scsi_enclosure_processor()
6196 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_scsi_enclosure_processor()
6198 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in mpt3sas_base_scsi_enclosure_processor()
6204 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_scsi_enclosure_processor()
6205 request = mpt3sas_base_get_msg_frame(ioc, smid); in mpt3sas_base_scsi_enclosure_processor()
6206 ioc->base_cmds.smid = smid; in mpt3sas_base_scsi_enclosure_processor()
6207 memset(request, 0, ioc->request_sz); in mpt3sas_base_scsi_enclosure_processor()
6209 init_completion(&ioc->base_cmds.done); in mpt3sas_base_scsi_enclosure_processor()
6210 ioc->put_smid_default(ioc, smid); in mpt3sas_base_scsi_enclosure_processor()
6211 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_scsi_enclosure_processor()
6213 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_scsi_enclosure_processor()
6214 mpt3sas_check_cmd_timeout(ioc, in mpt3sas_base_scsi_enclosure_processor()
6215 ioc->base_cmds.status, mpi_request, in mpt3sas_base_scsi_enclosure_processor()
6219 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_scsi_enclosure_processor()
6220 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_scsi_enclosure_processor()
6224 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
6229 mpt3sas_base_hard_reset_handler(ioc, FORCE_BIG_HAMMER); in mpt3sas_base_scsi_enclosure_processor()
6230 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
6233 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
6245 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port) in _base_get_port_facts() argument
6252 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_get_port_facts()
6259 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, in _base_get_port_facts()
6263 ioc_err(ioc, "%s: handshake failed (r=%d)\n", __func__, r); in _base_get_port_facts()
6267 pfacts = &ioc->pfacts[port]; in _base_get_port_facts()
6286 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout) in _base_wait_for_iocstate() argument
6291 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_wait_for_iocstate()
6293 if (ioc->pci_error_recovery) { in _base_wait_for_iocstate()
6294 dfailprintk(ioc, in _base_wait_for_iocstate()
6295 ioc_info(ioc, "%s: host in pci error recovery\n", in _base_wait_for_iocstate()
6300 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in _base_wait_for_iocstate()
6301 dhsprintk(ioc, in _base_wait_for_iocstate()
6302 ioc_info(ioc, "%s: ioc_state(0x%08x)\n", in _base_wait_for_iocstate()
6310 dhsprintk(ioc, ioc_info(ioc, "unexpected doorbell active!\n")); in _base_wait_for_iocstate()
6315 mpt3sas_print_fault_code(ioc, ioc_state & in _base_wait_for_iocstate()
6320 ioc_info(ioc, in _base_wait_for_iocstate()
6326 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, timeout); in _base_wait_for_iocstate()
6328 dfailprintk(ioc, in _base_wait_for_iocstate()
6329 ioc_info(ioc, "%s: failed going to ready state (ioc_state=0x%x)\n", in _base_wait_for_iocstate()
6335 rc = _base_diag_reset(ioc); in _base_wait_for_iocstate()
6346 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc) in _base_get_ioc_facts() argument
6353 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_get_ioc_facts()
6355 r = _base_wait_for_iocstate(ioc, 10); in _base_get_ioc_facts()
6357 dfailprintk(ioc, in _base_get_ioc_facts()
6358 ioc_info(ioc, "%s: failed getting to correct state\n", in _base_get_ioc_facts()
6366 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, in _base_get_ioc_facts()
6370 ioc_err(ioc, "%s: handshake failed (r=%d)\n", __func__, r); in _base_get_ioc_facts()
6374 facts = &ioc->facts; in _base_get_ioc_facts()
6385 if (ioc->msix_enable && (facts->MaxMSIxVectors <= in _base_get_ioc_facts()
6386 MAX_COMBINED_MSIX_VECTORS(ioc->is_gen35_ioc))) in _base_get_ioc_facts()
6387 ioc->combined_reply_queue = 0; in _base_get_ioc_facts()
6394 ioc->ir_firmware = 1; in _base_get_ioc_facts()
6397 ioc->rdpq_array_capable = 1; in _base_get_ioc_facts()
6399 && ioc->is_aero_ioc) in _base_get_ioc_facts()
6400 ioc->atomic_desc_capable = 1; in _base_get_ioc_facts()
6404 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_get_ioc_facts()
6410 ioc->shost->max_id = -1; in _base_get_ioc_facts()
6423 ioc->page_size = 1 << facts->CurrentHostPageSize; in _base_get_ioc_facts()
6424 if (ioc->page_size == 1) { in _base_get_ioc_facts()
6425 ioc_info(ioc, "CurrentHostPageSize is 0: Setting default host page size to 4k\n"); in _base_get_ioc_facts()
6426 ioc->page_size = 1 << MPT3SAS_HOST_PAGE_SIZE_4K; in _base_get_ioc_facts()
6428 dinitprintk(ioc, in _base_get_ioc_facts()
6429 ioc_info(ioc, "CurrentHostPageSize(%d)\n", in _base_get_ioc_facts()
6432 dinitprintk(ioc, in _base_get_ioc_facts()
6433 ioc_info(ioc, "hba queue depth(%d), max chains per io(%d)\n", in _base_get_ioc_facts()
6435 dinitprintk(ioc, in _base_get_ioc_facts()
6436 ioc_info(ioc, "request frame size(%d), reply frame size(%d)\n", in _base_get_ioc_facts()
6449 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc) in _base_send_ioc_init() argument
6458 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_send_ioc_init()
6465 mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged); in _base_send_ioc_init()
6469 if (_base_is_controller_msix_enabled(ioc)) in _base_send_ioc_init()
6470 mpi_request.HostMSIxVectors = ioc->reply_queue_count; in _base_send_ioc_init()
6471 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); in _base_send_ioc_init()
6473 cpu_to_le16(ioc->reply_post_queue_depth); in _base_send_ioc_init()
6475 cpu_to_le16(ioc->reply_free_queue_depth); in _base_send_ioc_init()
6478 cpu_to_le32((u64)ioc->sense_dma >> 32); in _base_send_ioc_init()
6480 cpu_to_le32((u64)ioc->reply_dma >> 32); in _base_send_ioc_init()
6482 cpu_to_le64((u64)ioc->request_dma); in _base_send_ioc_init()
6484 cpu_to_le64((u64)ioc->reply_free_dma); in _base_send_ioc_init()
6486 if (ioc->rdpq_array_enable) { in _base_send_ioc_init()
6487 reply_post_free_array_sz = ioc->reply_queue_count * in _base_send_ioc_init()
6489 memset(ioc->reply_post_free_array, 0, reply_post_free_array_sz); in _base_send_ioc_init()
6490 for (i = 0; i < ioc->reply_queue_count; i++) in _base_send_ioc_init()
6491 ioc->reply_post_free_array[i].RDPQBaseAddress = in _base_send_ioc_init()
6493 (u64)ioc->reply_post[i].reply_post_free_dma); in _base_send_ioc_init()
6496 cpu_to_le64((u64)ioc->reply_post_free_array_dma); in _base_send_ioc_init()
6499 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma); in _base_send_ioc_init()
6514 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_send_ioc_init()
6519 ioc_info(ioc, "\toffset:data\n"); in _base_send_ioc_init()
6521 ioc_info(ioc, "\t[0x%02x]:%08x\n", i*4, in _base_send_ioc_init()
6525 r = _base_handshake_req_reply_wait(ioc, in _base_send_ioc_init()
6530 ioc_err(ioc, "%s: handshake failed (r=%d)\n", __func__, r); in _base_send_ioc_init()
6537 ioc_err(ioc, "%s: failed\n", __func__); in _base_send_ioc_init()
6555 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, in mpt3sas_port_enable_done() argument
6561 if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_port_enable_done()
6564 mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply); in mpt3sas_port_enable_done()
6571 ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_port_enable_done()
6572 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_port_enable_done()
6573 ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_port_enable_done()
6574 memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_port_enable_done()
6577 ioc->port_enable_failed = 1; in mpt3sas_port_enable_done()
6579 if (ioc->is_driver_loading) { in mpt3sas_port_enable_done()
6581 mpt3sas_port_enable_complete(ioc); in mpt3sas_port_enable_done()
6584 ioc->start_scan_failed = ioc_status; in mpt3sas_port_enable_done()
6585 ioc->start_scan = 0; in mpt3sas_port_enable_done()
6589 complete(&ioc->port_enable_cmds.done); in mpt3sas_port_enable_done()
6600 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc) in _base_send_port_enable() argument
6608 ioc_info(ioc, "sending port enable !!\n"); in _base_send_port_enable()
6610 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_send_port_enable()
6611 ioc_err(ioc, "%s: internal command already in use\n", __func__); in _base_send_port_enable()
6615 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in _base_send_port_enable()
6617 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in _base_send_port_enable()
6621 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in _base_send_port_enable()
6622 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_send_port_enable()
6623 ioc->port_enable_cmds.smid = smid; in _base_send_port_enable()
6627 init_completion(&ioc->port_enable_cmds.done); in _base_send_port_enable()
6628 ioc->put_smid_default(ioc, smid); in _base_send_port_enable()
6629 wait_for_completion_timeout(&ioc->port_enable_cmds.done, 300*HZ); in _base_send_port_enable()
6630 if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) { in _base_send_port_enable()
6631 ioc_err(ioc, "%s: timeout\n", __func__); in _base_send_port_enable()
6634 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET) in _base_send_port_enable()
6641 mpi_reply = ioc->port_enable_cmds.reply; in _base_send_port_enable()
6644 ioc_err(ioc, "%s: failed with (ioc_status=0x%08x)\n", in _base_send_port_enable()
6651 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in _base_send_port_enable()
6652 ioc_info(ioc, "port enable: %s\n", r == 0 ? "SUCCESS" : "FAILED"); in _base_send_port_enable()
6663 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_port_enable() argument
6668 ioc_info(ioc, "sending port enable !!\n"); in mpt3sas_port_enable()
6670 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in mpt3sas_port_enable()
6671 ioc_err(ioc, "%s: internal command already in use\n", __func__); in mpt3sas_port_enable()
6675 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in mpt3sas_port_enable()
6677 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in mpt3sas_port_enable()
6681 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in mpt3sas_port_enable()
6682 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in mpt3sas_port_enable()
6683 ioc->port_enable_cmds.smid = smid; in mpt3sas_port_enable()
6687 ioc->put_smid_default(ioc, smid); in mpt3sas_port_enable()
6701 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc) in _base_determine_wait_on_discovery() argument
6709 if (ioc->ir_firmware) in _base_determine_wait_on_discovery()
6713 if (!ioc->bios_pg3.BiosVersion) in _base_determine_wait_on_discovery()
6723 if ((ioc->bios_pg2.CurrentBootDeviceForm & in _base_determine_wait_on_discovery()
6727 (ioc->bios_pg2.ReqBootDeviceForm & in _base_determine_wait_on_discovery()
6731 (ioc->bios_pg2.ReqAltBootDeviceForm & in _base_determine_wait_on_discovery()
6747 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event) in _base_unmask_events() argument
6757 ioc->event_masks[0] &= ~desired_event; in _base_unmask_events()
6759 ioc->event_masks[1] &= ~desired_event; in _base_unmask_events()
6761 ioc->event_masks[2] &= ~desired_event; in _base_unmask_events()
6763 ioc->event_masks[3] &= ~desired_event; in _base_unmask_events()
6773 _base_event_notification(struct MPT3SAS_ADAPTER *ioc) in _base_event_notification() argument
6780 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_event_notification()
6782 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_event_notification()
6783 ioc_err(ioc, "%s: internal command already in use\n", __func__); in _base_event_notification()
6787 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_event_notification()
6789 ioc_err(ioc, "%s: failed obtaining a smid\n", __func__); in _base_event_notification()
6792 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_event_notification()
6793 mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); in _base_event_notification()
6794 ioc->base_cmds.smid = smid; in _base_event_notification()
6801 cpu_to_le32(ioc->event_masks[i]); in _base_event_notification()
6802 init_completion(&ioc->base_cmds.done); in _base_event_notification()
6803 ioc->put_smid_default(ioc, smid); in _base_event_notification()
6804 wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); in _base_event_notification()
6805 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_event_notification()
6806 ioc_err(ioc, "%s: timeout\n", __func__); in _base_event_notification()
6809 if (ioc->base_cmds.status & MPT3_CMD_RESET) in _base_event_notification()
6814 dinitprintk(ioc, ioc_info(ioc, "%s: complete\n", __func__)); in _base_event_notification()
6815 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_event_notification()
6828 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type) in mpt3sas_base_validate_event_type() argument
6840 (ioc->event_masks[i] & desired_event)) { in mpt3sas_base_validate_event_type()
6841 ioc->event_masks[i] &= ~desired_event; in mpt3sas_base_validate_event_type()
6851 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
6852 _base_event_notification(ioc); in mpt3sas_base_validate_event_type()
6853 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
6863 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc) in _base_diag_reset() argument
6870 ioc_info(ioc, "sending diag reset !!\n"); in _base_diag_reset()
6872 pci_cfg_access_lock(ioc->pdev); in _base_diag_reset()
6874 drsprintk(ioc, ioc_info(ioc, "clear interrupts\n")); in _base_diag_reset()
6881 drsprintk(ioc, ioc_info(ioc, "write magic sequence\n")); in _base_diag_reset()
6882 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6883 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6884 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6885 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6886 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6887 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6888 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6894 ioc_info(ioc, in _base_diag_reset()
6896 _base_dump_reg_set(ioc); in _base_diag_reset()
6900 host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic); in _base_diag_reset()
6901 drsprintk(ioc, in _base_diag_reset()
6902 ioc_info(ioc, "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n", in _base_diag_reset()
6907 hcb_size = ioc->base_readl(&ioc->chip->HCBSize); in _base_diag_reset()
6909 drsprintk(ioc, ioc_info(ioc, "diag reset: issued\n")); in _base_diag_reset()
6911 &ioc->chip->HostDiagnostic); in _base_diag_reset()
6920 host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic); in _base_diag_reset()
6923 ioc_info(ioc, in _base_diag_reset()
6925 _base_dump_reg_set(ioc); in _base_diag_reset()
6936 drsprintk(ioc, in _base_diag_reset()
6937 ioc_info(ioc, "restart the adapter assuming the HCB Address points to good F/W\n")); in _base_diag_reset()
6940 writel(host_diagnostic, &ioc->chip->HostDiagnostic); in _base_diag_reset()
6942 drsprintk(ioc, ioc_info(ioc, "re-enable the HCDW\n")); in _base_diag_reset()
6944 &ioc->chip->HCBSize); in _base_diag_reset()
6947 drsprintk(ioc, ioc_info(ioc, "restart the adapter\n")); in _base_diag_reset()
6949 &ioc->chip->HostDiagnostic); in _base_diag_reset()
6951 drsprintk(ioc, in _base_diag_reset()
6952 ioc_info(ioc, "disable writes to the diagnostic register\n")); in _base_diag_reset()
6953 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
6955 drsprintk(ioc, ioc_info(ioc, "Wait for FW to go to the READY state\n")); in _base_diag_reset()
6956 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20); in _base_diag_reset()
6958 ioc_err(ioc, "%s: failed going to ready state (ioc_state=0x%x)\n", in _base_diag_reset()
6960 _base_dump_reg_set(ioc); in _base_diag_reset()
6964 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
6965 ioc_info(ioc, "diag reset: SUCCESS\n"); in _base_diag_reset()
6969 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
6970 ioc_err(ioc, "diag reset: FAILED\n"); in _base_diag_reset()
6982 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, enum reset_type type) in _base_make_ioc_ready() argument
6988 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_make_ioc_ready()
6990 if (ioc->pci_error_recovery) in _base_make_ioc_ready()
6993 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in _base_make_ioc_ready()
6994 dhsprintk(ioc, in _base_make_ioc_ready()
6995 ioc_info(ioc, "%s: ioc_state(0x%08x)\n", in _base_make_ioc_ready()
7004 ioc_err(ioc, "%s: failed going to ready state (ioc_state=0x%x)\n", in _base_make_ioc_ready()
7009 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in _base_make_ioc_ready()
7017 ioc_info(ioc, "unexpected doorbell active!\n"); in _base_make_ioc_ready()
7022 mpt3sas_print_fault_code(ioc, ioc_state & in _base_make_ioc_ready()
7035 if (ioc->ioc_coredump_loop != MPT3SAS_COREDUMP_LOOP_DONE) { in _base_make_ioc_ready()
7036 mpt3sas_print_coredump_info(ioc, ioc_state & in _base_make_ioc_ready()
7038 mpt3sas_base_wait_for_coredump_completion(ioc, in _base_make_ioc_ready()
7048 if (!(_base_send_ioc_reset(ioc, in _base_make_ioc_ready()
7054 rc = _base_diag_reset(ioc); in _base_make_ioc_ready()
7065 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc) in _base_make_ioc_operational() argument
7078 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in _base_make_ioc_operational()
7082 &ioc->delayed_tr_list, list) { in _base_make_ioc_operational()
7089 &ioc->delayed_tr_volume_list, list) { in _base_make_ioc_operational()
7095 &ioc->delayed_sc_list, list) { in _base_make_ioc_operational()
7101 &ioc->delayed_event_ack_list, list) { in _base_make_ioc_operational()
7106 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
7109 INIT_LIST_HEAD(&ioc->hpr_free_list); in _base_make_ioc_operational()
7110 smid = ioc->hi_priority_smid; in _base_make_ioc_operational()
7111 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { in _base_make_ioc_operational()
7112 ioc->hpr_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
7113 ioc->hpr_lookup[i].smid = smid; in _base_make_ioc_operational()
7114 list_add_tail(&ioc->hpr_lookup[i].tracker_list, in _base_make_ioc_operational()
7115 &ioc->hpr_free_list); in _base_make_ioc_operational()
7119 INIT_LIST_HEAD(&ioc->internal_free_list); in _base_make_ioc_operational()
7120 smid = ioc->internal_smid; in _base_make_ioc_operational()
7121 for (i = 0; i < ioc->internal_depth; i++, smid++) { in _base_make_ioc_operational()
7122 ioc->internal_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
7123 ioc->internal_lookup[i].smid = smid; in _base_make_ioc_operational()
7124 list_add_tail(&ioc->internal_lookup[i].tracker_list, in _base_make_ioc_operational()
7125 &ioc->internal_free_list); in _base_make_ioc_operational()
7128 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
7131 for (i = 0, reply_address = (u32)ioc->reply_dma ; in _base_make_ioc_operational()
7132 i < ioc->reply_free_queue_depth ; i++, reply_address += in _base_make_ioc_operational()
7133 ioc->reply_sz) { in _base_make_ioc_operational()
7134 ioc->reply_free[i] = cpu_to_le32(reply_address); in _base_make_ioc_operational()
7135 if (ioc->is_mcpu_endpoint) in _base_make_ioc_operational()
7136 _base_clone_reply_to_sys_mem(ioc, in _base_make_ioc_operational()
7141 if (ioc->is_driver_loading) in _base_make_ioc_operational()
7142 _base_assign_reply_queues(ioc); in _base_make_ioc_operational()
7146 reply_post_free_contig = ioc->reply_post[0].reply_post_free; in _base_make_ioc_operational()
7147 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
7152 if (ioc->rdpq_array_enable) { in _base_make_ioc_operational()
7154 ioc->reply_post[index++].reply_post_free; in _base_make_ioc_operational()
7157 reply_post_free_contig += ioc->reply_post_queue_depth; in _base_make_ioc_operational()
7161 for (i = 0; i < ioc->reply_post_queue_depth; i++) in _base_make_ioc_operational()
7164 if (!_base_is_controller_msix_enabled(ioc)) in _base_make_ioc_operational()
7169 r = _base_send_ioc_init(ioc); in _base_make_ioc_operational()
7176 if (!ioc->is_driver_loading) in _base_make_ioc_operational()
7179 rc = _base_check_for_fault_and_issue_reset(ioc); in _base_make_ioc_operational()
7180 if (rc || (_base_send_ioc_init(ioc))) in _base_make_ioc_operational()
7185 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; in _base_make_ioc_operational()
7186 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); in _base_make_ioc_operational()
7189 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
7190 if (ioc->combined_reply_queue) in _base_make_ioc_operational()
7193 ioc->replyPostRegisterIndex[reply_q->msix_index/8]); in _base_make_ioc_operational()
7197 &ioc->chip->ReplyPostHostIndex); in _base_make_ioc_operational()
7199 if (!_base_is_controller_msix_enabled(ioc)) in _base_make_ioc_operational()
7205 mpt3sas_base_unmask_interrupts(ioc); in _base_make_ioc_operational()
7207 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_make_ioc_operational()
7208 r = _base_display_fwpkg_version(ioc); in _base_make_ioc_operational()
7213 _base_static_config_pages(ioc); in _base_make_ioc_operational()
7214 r = _base_event_notification(ioc); in _base_make_ioc_operational()
7218 if (ioc->is_driver_loading) { in _base_make_ioc_operational()
7220 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier in _base_make_ioc_operational()
7223 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & in _base_make_ioc_operational()
7226 ioc->mfg_pg10_hide_flag = hide_flag; in _base_make_ioc_operational()
7229 ioc->wait_for_discovery_to_complete = in _base_make_ioc_operational()
7230 _base_determine_wait_on_discovery(ioc); in _base_make_ioc_operational()
7235 r = _base_send_port_enable(ioc); in _base_make_ioc_operational()
7247 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_free_resources() argument
7249 dexitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_free_resources()
7252 mutex_lock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
7253 if (ioc->chip_phys && ioc->chip) { in mpt3sas_base_free_resources()
7254 mpt3sas_base_mask_interrupts(ioc); in mpt3sas_base_free_resources()
7255 ioc->shost_recovery = 1; in mpt3sas_base_free_resources()
7256 _base_make_ioc_ready(ioc, SOFT_RESET); in mpt3sas_base_free_resources()
7257 ioc->shost_recovery = 0; in mpt3sas_base_free_resources()
7260 mpt3sas_base_unmap_resources(ioc); in mpt3sas_base_free_resources()
7261 mutex_unlock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
7272 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_attach() argument
7277 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_attach()
7280 ioc->cpu_count = num_online_cpus(); in mpt3sas_base_attach()
7283 ioc->cpu_msix_table_sz = last_cpu_id + 1; in mpt3sas_base_attach()
7284 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); in mpt3sas_base_attach()
7285 ioc->reply_queue_count = 1; in mpt3sas_base_attach()
7286 if (!ioc->cpu_msix_table) { in mpt3sas_base_attach()
7287 ioc_info(ioc, "Allocation for cpu_msix_table failed!!!\n"); in mpt3sas_base_attach()
7292 if (ioc->is_warpdrive) { in mpt3sas_base_attach()
7293 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, in mpt3sas_base_attach()
7295 if (!ioc->reply_post_host_index) { in mpt3sas_base_attach()
7296 ioc_info(ioc, "Allocation for reply_post_host_index failed!!!\n"); in mpt3sas_base_attach()
7302 ioc->smp_affinity_enable = smp_affinity_enable; in mpt3sas_base_attach()
7304 ioc->rdpq_array_enable_assigned = 0; in mpt3sas_base_attach()
7305 ioc->use_32bit_dma = false; in mpt3sas_base_attach()
7306 ioc->dma_mask = 64; in mpt3sas_base_attach()
7307 if (ioc->is_aero_ioc) in mpt3sas_base_attach()
7308 ioc->base_readl = &_base_readl_aero; in mpt3sas_base_attach()
7310 ioc->base_readl = &_base_readl; in mpt3sas_base_attach()
7311 r = mpt3sas_base_map_resources(ioc); in mpt3sas_base_attach()
7315 pci_set_drvdata(ioc->pdev, ioc->shost); in mpt3sas_base_attach()
7316 r = _base_get_ioc_facts(ioc); in mpt3sas_base_attach()
7318 rc = _base_check_for_fault_and_issue_reset(ioc); in mpt3sas_base_attach()
7319 if (rc || (_base_get_ioc_facts(ioc))) in mpt3sas_base_attach()
7323 switch (ioc->hba_mpi_version_belonged) { in mpt3sas_base_attach()
7325 ioc->build_sg_scmd = &_base_build_sg_scmd; in mpt3sas_base_attach()
7326 ioc->build_sg = &_base_build_sg; in mpt3sas_base_attach()
7327 ioc->build_zero_len_sge = &_base_build_zero_len_sge; in mpt3sas_base_attach()
7328 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
7338 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee; in mpt3sas_base_attach()
7339 ioc->build_sg = &_base_build_sg_ieee; in mpt3sas_base_attach()
7340 ioc->build_nvme_prp = &_base_build_nvme_prp; in mpt3sas_base_attach()
7341 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee; in mpt3sas_base_attach()
7342 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t); in mpt3sas_base_attach()
7343 if (ioc->high_iops_queues) in mpt3sas_base_attach()
7344 ioc->get_msix_index_for_smlio = in mpt3sas_base_attach()
7347 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
7350 if (ioc->atomic_desc_capable) { in mpt3sas_base_attach()
7351 ioc->put_smid_default = &_base_put_smid_default_atomic; in mpt3sas_base_attach()
7352 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io_atomic; in mpt3sas_base_attach()
7353 ioc->put_smid_fast_path = in mpt3sas_base_attach()
7355 ioc->put_smid_hi_priority = in mpt3sas_base_attach()
7358 ioc->put_smid_default = &_base_put_smid_default; in mpt3sas_base_attach()
7359 ioc->put_smid_fast_path = &_base_put_smid_fast_path; in mpt3sas_base_attach()
7360 ioc->put_smid_hi_priority = &_base_put_smid_hi_priority; in mpt3sas_base_attach()
7361 if (ioc->is_mcpu_endpoint) in mpt3sas_base_attach()
7362 ioc->put_smid_scsi_io = in mpt3sas_base_attach()
7365 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io; in mpt3sas_base_attach()
7373 ioc->build_sg_mpi = &_base_build_sg; in mpt3sas_base_attach()
7374 ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge; in mpt3sas_base_attach()
7376 r = _base_make_ioc_ready(ioc, SOFT_RESET); in mpt3sas_base_attach()
7380 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, in mpt3sas_base_attach()
7382 if (!ioc->pfacts) { in mpt3sas_base_attach()
7387 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { in mpt3sas_base_attach()
7388 r = _base_get_port_facts(ioc, i); in mpt3sas_base_attach()
7390 rc = _base_check_for_fault_and_issue_reset(ioc); in mpt3sas_base_attach()
7391 if (rc || (_base_get_port_facts(ioc, i))) in mpt3sas_base_attach()
7396 r = _base_allocate_memory_pools(ioc); in mpt3sas_base_attach()
7401 ioc->thresh_hold = irqpoll_weight; in mpt3sas_base_attach()
7403 ioc->thresh_hold = ioc->hba_queue_depth/4; in mpt3sas_base_attach()
7405 _base_init_irqpolls(ioc); in mpt3sas_base_attach()
7406 init_waitqueue_head(&ioc->reset_wq); in mpt3sas_base_attach()
7409 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
7410 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
7411 ioc->pd_handles_sz++; in mpt3sas_base_attach()
7412 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
7414 if (!ioc->pd_handles) { in mpt3sas_base_attach()
7418 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
7420 if (!ioc->blocking_handles) { in mpt3sas_base_attach()
7426 ioc->pend_os_device_add_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
7427 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
7428 ioc->pend_os_device_add_sz++; in mpt3sas_base_attach()
7429 ioc->pend_os_device_add = kzalloc(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
7431 if (!ioc->pend_os_device_add) { in mpt3sas_base_attach()
7436 ioc->device_remove_in_progress_sz = ioc->pend_os_device_add_sz; in mpt3sas_base_attach()
7437 ioc->device_remove_in_progress = in mpt3sas_base_attach()
7438 kzalloc(ioc->device_remove_in_progress_sz, GFP_KERNEL); in mpt3sas_base_attach()
7439 if (!ioc->device_remove_in_progress) { in mpt3sas_base_attach()
7444 ioc->fwfault_debug = mpt3sas_fwfault_debug; in mpt3sas_base_attach()
7447 mutex_init(&ioc->base_cmds.mutex); in mpt3sas_base_attach()
7448 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7449 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7452 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7453 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7456 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7457 ioc->transport_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7458 mutex_init(&ioc->transport_cmds.mutex); in mpt3sas_base_attach()
7461 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7462 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7463 mutex_init(&ioc->scsih_cmds.mutex); in mpt3sas_base_attach()
7466 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7467 ioc->tm_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7468 mutex_init(&ioc->tm_cmds.mutex); in mpt3sas_base_attach()
7471 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7472 ioc->config_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7473 mutex_init(&ioc->config_cmds.mutex); in mpt3sas_base_attach()
7476 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
7477 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); in mpt3sas_base_attach()
7478 ioc->ctl_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
7479 mutex_init(&ioc->ctl_cmds.mutex); in mpt3sas_base_attach()
7481 if (!ioc->base_cmds.reply || !ioc->port_enable_cmds.reply || in mpt3sas_base_attach()
7482 !ioc->transport_cmds.reply || !ioc->scsih_cmds.reply || in mpt3sas_base_attach()
7483 !ioc->tm_cmds.reply || !ioc->config_cmds.reply || in mpt3sas_base_attach()
7484 !ioc->ctl_cmds.reply || !ioc->ctl_cmds.sense) { in mpt3sas_base_attach()
7490 ioc->event_masks[i] = -1; in mpt3sas_base_attach()
7493 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); in mpt3sas_base_attach()
7494 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); in mpt3sas_base_attach()
7495 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); in mpt3sas_base_attach()
7496 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); in mpt3sas_base_attach()
7497 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); in mpt3sas_base_attach()
7498 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); in mpt3sas_base_attach()
7499 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); in mpt3sas_base_attach()
7500 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); in mpt3sas_base_attach()
7501 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); in mpt3sas_base_attach()
7502 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); in mpt3sas_base_attach()
7503 _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD); in mpt3sas_base_attach()
7504 _base_unmask_events(ioc, MPI2_EVENT_ACTIVE_CABLE_EXCEPTION); in mpt3sas_base_attach()
7505 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_DISCOVERY_ERROR); in mpt3sas_base_attach()
7506 if (ioc->hba_mpi_version_belonged == MPI26_VERSION) { in mpt3sas_base_attach()
7507 if (ioc->is_gen35_ioc) { in mpt3sas_base_attach()
7508 _base_unmask_events(ioc, in mpt3sas_base_attach()
7510 _base_unmask_events(ioc, MPI2_EVENT_PCIE_ENUMERATION); in mpt3sas_base_attach()
7511 _base_unmask_events(ioc, in mpt3sas_base_attach()
7515 r = _base_make_ioc_operational(ioc); in mpt3sas_base_attach()
7523 memcpy(&ioc->prev_fw_facts, &ioc->facts, in mpt3sas_base_attach()
7526 ioc->non_operational_loop = 0; in mpt3sas_base_attach()
7527 ioc->ioc_coredump_loop = 0; in mpt3sas_base_attach()
7528 ioc->got_task_abort_from_ioctl = 0; in mpt3sas_base_attach()
7533 ioc->remove_host = 1; in mpt3sas_base_attach()
7535 mpt3sas_base_free_resources(ioc); in mpt3sas_base_attach()
7536 _base_release_memory_pools(ioc); in mpt3sas_base_attach()
7537 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_attach()
7538 kfree(ioc->cpu_msix_table); in mpt3sas_base_attach()
7539 if (ioc->is_warpdrive) in mpt3sas_base_attach()
7540 kfree(ioc->reply_post_host_index); in mpt3sas_base_attach()
7541 kfree(ioc->pd_handles); in mpt3sas_base_attach()
7542 kfree(ioc->blocking_handles); in mpt3sas_base_attach()
7543 kfree(ioc->device_remove_in_progress); in mpt3sas_base_attach()
7544 kfree(ioc->pend_os_device_add); in mpt3sas_base_attach()
7545 kfree(ioc->tm_cmds.reply); in mpt3sas_base_attach()
7546 kfree(ioc->transport_cmds.reply); in mpt3sas_base_attach()
7547 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_attach()
7548 kfree(ioc->config_cmds.reply); in mpt3sas_base_attach()
7549 kfree(ioc->base_cmds.reply); in mpt3sas_base_attach()
7550 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_attach()
7551 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_attach()
7552 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_attach()
7553 kfree(ioc->pfacts); in mpt3sas_base_attach()
7554 ioc->ctl_cmds.reply = NULL; in mpt3sas_base_attach()
7555 ioc->base_cmds.reply = NULL; in mpt3sas_base_attach()
7556 ioc->tm_cmds.reply = NULL; in mpt3sas_base_attach()
7557 ioc->scsih_cmds.reply = NULL; in mpt3sas_base_attach()
7558 ioc->transport_cmds.reply = NULL; in mpt3sas_base_attach()
7559 ioc->config_cmds.reply = NULL; in mpt3sas_base_attach()
7560 ioc->pfacts = NULL; in mpt3sas_base_attach()
7570 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_base_detach() argument
7572 dexitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); in mpt3sas_base_detach()
7574 mpt3sas_base_stop_watchdog(ioc); in mpt3sas_base_detach()
7575 mpt3sas_base_free_resources(ioc); in mpt3sas_base_detach()
7576 _base_release_memory_pools(ioc); in mpt3sas_base_detach()
7577 mpt3sas_free_enclosure_list(ioc); in mpt3sas_base_detach()
7578 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_detach()
7579 kfree(ioc->cpu_msix_table); in mpt3sas_base_detach()
7580 if (ioc->is_warpdrive) in mpt3sas_base_detach()
7581 kfree(ioc->reply_post_host_index); in mpt3sas_base_detach()
7582 kfree(ioc->pd_handles); in mpt3sas_base_detach()
7583 kfree(ioc->blocking_handles); in mpt3sas_base_detach()
7584 kfree(ioc->device_remove_in_progress); in mpt3sas_base_detach()
7585 kfree(ioc->pend_os_device_add); in mpt3sas_base_detach()
7586 kfree(ioc->pfacts); in mpt3sas_base_detach()
7587 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_detach()
7588 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_detach()
7589 kfree(ioc->base_cmds.reply); in mpt3sas_base_detach()
7590 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_detach()
7591 kfree(ioc->tm_cmds.reply); in mpt3sas_base_detach()
7592 kfree(ioc->transport_cmds.reply); in mpt3sas_base_detach()
7593 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_detach()
7594 kfree(ioc->config_cmds.reply); in mpt3sas_base_detach()
7601 static void _base_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc) in _base_pre_reset_handler() argument
7603 mpt3sas_scsih_pre_reset_handler(ioc); in _base_pre_reset_handler()
7604 mpt3sas_ctl_pre_reset_handler(ioc); in _base_pre_reset_handler()
7605 dtmprintk(ioc, ioc_info(ioc, "%s: MPT3_IOC_PRE_RESET\n", __func__)); in _base_pre_reset_handler()
7613 _base_clear_outstanding_mpt_commands(struct MPT3SAS_ADAPTER *ioc) in _base_clear_outstanding_mpt_commands() argument
7615 dtmprintk(ioc, in _base_clear_outstanding_mpt_commands()
7616 ioc_info(ioc, "%s: clear outstanding mpt cmds\n", __func__)); in _base_clear_outstanding_mpt_commands()
7617 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
7618 ioc->transport_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
7619 mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid); in _base_clear_outstanding_mpt_commands()
7620 complete(&ioc->transport_cmds.done); in _base_clear_outstanding_mpt_commands()
7622 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
7623 ioc->base_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
7624 mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid); in _base_clear_outstanding_mpt_commands()
7625 complete(&ioc->base_cmds.done); in _base_clear_outstanding_mpt_commands()
7627 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
7628 ioc->port_enable_failed = 1; in _base_clear_outstanding_mpt_commands()
7629 ioc->port_enable_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
7630 mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); in _base_clear_outstanding_mpt_commands()
7631 if (ioc->is_driver_loading) { in _base_clear_outstanding_mpt_commands()
7632 ioc->start_scan_failed = in _base_clear_outstanding_mpt_commands()
7634 ioc->start_scan = 0; in _base_clear_outstanding_mpt_commands()
7635 ioc->port_enable_cmds.status = in _base_clear_outstanding_mpt_commands()
7638 complete(&ioc->port_enable_cmds.done); in _base_clear_outstanding_mpt_commands()
7641 if (ioc->config_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
7642 ioc->config_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
7643 mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid); in _base_clear_outstanding_mpt_commands()
7644 ioc->config_cmds.smid = USHRT_MAX; in _base_clear_outstanding_mpt_commands()
7645 complete(&ioc->config_cmds.done); in _base_clear_outstanding_mpt_commands()
7653 static void _base_clear_outstanding_commands(struct MPT3SAS_ADAPTER *ioc) in _base_clear_outstanding_commands() argument
7655 mpt3sas_scsih_clear_outstanding_scsi_tm_commands(ioc); in _base_clear_outstanding_commands()
7656 mpt3sas_ctl_clear_outstanding_ioctls(ioc); in _base_clear_outstanding_commands()
7657 _base_clear_outstanding_mpt_commands(ioc); in _base_clear_outstanding_commands()
7664 static void _base_reset_done_handler(struct MPT3SAS_ADAPTER *ioc) in _base_reset_done_handler() argument
7666 mpt3sas_scsih_reset_done_handler(ioc); in _base_reset_done_handler()
7667 mpt3sas_ctl_reset_done_handler(ioc); in _base_reset_done_handler()
7668 dtmprintk(ioc, ioc_info(ioc, "%s: MPT3_IOC_DONE_RESET\n", __func__)); in _base_reset_done_handler()
7679 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc) in mpt3sas_wait_for_commands_to_complete() argument
7683 ioc->pending_io_count = 0; in mpt3sas_wait_for_commands_to_complete()
7685 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in mpt3sas_wait_for_commands_to_complete()
7690 ioc->pending_io_count = scsi_host_busy(ioc->shost); in mpt3sas_wait_for_commands_to_complete()
7692 if (!ioc->pending_io_count) in mpt3sas_wait_for_commands_to_complete()
7696 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); in mpt3sas_wait_for_commands_to_complete()
7707 _base_check_ioc_facts_changes(struct MPT3SAS_ADAPTER *ioc) in _base_check_ioc_facts_changes() argument
7712 struct mpt3sas_facts *old_facts = &ioc->prev_fw_facts; in _base_check_ioc_facts_changes()
7714 if (ioc->facts.MaxDevHandle > old_facts->MaxDevHandle) { in _base_check_ioc_facts_changes()
7715 pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in _base_check_ioc_facts_changes()
7716 if (ioc->facts.MaxDevHandle % 8) in _base_check_ioc_facts_changes()
7719 pd_handles = krealloc(ioc->pd_handles, pd_handles_sz, in _base_check_ioc_facts_changes()
7722 ioc_info(ioc, in _base_check_ioc_facts_changes()
7727 memset(pd_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
7728 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
7729 ioc->pd_handles = pd_handles; in _base_check_ioc_facts_changes()
7731 blocking_handles = krealloc(ioc->blocking_handles, in _base_check_ioc_facts_changes()
7734 ioc_info(ioc, in _base_check_ioc_facts_changes()
7740 memset(blocking_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
7741 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
7742 ioc->blocking_handles = blocking_handles; in _base_check_ioc_facts_changes()
7743 ioc->pd_handles_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
7745 pend_os_device_add = krealloc(ioc->pend_os_device_add, in _base_check_ioc_facts_changes()
7748 ioc_info(ioc, in _base_check_ioc_facts_changes()
7753 memset(pend_os_device_add + ioc->pend_os_device_add_sz, 0, in _base_check_ioc_facts_changes()
7754 (pd_handles_sz - ioc->pend_os_device_add_sz)); in _base_check_ioc_facts_changes()
7755 ioc->pend_os_device_add = pend_os_device_add; in _base_check_ioc_facts_changes()
7756 ioc->pend_os_device_add_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
7759 ioc->device_remove_in_progress, pd_handles_sz, GFP_KERNEL); in _base_check_ioc_facts_changes()
7761 ioc_info(ioc, in _base_check_ioc_facts_changes()
7768 ioc->device_remove_in_progress_sz, 0, in _base_check_ioc_facts_changes()
7769 (pd_handles_sz - ioc->device_remove_in_progress_sz)); in _base_check_ioc_facts_changes()
7770 ioc->device_remove_in_progress = device_remove_in_progress; in _base_check_ioc_facts_changes()
7771 ioc->device_remove_in_progress_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
7774 memcpy(&ioc->prev_fw_facts, &ioc->facts, sizeof(struct mpt3sas_facts)); in _base_check_ioc_facts_changes()
7786 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, in mpt3sas_base_hard_reset_handler() argument
7794 dtmprintk(ioc, ioc_info(ioc, "%s: enter\n", __func__)); in mpt3sas_base_hard_reset_handler()
7796 if (ioc->pci_error_recovery) { in mpt3sas_base_hard_reset_handler()
7797 ioc_err(ioc, "%s: pci error recovery reset\n", __func__); in mpt3sas_base_hard_reset_handler()
7803 mpt3sas_halt_firmware(ioc); in mpt3sas_base_hard_reset_handler()
7806 mutex_lock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()
7808 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
7809 ioc->shost_recovery = 1; in mpt3sas_base_hard_reset_handler()
7810 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
7812 if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
7814 (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
7817 ioc_state = mpt3sas_base_get_iocstate(ioc, 0); in mpt3sas_base_hard_reset_handler()
7823 _base_pre_reset_handler(ioc); in mpt3sas_base_hard_reset_handler()
7824 mpt3sas_wait_for_commands_to_complete(ioc); in mpt3sas_base_hard_reset_handler()
7825 mpt3sas_base_mask_interrupts(ioc); in mpt3sas_base_hard_reset_handler()
7826 r = _base_make_ioc_ready(ioc, type); in mpt3sas_base_hard_reset_handler()
7829 _base_clear_outstanding_commands(ioc); in mpt3sas_base_hard_reset_handler()
7834 if (ioc->is_driver_loading && ioc->port_enable_failed) { in mpt3sas_base_hard_reset_handler()
7835 ioc->remove_host = 1; in mpt3sas_base_hard_reset_handler()
7839 r = _base_get_ioc_facts(ioc); in mpt3sas_base_hard_reset_handler()
7843 r = _base_check_ioc_facts_changes(ioc); in mpt3sas_base_hard_reset_handler()
7845 ioc_info(ioc, in mpt3sas_base_hard_reset_handler()
7850 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) in mpt3sas_base_hard_reset_handler()
7853 " firmware version is running\n", ioc->name); in mpt3sas_base_hard_reset_handler()
7855 r = _base_make_ioc_operational(ioc); in mpt3sas_base_hard_reset_handler()
7857 _base_reset_done_handler(ioc); in mpt3sas_base_hard_reset_handler()
7860 ioc_info(ioc, "%s: %s\n", __func__, r == 0 ? "SUCCESS" : "FAILED"); in mpt3sas_base_hard_reset_handler()
7862 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
7863 ioc->shost_recovery = 0; in mpt3sas_base_hard_reset_handler()
7864 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
7865 ioc->ioc_reset_count++; in mpt3sas_base_hard_reset_handler()
7866 mutex_unlock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()
7871 mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT); in mpt3sas_base_hard_reset_handler()
7873 mpt3sas_trigger_master(ioc, in mpt3sas_base_hard_reset_handler()
7876 dtmprintk(ioc, ioc_info(ioc, "%s: exit\n", __func__)); in mpt3sas_base_hard_reset_handler()