436 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_init()
437 	NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_init()
438 	NCR5380_write(TARGET_COMMAND_REG, 0);  in NCR5380_init()
439 	NCR5380_write(SELECT_ENABLE_REG, 0);  in NCR5380_init()
738 			NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);  in NCR5380_main()
793 	NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_dma_complete()
794 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_dma_complete()
892 				NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_intr()
898 			NCR5380_write(SELECT_ENABLE_REG, 0);  in NCR5380_intr()
908 				NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);  in NCR5380_intr()
994 	NCR5380_write(TARGET_COMMAND_REG, 0);  in NCR5380_select()
1000 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);  in NCR5380_select()
1001 	NCR5380_write(MODE_REG, MR_ARBITRATE);  in NCR5380_select()
1018 		NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_select()
1022 		NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_select()
1036 		NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_select()
1046 	NCR5380_write(INITIATOR_COMMAND_REG,  in NCR5380_select()
1066 		NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_select()
1067 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_select()
1078 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));  in NCR5380_select()
1086 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |  in NCR5380_select()
1088 	NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_select()
1094 	NCR5380_write(SELECT_ENABLE_REG, 0);  in NCR5380_select()
1105 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |  in NCR5380_select()
1139 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_select()
1147 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_select()
1169 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);  in NCR5380_select()
1184 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_select()
1201 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_select()
1269 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));  in NCR5380_transfer_pio()
1291 			NCR5380_write(OUTPUT_DATA_REG, *d);  in NCR5380_transfer_pio()
1306 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);  in NCR5380_transfer_pio()
1308 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |  in NCR5380_transfer_pio()
1311 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |  in NCR5380_transfer_pio()
1314 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |  in NCR5380_transfer_pio()
1319 			NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);  in NCR5380_transfer_pio()
1341 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);  in NCR5380_transfer_pio()
1343 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_transfer_pio()
1385 	NCR5380_write(TARGET_COMMAND_REG,  in do_reset()
1387 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);  in do_reset()
1389 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in do_reset()
1410 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);  in do_abort()
1428 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));  in do_abort()
1431 		NCR5380_write(INITIATOR_COMMAND_REG,  in do_abort()
1436 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);  in do_abort()
1453 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in do_abort()
1509 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));  in NCR5380_transfer_dma()
1510 	NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |  in NCR5380_transfer_dma()
1529 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_transfer_dma()
1531 		NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);  in NCR5380_transfer_dma()
1534 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);  in NCR5380_transfer_dma()
1536 		NCR5380_write(START_DMA_SEND_REG, 0);  in NCR5380_transfer_dma()
1719 				NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));  in NCR5380_information_transfer()
1721 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |  in NCR5380_information_transfer()
1725 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |  in NCR5380_information_transfer()
1811 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1842 					NCR5380_write(TARGET_COMMAND_REG, 0);  in NCR5380_information_transfer()
1848 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1862 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1873 					NCR5380_write(TARGET_COMMAND_REG, 0);  in NCR5380_information_transfer()
1892 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1901 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1918 						NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_information_transfer()
1962 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);  in NCR5380_information_transfer()
2033 	NCR5380_write(MODE_REG, MR_BASE);  in NCR5380_reselect()
2051 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);  in NCR5380_reselect()
2055 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_reselect()
2058 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_reselect()
2076 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));  in NCR5380_reselect()
2163 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);  in NCR5380_reselect()
2167 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in NCR5380_reselect()
2326 	NCR5380_write(MODE_REG, MR_BASE);  in bus_reset_cleanup()
2327 	NCR5380_write(TARGET_COMMAND_REG, 0);  in bus_reset_cleanup()
2328 	NCR5380_write(SELECT_ENABLE_REG, 0);  in bus_reset_cleanup()