917 	struct rockchip_opp_info *opp_info = &rknpu_dev->opp_info;  in npu_opp_helper()  local
927 		if (opp_info->scmi_clk)  in npu_opp_helper()
931 	ret = clk_bulk_prepare_enable(opp_info->num_clks, opp_info->clks);  in npu_opp_helper()
936 	rockchip_get_read_margin(dev, opp_info, new_supply_vdd->u_volt,  in npu_opp_helper()
944 		rockchip_set_intermediate_rate(dev, opp_info, clk, old_freq,  in npu_opp_helper()
962 		rockchip_set_read_margin(dev, opp_info, target_rm, is_set_rm);  in npu_opp_helper()
970 		rockchip_set_intermediate_rate(dev, opp_info, clk, old_freq,  in npu_opp_helper()
972 		rockchip_set_read_margin(dev, opp_info, target_rm, is_set_rm);  in npu_opp_helper()
996 	clk_bulk_disable_unprepare(opp_info->num_clks, opp_info->clks);  in npu_opp_helper()
1005 	rockchip_get_read_margin(dev, opp_info, old_supply_vdd->u_volt,  in npu_opp_helper()
1007 	rockchip_set_read_margin(dev, opp_info, opp_info->current_rm,  in npu_opp_helper()
1012 	clk_bulk_disable_unprepare(opp_info->num_clks, opp_info->clks);  in npu_opp_helper()
1265 				      struct rockchip_opp_info *opp_info,  in rk3588_npu_set_read_margin()  argument
1271 	if (!opp_info->grf || !opp_info->volt_rm_tbl)  in rk3588_npu_set_read_margin()
1274 	if (rm == opp_info->current_rm || rm == UINT_MAX)  in rk3588_npu_set_read_margin()
1280 		ret = regmap_read(opp_info->grf, offset, &val);  in rk3588_npu_set_read_margin()
1287 		regmap_write(opp_info->grf, offset, val | (rm << 2));  in rk3588_npu_set_read_margin()
1290 	opp_info->current_rm = rm;  in rk3588_npu_set_read_margin()
1336 	rockchip_get_opp_data(rockchip_npu_of_match, &rknpu_dev->opp_info);  in rknpu_devfreq_init()
1337 	ret = rockchip_init_opp_table(dev, &rknpu_dev->opp_info, "npu_leakage",  in rknpu_devfreq_init()
1376 	npu_mdevp.opp_info = &rknpu_dev->opp_info;  in rknpu_devfreq_init()
1787 		rknpu_dev->opp_info.scmi_clk = rknpu_dev->clks[0].clk;  in rknpu_probe()
2043 	struct rockchip_opp_info *opp_info = &rknpu_dev->opp_info;  in rknpu_runtime_suspend()  local
2045 	if (opp_info->scmi_clk) {  in rknpu_runtime_suspend()
2046 		if (clk_set_rate(opp_info->scmi_clk, POWER_DOWN_FREQ))  in rknpu_runtime_suspend()
2049 	opp_info->current_rm = UINT_MAX;  in rknpu_runtime_suspend()
2057 	struct rockchip_opp_info *opp_info = &rknpu_dev->opp_info;  in rknpu_runtime_resume()  local
2063 	ret = clk_bulk_prepare_enable(opp_info->num_clks, opp_info->clks);  in rknpu_runtime_resume()
2069 	if (opp_info->data && opp_info->data->set_read_margin)  in rknpu_runtime_resume()
2070 		opp_info->data->set_read_margin(dev, opp_info,  in rknpu_runtime_resume()
2071 						opp_info->target_rm);  in rknpu_runtime_resume()
2072 	if (opp_info->scmi_clk) {  in rknpu_runtime_resume()
2073 		if (clk_set_rate(opp_info->scmi_clk, rknpu_dev->current_freq))  in rknpu_runtime_resume()
2077 	clk_bulk_disable_unprepare(opp_info->num_clks, opp_info->clks);  in rknpu_runtime_resume()