14 static void __iomem *g_sfc_reg;  variable
20 	writel(SFC_RESET, g_sfc_reg + SFC_RCVR);  in sfc_reset()
22 	while ((readl(g_sfc_reg + SFC_RCVR) == SFC_RESET) && (timeout > 0)) {  in sfc_reset()
27 	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);  in sfc_reset()
32 	return  (u32)(readl(g_sfc_reg + SFC_VER) & 0xffff);  in sfc_get_version()
68 	writel(val, g_sfc_reg + SFC_DLL_CTRL0);  in sfc_set_delay_lines()
73 	g_sfc_reg = reg_addr;  in sfc_init()
74 	writel(0, g_sfc_reg + SFC_CTRL);  in sfc_init()
77 		writel(1, g_sfc_reg + SFC_LEN_CTRL);  in sfc_init()
84 	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);  in sfc_clean_irq()
85 	writel(0xFFFFFFFF, g_sfc_reg + SFC_IMR);  in sfc_clean_irq()
95 	reg = readl(g_sfc_reg + SFC_FSR);  in sfc_request()
98 	    (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))  in sfc_request()
112 		writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);  in sfc_request()
120 		writel(size, g_sfc_reg + SFC_LEN_EXT);  in sfc_request()
124 	writel(op->sfctrl.d32, g_sfc_reg + SFC_CTRL);  in sfc_request()
125 	writel(cmd.d32, g_sfc_reg + SFC_CMD);  in sfc_request()
128 		writel(addr, g_sfc_reg + SFC_ADDR);  in sfc_request()
140 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);  in sfc_request()
141 		writel(~((u32)DMA_INT), g_sfc_reg + SFC_IMR);  in sfc_request()
142 		writel((u32)dma_addr, g_sfc_reg + SFC_DMA_ADDR);  in sfc_request()
143 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);  in sfc_request()
147 		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&  in sfc_request()
165 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);  in sfc_request()
173 						       g_sfc_reg + SFC_DATA);  in sfc_request()
196 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);  in sfc_request()
205 						*p_data++ = readl(g_sfc_reg +  in sfc_request()
227 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);  in sfc_request()
232 					words = readl(g_sfc_reg + SFC_DATA);  in sfc_request()
254 	while (readl(g_sfc_reg + SFC_SR) & SFC_BUSY) {  in sfc_request()