190 	union MTRANS_CFG_T master_reg;  in nandc_xfer_start()  local
235 		master_reg.d32 =  nandc_readl(NANDC_V9_MTRANS_CFG);  in nandc_xfer_start()
236 		master_reg.V9.incr_num = 16;  in nandc_xfer_start()
237 		master_reg.V9.burst = 7;  in nandc_xfer_start()
238 		master_reg.V9.hsize = 2;  in nandc_xfer_start()
239 		master_reg.V9.bus_mode = 1;  in nandc_xfer_start()
240 		master_reg.V9.ahb_wr = !dir;  in nandc_xfer_start()
241 		master_reg.V9.ahb_wr_st = 1;  in nandc_xfer_start()
242 		master_reg.V9.redundance_size = 0;  in nandc_xfer_start()
244 		nandc_writel(master_reg.d32, NANDC_V9_MTRANS_CFG);  in nandc_xfer_start()
261 		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);  in nandc_xfer_start()
262 		master_reg.V6.bus_mode = 0;  in nandc_xfer_start()
294 		master_reg.d32 = 0;  in nandc_xfer_start()
295 		master_reg.V6.incr_num = 16;  in nandc_xfer_start()
296 		master_reg.V6.burst = 7;  in nandc_xfer_start()
297 		master_reg.V6.hsize = 2;  in nandc_xfer_start()
298 		master_reg.V6.bus_mode = 1;  in nandc_xfer_start()
299 		master_reg.V6.ahb_wr = !dir;  in nandc_xfer_start()
300 		master_reg.V6.ahb_wr_st = 1;  in nandc_xfer_start()
302 		nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);  in nandc_xfer_start()
316 	union MTRANS_CFG_T master_reg;  in nandc_xfer_done()  local
321 		master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG);  in nandc_xfer_done()
322 		if (master_reg.V9.ahb_wr != 0) {  in nandc_xfer_done()
353 		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);  in nandc_xfer_done()
354 		if (master_reg.V6.bus_mode != 0) {  in nandc_xfer_done()
357 		if (master_reg.V6.ahb_wr != 0) {  in nandc_xfer_done()