Lines Matching +full:sc7180 +full:- +full:mss
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
233 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
257 dev_err(qproc->dev, in q6v5_regulator_enable()
268 dev_err(qproc->dev, in q6v5_regulator_enable()
276 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
283 for (; i >= 0; i--) { in q6v5_regulator_enable()
328 for (i--; i >= 0; i--) in q6v5_clk_enable()
362 for (i--; i >= 0; i--) { in q6v5_pds_enable()
388 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
415 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
418 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
419 memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
420 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
428 struct q6v5 *qproc = rproc->priv; in q6v5_load()
431 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
432 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
433 return -EINVAL; in q6v5_load()
436 memcpy(qproc->mba_region, fw->data, fw->size); in q6v5_load()
446 if (qproc->has_alt_reset) { in q6v5_reset_assert()
447 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
448 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
449 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
450 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
456 * BIT before triggering Q6 MSS reset. AXI_GATING_VALID_OVERRIDE in q6v5_reset_assert()
457 * is withdrawn post MSS assert followed by a MSS deassert, in q6v5_reset_assert()
460 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
461 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
463 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
464 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
465 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
467 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
469 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
479 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
480 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
481 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
482 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
483 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
484 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
485 } else if (qproc->has_spare_reg) { in q6v5_reset_deassert()
486 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
488 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
501 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
506 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
522 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
532 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
542 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
545 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
548 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
549 qproc->mba_size)) in q6v5_dump_mba_logs()
556 memcpy(data, qproc->mba_region, MBA_LOG_SIZE); in q6v5_dump_mba_logs()
557 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
566 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
567 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
569 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
571 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
575 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
576 return -ETIMEDOUT; in q6v5proc_reset()
579 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
580 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
582 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
584 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
587 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
594 } else if (qproc->version == MSS_SC7180) { in q6v5proc_reset()
595 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
597 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
599 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
603 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
604 return -ETIMEDOUT; in q6v5proc_reset()
608 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
610 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
612 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
616 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
617 return -ETIMEDOUT; in q6v5proc_reset()
620 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
621 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
623 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
625 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
626 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
631 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
632 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
635 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
638 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
644 } else if (qproc->version == MSS_MSM8996 || in q6v5proc_reset()
645 qproc->version == MSS_MSM8998) { in q6v5proc_reset()
650 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
653 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
655 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
658 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
660 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
663 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
667 dev_err(qproc->dev, in q6v5proc_reset()
672 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
674 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
675 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
680 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
683 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
685 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
689 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
692 if (qproc->version == MSS_MSM8996) { in q6v5proc_reset()
700 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
701 for (; i >= 0; i--) { in q6v5proc_reset()
703 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
709 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
713 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
715 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
718 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
720 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
723 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
725 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
726 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
732 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
735 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
737 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
739 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
741 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
745 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
748 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
750 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
753 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
755 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
758 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
760 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
765 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
766 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
768 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
769 ret = -EINVAL; in q6v5proc_reset()
798 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
819 ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
822 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
823 return -ENOMEM; in q6v5_mpss_init_image()
833 dev_err(qproc->dev, in q6v5_mpss_init_image()
835 ret = -EAGAIN; in q6v5_mpss_init_image()
839 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
840 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
843 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
844 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
846 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
852 dev_warn(qproc->dev, in q6v5_mpss_init_image()
856 dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); in q6v5_mpss_init_image()
864 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
867 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
870 if (!phdr->p_memsz) in q6v5_phdr_valid()
882 qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
884 ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
886 dev_err(qproc->dev, "failed to enable active power domains\n"); in q6v5_mba_load()
890 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
892 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
896 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
897 qproc->proxy_reg_count); in q6v5_mba_load()
899 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
903 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
904 qproc->proxy_clk_count); in q6v5_mba_load()
906 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
910 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
911 qproc->active_reg_count); in q6v5_mba_load()
913 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
917 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
918 qproc->reset_clk_count); in q6v5_mba_load()
920 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
926 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
930 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
931 qproc->active_clk_count); in q6v5_mba_load()
933 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
941 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
942 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
944 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
949 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
950 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
952 dev_err(qproc->dev, in q6v5_mba_load()
957 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
958 if (qproc->dp_size) { in q6v5_mba_load()
959 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
960 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
968 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
969 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
973 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
974 ret = -EINVAL; in q6v5_mba_load()
978 qproc->dump_mba_loaded = true; in q6v5_mba_load()
982 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
983 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
984 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
987 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
988 false, qproc->mba_phys, in q6v5_mba_load()
989 qproc->mba_size); in q6v5_mba_load()
991 dev_err(qproc->dev, in q6v5_mba_load()
998 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
999 qproc->active_clk_count); in q6v5_mba_load()
1003 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1004 qproc->reset_clk_count); in q6v5_mba_load()
1006 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1007 qproc->active_reg_count); in q6v5_mba_load()
1009 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1010 qproc->proxy_clk_count); in q6v5_mba_load()
1012 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1013 qproc->proxy_reg_count); in q6v5_mba_load()
1015 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1017 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
1019 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1029 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1030 qproc->dp_size = 0; in q6v5_mba_reclaim()
1032 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1033 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1034 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1035 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1037 * To avoid high MX current during LPASS/MSS restart. in q6v5_mba_reclaim()
1039 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1042 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1047 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1048 qproc->reset_clk_count); in q6v5_mba_reclaim()
1049 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1050 qproc->active_clk_count); in q6v5_mba_reclaim()
1051 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1052 qproc->active_reg_count); in q6v5_mba_reclaim()
1053 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_reclaim()
1058 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1059 qproc->mba_phys, in q6v5_mba_reclaim()
1060 qproc->mba_size); in q6v5_mba_reclaim()
1063 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1065 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1066 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1067 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1068 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1069 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1070 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1076 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1080 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1112 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1114 return -EINVAL; in q6v5_mpss_load()
1116 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1118 return -ENOMEM; in q6v5_mpss_load()
1120 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1122 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1127 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1133 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1136 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1142 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1145 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1146 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1148 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1149 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1156 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1157 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1159 /* Share ownership between Linux and MSS, during segment loading */ in q6v5_mpss_load()
1160 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1161 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1163 dev_err(qproc->dev, in q6v5_mpss_load()
1165 ret = -EAGAIN; in q6v5_mpss_load()
1169 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1170 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1172 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1178 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1179 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1180 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1181 ret = -EINVAL; in q6v5_mpss_load()
1185 if (phdr->p_filesz > phdr->p_memsz) { in q6v5_mpss_load()
1186 dev_err(qproc->dev, in q6v5_mpss_load()
1189 ret = -EINVAL; in q6v5_mpss_load()
1193 ptr = memremap(qproc->mpss_phys + offset, phdr->p_memsz, MEMREMAP_WC); in q6v5_mpss_load()
1195 dev_err(qproc->dev, in q6v5_mpss_load()
1196 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1197 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1201 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1202 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1203 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1204 dev_err(qproc->dev, in q6v5_mpss_load()
1207 ret = -EINVAL; in q6v5_mpss_load()
1212 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1213 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1215 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1216 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1217 ptr, phdr->p_filesz); in q6v5_mpss_load()
1219 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1224 if (seg_fw->size != phdr->p_filesz) { in q6v5_mpss_load()
1225 dev_err(qproc->dev, in q6v5_mpss_load()
1228 ret = -EINVAL; in q6v5_mpss_load()
1237 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1238 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1239 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1242 size += phdr->p_memsz; in q6v5_mpss_load()
1244 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1246 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1247 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1248 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1250 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1252 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1254 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1261 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1262 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1264 dev_err(qproc->dev, in q6v5_mpss_load()
1266 ret = -EAGAIN; in q6v5_mpss_load()
1271 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1272 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1274 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1276 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1291 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1292 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1296 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1300 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1302 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1303 qproc->mpss_size); in qcom_q6v5_dump_segment()
1308 ptr = memremap(qproc->mpss_phys + offset + cp_offset, size, MEMREMAP_WC); in qcom_q6v5_dump_segment()
1317 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1320 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1321 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1323 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1325 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1326 qproc->mpss_size); in qcom_q6v5_dump_segment()
1334 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_start()
1342 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1343 qproc->dp_size ? "" : "out"); in q6v5_start()
1349 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1350 if (ret == -ETIMEDOUT) { in q6v5_start()
1351 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1355 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1356 false, qproc->mba_phys, in q6v5_start()
1357 qproc->mba_size); in q6v5_start()
1359 dev_err(qproc->dev, in q6v5_start()
1363 qproc->current_dump_size = 0; in q6v5_start()
1376 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_stop()
1379 ret = qcom_q6v5_request_stop(&qproc->q6v5); in q6v5_stop()
1380 if (ret == -ETIMEDOUT) in q6v5_stop()
1381 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1395 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1399 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1401 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1402 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1408 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1410 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1412 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1418 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1419 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1425 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1443 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1444 qproc->proxy_clk_count); in qcom_msa_handover()
1445 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1446 qproc->proxy_reg_count); in qcom_msa_handover()
1447 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1457 qproc->reg_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1458 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1459 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1462 qproc->rmb_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1463 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1464 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1466 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1467 "qcom,halt-regs", 3, 0, &args); in q6v5_init_mem()
1469 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1470 return -EINVAL; in q6v5_init_mem()
1473 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1475 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1476 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1478 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1479 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1480 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1482 if (qproc->has_spare_reg) { in q6v5_init_mem()
1483 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1484 "qcom,spare-regs", in q6v5_init_mem()
1487 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1488 return -EINVAL; in q6v5_init_mem()
1491 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1493 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1494 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1496 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1515 if (rc != -EPROBE_DEFER) in q6v5_init_clocks()
1541 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1549 for (i--; i >= 0; i--) in q6v5_pds_attach()
1566 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1568 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1569 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1570 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1573 if (qproc->has_alt_reset || qproc->has_spare_reg) { in q6v5_init_reset()
1574 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1576 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1577 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1578 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1593 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1594 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1596 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1598 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1599 "memory-region", 0); in q6v5_alloc_memory_region()
1601 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1608 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1612 qproc->mba_phys = r.start; in q6v5_alloc_memory_region()
1613 qproc->mba_size = resource_size(&r); in q6v5_alloc_memory_region()
1614 qproc->mba_region = devm_ioremap_wc(qproc->dev, qproc->mba_phys, qproc->mba_size); in q6v5_alloc_memory_region()
1615 if (!qproc->mba_region) { in q6v5_alloc_memory_region()
1616 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_alloc_memory_region()
1617 &r.start, qproc->mba_size); in q6v5_alloc_memory_region()
1618 return -EBUSY; in q6v5_alloc_memory_region()
1622 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1623 "memory-region", 1); in q6v5_alloc_memory_region()
1625 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1626 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1633 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1637 qproc->mpss_phys = qproc->mpss_reloc = r.start; in q6v5_alloc_memory_region()
1638 qproc->mpss_size = resource_size(&r); in q6v5_alloc_memory_region()
1651 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1653 return -EINVAL; in q6v5_probe()
1655 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1656 return -EPROBE_DEFER; in q6v5_probe()
1658 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1659 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1661 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1664 rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
1667 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
1668 return -ENOMEM; in q6v5_probe()
1671 rproc->auto_boot = false; in q6v5_probe()
1674 qproc = (struct q6v5 *)rproc->priv; in q6v5_probe()
1675 qproc->dev = &pdev->dev; in q6v5_probe()
1676 qproc->rproc = rproc; in q6v5_probe()
1677 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
1678 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1679 1, &qproc->hexagon_mdt_image); in q6v5_probe()
1680 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1685 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
1694 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
1695 desc->proxy_clk_names); in q6v5_probe()
1697 dev_err(&pdev->dev, "Failed to get proxy clocks.\n"); in q6v5_probe()
1700 qproc->proxy_clk_count = ret; in q6v5_probe()
1702 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
1703 desc->reset_clk_names); in q6v5_probe()
1705 dev_err(&pdev->dev, "Failed to get reset clocks.\n"); in q6v5_probe()
1708 qproc->reset_clk_count = ret; in q6v5_probe()
1710 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
1711 desc->active_clk_names); in q6v5_probe()
1713 dev_err(&pdev->dev, "Failed to get active clocks.\n"); in q6v5_probe()
1716 qproc->active_clk_count = ret; in q6v5_probe()
1718 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
1719 desc->proxy_supply); in q6v5_probe()
1721 dev_err(&pdev->dev, "Failed to get proxy regulators.\n"); in q6v5_probe()
1724 qproc->proxy_reg_count = ret; in q6v5_probe()
1726 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
1727 desc->active_supply); in q6v5_probe()
1729 dev_err(&pdev->dev, "Failed to get active regulators.\n"); in q6v5_probe()
1732 qproc->active_reg_count = ret; in q6v5_probe()
1734 ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, in q6v5_probe()
1735 desc->active_pd_names); in q6v5_probe()
1737 dev_err(&pdev->dev, "Failed to attach active power domains\n"); in q6v5_probe()
1740 qproc->active_pd_count = ret; in q6v5_probe()
1742 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
1743 desc->proxy_pd_names); in q6v5_probe()
1745 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
1748 qproc->proxy_pd_count = ret; in q6v5_probe()
1750 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
1755 qproc->version = desc->version; in q6v5_probe()
1756 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
1757 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
1759 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, in q6v5_probe()
1764 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1765 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1766 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
1767 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1768 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
1769 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
1770 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
1771 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
1782 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
1784 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
1785 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1786 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
1788 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
1790 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_probe()
1800 struct rproc *rproc = qproc->rproc; in q6v5_remove()
1804 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
1805 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
1806 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
1807 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
1809 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
1810 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_remove()
1841 "mss",
1877 "mss",
1999 .supply = "mss",
2023 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2024 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2025 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2026 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2027 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2028 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2029 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2038 .name = "qcom-q6v5-mss",
2044 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");