pinctrl/samsung/pinctrl-samsung.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25  * enum pincfg_type - possible pin configuration types supported.
46  * packed together into a 16-bits. The upper 8-bits represent the configuration
47  * type and the lower 8-bits hold the value of the configuration type.
57  * enum eint_type - possible external interrupt types.
77 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
108  * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
110  * @pctl_offset: starting offset of the pin-bank registers.
111  * @pctl_res_idx: index of base address for pin-bank registers.
116  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
132  * struct samsung_pin_bank: represent a controller pin-bank.
134  * @pctl_base: base address of the pin-bank registers
135  * @pctl_offset: starting offset of the pin-bank registers.
137  * @eint_base: base address of the pin-bank EINT registers.
141  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
144  * @soc_priv: per-bank private data for SoC-specific code.
180  * struct samsung_retention_data: runtime pin-bank retention control data.
200  * struct samsung_retention_data: represent a pin-bank retention control data.
228  * @resume: platform specific resume callback, executed during pin controller
232  * retention_data and suspend in order for proper suspend/resume to work.
243 	void		(*resume)(struct samsung_pinctrl_drv_data *);  member
250  *             to each bank samsung_pin_bank->pctl_base and used on legacy
267  * @resume: platform specific resume callback, executed during pin controller
292 	void (*resume)(struct samsung_pinctrl_drv_data *);  member