Lines Matching refs:eint_offset
57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
85 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()
116 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()
344 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()
512 + b->eint_offset); in exynos_irq_demux_eint16_31()
514 + b->eint_offset); in exynos_irq_demux_eint16_31()
642 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
644 + 2 * bank->eint_offset); in exynos_pinctrl_suspend_bank()
646 + 2 * bank->eint_offset + 4); in exynos_pinctrl_suspend_bank()
648 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
684 + bank->eint_offset), save->eint_con); in exynos_pinctrl_resume_bank()
687 + 2 * bank->eint_offset), save->eint_fltcon0); in exynos_pinctrl_resume_bank()
690 + 2 * bank->eint_offset + 4), save->eint_fltcon1); in exynos_pinctrl_resume_bank()
693 + bank->eint_offset), save->eint_mask); in exynos_pinctrl_resume_bank()
696 + bank->eint_offset); in exynos_pinctrl_resume_bank()
698 + 2 * bank->eint_offset); in exynos_pinctrl_resume_bank()
700 + 2 * bank->eint_offset + 4); in exynos_pinctrl_resume_bank()
702 + bank->eint_offset); in exynos_pinctrl_resume_bank()