106 	u32 reg = STMFX_REG_GPIO_STATE + get_reg(offset);  in stmfx_gpio_get()  local
119 	u32 reg = value ? STMFX_REG_GPO_SET : STMFX_REG_GPO_CLR;  in stmfx_gpio_set()  local
129 	u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);  in stmfx_gpio_get_direction()  local
150 	u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);  in stmfx_gpio_direction_input()  local
160 	u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);  in stmfx_gpio_direction_output()  local
171 	u32 reg = STMFX_REG_GPIO_PUPD + get_reg(offset);  in stmfx_pinconf_get_pupd()  local
185 	u32 reg = STMFX_REG_GPIO_PUPD + get_reg(offset);  in stmfx_pinconf_set_pupd()  local
194 	u32 reg = STMFX_REG_GPIO_TYPE + get_reg(offset);  in stmfx_pinconf_get_type()  local
208 	u32 reg = STMFX_REG_GPIO_TYPE + get_reg(offset);  in stmfx_pinconf_set_type()  local
424 	u32 reg = get_reg(data->hwirq);  in stmfx_pinctrl_irq_mask()  local
434 	u32 reg = get_reg(data->hwirq);  in stmfx_pinctrl_irq_unmask()  local
444 	u32 reg = get_reg(data->hwirq);  in stmfx_pinctrl_irq_set_type()  local
490 	u32 reg = get_reg(data->hwirq);  in stmfx_pinctrl_irq_bus_sync_unlock()  local
537 	u32 reg = get_reg(offset);  in stmfx_pinctrl_irq_toggle_trigger()  local