Lines Matching +full:pdm +full:- +full:clk +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
31 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/clk.h>
37 #include <dt-bindings/pinctrl/rockchip.h>
41 #include "pinctrl-rockchip.h"
68 { .offset = -1 }, \
69 { .offset = -1 }, \
70 { .offset = -1 }, \
71 { .offset = -1 }, \
81 { .type = iom0, .offset = -1 }, \
82 { .type = iom1, .offset = -1 }, \
83 { .type = iom2, .offset = -1 }, \
84 { .type = iom3, .offset = -1 }, \
109 { .offset = -1 }, \
110 { .offset = -1 }, \
111 { .offset = -1 }, \
112 { .offset = -1 }, \
115 { .drv_type = type0, .offset = -1 }, \
116 { .drv_type = type1, .offset = -1 }, \
117 { .drv_type = type2, .offset = -1 }, \
118 { .drv_type = type3, .offset = -1 }, \
130 { .type = iom0, .offset = -1 }, \
131 { .type = iom1, .offset = -1 }, \
132 { .type = iom2, .offset = -1 }, \
133 { .type = iom3, .offset = -1 }, \
149 { .offset = -1 }, \
150 { .offset = -1 }, \
151 { .offset = -1 }, \
152 { .offset = -1 }, \
155 { .drv_type = drv0, .offset = -1 }, \
156 { .drv_type = drv1, .offset = -1 }, \
157 { .drv_type = drv2, .offset = -1 }, \
158 { .drv_type = drv3, .offset = -1 }, \
175 { .type = iom0, .offset = -1 }, \
176 { .type = iom1, .offset = -1 }, \
177 { .type = iom2, .offset = -1 }, \
178 { .type = iom3, .offset = -1 }, \
199 { .type = iom0, .offset = -1 }, \
200 { .type = iom1, .offset = -1 }, \
201 { .type = iom2, .offset = -1 }, \
202 { .type = iom3, .offset = -1 }, \
230 -1, -1, -1, -1)
259 for (i = 0; i < info->ngroups; i++) { in pinctrl_name_to_group()
260 if (!strcmp(info->groups[i].name, name)) in pinctrl_name_to_group()
261 return &info->groups[i]; in pinctrl_name_to_group()
274 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in pin_to_bank()
276 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
286 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in bank_num_to_bank()
289 for (i = 0; i < info->ctrl->nr_banks; i++, b++) { in bank_num_to_bank()
290 if (b->bank_num == num) in bank_num_to_bank()
294 return ERR_PTR(-EINVAL); in bank_num_to_bank()
305 return info->ngroups; in rockchip_get_groups_count()
313 return info->groups[selector].name; in rockchip_get_group_name()
322 if (selector >= info->ngroups) in rockchip_get_group_pins()
323 return -EINVAL; in rockchip_get_group_pins()
325 *pins = info->groups[selector].pins; in rockchip_get_group_pins()
326 *npins = info->groups[selector].npins; in rockchip_get_group_pins()
333 struct pinctrl_map **map, unsigned *num_maps) in rockchip_dt_node_to_map() argument
337 struct device *dev = info->dev; in rockchip_dt_node_to_map()
347 grp = pinctrl_name_to_group(info, np->name); in rockchip_dt_node_to_map()
350 return -EINVAL; in rockchip_dt_node_to_map()
353 map_num += grp->npins; in rockchip_dt_node_to_map()
357 return -ENOMEM; in rockchip_dt_node_to_map()
359 *map = new_map; in rockchip_dt_node_to_map()
362 /* create mux map */ in rockchip_dt_node_to_map()
366 return -EINVAL; in rockchip_dt_node_to_map()
369 new_map[0].data.mux.function = parent->name; in rockchip_dt_node_to_map()
370 new_map[0].data.mux.group = np->name; in rockchip_dt_node_to_map()
373 /* create config map */ in rockchip_dt_node_to_map()
375 for (i = 0; i < grp->npins; i++) { in rockchip_dt_node_to_map()
378 pin_get_name(pctldev, grp->pins[i]); in rockchip_dt_node_to_map()
379 new_map[i].data.configs.configs = grp->data[i].configs; in rockchip_dt_node_to_map()
380 new_map[i].data.configs.num_configs = grp->data[i].nconfigs; in rockchip_dt_node_to_map()
384 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in rockchip_dt_node_to_map()
390 struct pinctrl_map *map, unsigned num_maps) in rockchip_dt_free_map() argument
392 kfree(map); in rockchip_dt_free_map()
803 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux()
804 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_recalced_mux()
808 for (i = 0; i < ctrl->niomux_recalced; i++) { in rockchip_get_recalced_mux()
809 data = &ctrl->iomux_recalced[i]; in rockchip_get_recalced_mux()
810 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
811 data->pin == pin) in rockchip_get_recalced_mux()
815 if (i >= ctrl->niomux_recalced) in rockchip_get_recalced_mux()
818 *reg = data->reg; in rockchip_get_recalced_mux()
819 *mask = data->mask; in rockchip_get_recalced_mux()
820 *bit = data->bit; in rockchip_get_recalced_mux()
838 RK_MUXROUTE_SAME(2, RK_PA0, 1, 0x184, BIT(16 + 7)), /* cif-d2m0 */
839 RK_MUXROUTE_SAME(3, RK_PA3, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d2m1 */
840 RK_MUXROUTE_SAME(3, RK_PC6, 2, 0x184, BIT(16 + 8)), /* pdm-m0 */
841 RK_MUXROUTE_SAME(2, RK_PC6, 1, 0x184, BIT(16 + 8) | BIT(8)), /* pdm-m1 */
842 RK_MUXROUTE_SAME(1, RK_PD3, 2, 0x184, BIT(16 + 10)), /* uart2-rxm0 */
843 RK_MUXROUTE_SAME(2, RK_PB6, 2, 0x184, BIT(16 + 10) | BIT(10)), /* uart2-rxm1 */
844 RK_MUXROUTE_SAME(0, RK_PC1, 2, 0x184, BIT(16 + 9)), /* uart3-rxm0 */
845 RK_MUXROUTE_SAME(1, RK_PB7, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-rxm1 */
849 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x144, BIT(16 + 3) | BIT(16 + 4)), /* spi-0 */
850 RK_MUXROUTE_SAME(1, RK_PD3, 3, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(3)), /* spi-1 */
851 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(4)), /* spi-2 */
852 RK_MUXROUTE_SAME(1, RK_PA5, 1, 0x144, BIT(16 + 5)), /* i2s-0 */
853 RK_MUXROUTE_SAME(0, RK_PB6, 1, 0x144, BIT(16 + 5) | BIT(5)), /* i2s-1 */
854 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x144, BIT(16 + 6)), /* emmc-0 */
855 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x144, BIT(16 + 6) | BIT(6)), /* emmc-1 */
859 RK_MUXROUTE_SAME(0, RK_PD0, 1, 0xa0, BIT(16 + 11)), /* non-iomuxed emmc/flash pins on flash-dqs */
860 …UTE_SAME(0, RK_PD0, 2, 0xa0, BIT(16 + 11) | BIT(11)), /* non-iomuxed emmc/flash pins on emmc-clk */
864 RK_MUXROUTE_SAME(0, RK_PD2, 1, 0x50, BIT(16)), /* pwm0-0 */
865 RK_MUXROUTE_SAME(3, RK_PC5, 1, 0x50, BIT(16) | BIT(0)), /* pwm0-1 */
866 RK_MUXROUTE_SAME(0, RK_PD3, 1, 0x50, BIT(16 + 1)), /* pwm1-0 */
867 RK_MUXROUTE_SAME(0, RK_PD6, 2, 0x50, BIT(16 + 1) | BIT(1)), /* pwm1-1 */
868 RK_MUXROUTE_SAME(0, RK_PD4, 1, 0x50, BIT(16 + 2)), /* pwm2-0 */
869 RK_MUXROUTE_SAME(1, RK_PB4, 2, 0x50, BIT(16 + 2) | BIT(2)), /* pwm2-1 */
870 RK_MUXROUTE_SAME(3, RK_PD2, 1, 0x50, BIT(16 + 3)), /* pwm3-0 */
871 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 3) | BIT(3)), /* pwm3-1 */
872 RK_MUXROUTE_SAME(1, RK_PA1, 1, 0x50, BIT(16 + 4)), /* sdio-0_d0 */
873 RK_MUXROUTE_SAME(3, RK_PA2, 1, 0x50, BIT(16 + 4) | BIT(4)), /* sdio-1_d0 */
874 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x50, BIT(16 + 5)), /* spi-0_rx */
875 RK_MUXROUTE_SAME(2, RK_PA0, 2, 0x50, BIT(16 + 5) | BIT(5)), /* spi-1_rx */
876 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x50, BIT(16 + 7)), /* emmc-0_cmd */
877 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x50, BIT(16 + 7) | BIT(7)), /* emmc-1_cmd */
878 RK_MUXROUTE_SAME(1, RK_PC3, 2, 0x50, BIT(16 + 8)), /* uart2-0_rx */
879 RK_MUXROUTE_SAME(1, RK_PB2, 2, 0x50, BIT(16 + 8) | BIT(8)), /* uart2-1_rx */
880 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x50, BIT(16 + 11)), /* uart1-0_rx */
881 RK_MUXROUTE_SAME(3, RK_PB5, 1, 0x50, BIT(16 + 11) | BIT(11)), /* uart1-1_rx */
896 RK_MUXROUTE_SAME(1, RK_PA3, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclktxm0 */
897 RK_MUXROUTE_SAME(1, RK_PA4, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclkrxm0 */
898 RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclktxm1 */
899 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclkrxm1 */
900 RK_MUXROUTE_SAME(1, RK_PA4, 3, 0x308, BIT(16 + 12) | BIT(16 + 13)), /* pdm-clkm0 */
901 RK_MUXROUTE_SAME(1, RK_PB6, 4, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(12)), /* pdm-clkm1 */
902 RK_MUXROUTE_SAME(2, RK_PA6, 2, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(13)), /* pdm-clkm2 */
903 RK_MUXROUTE_SAME(2, RK_PA4, 3, 0x600, BIT(16 + 2) | BIT(2)), /* pdm-clkm-m2 */
921 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 2) | BIT(2)), /* gmac-m1_rxd0 */
922 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x50, BIT(16 + 10) | BIT(10)), /* gmac-m1-optimized_rxd3 */
1022 RK_MUXROUTE_GRF(1, RK_PA4, 3, 0x0314, WRITE_MASK_VAL(1, 0, 0)), /* PDM IO mux M0 */
1023 RK_MUXROUTE_GRF(1, RK_PA6, 3, 0x0314, WRITE_MASK_VAL(1, 0, 0)), /* PDM IO mux M0 */
1024 RK_MUXROUTE_GRF(3, RK_PD6, 5, 0x0314, WRITE_MASK_VAL(1, 0, 1)), /* PDM IO mux M1 */
1025 RK_MUXROUTE_GRF(4, RK_PA0, 4, 0x0314, WRITE_MASK_VAL(1, 0, 1)), /* PDM IO mux M1 */
1026 RK_MUXROUTE_GRF(3, RK_PC4, 5, 0x0314, WRITE_MASK_VAL(1, 0, 2)), /* PDM IO mux M2 */
1041 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route()
1042 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux_route()
1046 for (i = 0; i < ctrl->niomux_routes; i++) { in rockchip_get_mux_route()
1047 data = &ctrl->iomux_routes[i]; in rockchip_get_mux_route()
1048 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route()
1049 (data->pin == pin) && (data->func == mux)) in rockchip_get_mux_route()
1053 if (i >= ctrl->niomux_routes) in rockchip_get_mux_route()
1056 *loc = data->route_location; in rockchip_get_mux_route()
1057 *reg = data->route_offset; in rockchip_get_mux_route()
1058 *value = data->route_val; in rockchip_get_mux_route()
1065 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
1066 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux()
1074 return -EINVAL; in rockchip_get_mux()
1076 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
1077 dev_err(info->dev, "pin %d is unrouted\n", pin); in rockchip_get_mux()
1078 return -EINVAL; in rockchip_get_mux()
1081 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
1084 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
1085 regmap = info->regmap_pmu; in rockchip_get_mux()
1086 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_get_mux()
1087 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_get_mux()
1089 regmap = info->regmap_base; in rockchip_get_mux()
1092 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
1093 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
1109 if (bank->recalced_mask & BIT(pin)) in rockchip_get_mux()
1112 if (ctrl->type == RK3588) { in rockchip_get_mux()
1113 if (bank->bank_num == 0) { in rockchip_get_mux()
1117 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_get_mux()
1126 regmap = info->regmap_base; in rockchip_get_mux()
1128 } else if (bank->bank_num > 0) { in rockchip_get_mux()
1143 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_verify_mux()
1144 struct device *dev = info->dev; in rockchip_verify_mux()
1148 return -EINVAL; in rockchip_verify_mux()
1150 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_verify_mux()
1152 return -EINVAL; in rockchip_verify_mux()
1155 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_verify_mux()
1158 return -ENOTSUPP; in rockchip_verify_mux()
1180 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
1181 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_mux()
1182 struct device *dev = info->dev; in rockchip_set_mux()
1193 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_set_mux()
1196 dev_dbg(dev, "setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rockchip_set_mux()
1198 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
1199 regmap = info->regmap_pmu; in rockchip_set_mux()
1200 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_set_mux()
1201 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_set_mux()
1203 regmap = info->regmap_base; in rockchip_set_mux()
1206 mux_type = bank->iomux[iomux_num].type; in rockchip_set_mux()
1207 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
1223 if (bank->recalced_mask & BIT(pin)) in rockchip_set_mux()
1227 if (ctrl->type == RK3562) { in rockchip_set_mux()
1228 if (bank->bank_num == 1) { in rockchip_set_mux()
1239 if (ctrl->type == RK3588) { in rockchip_set_mux()
1240 if (bank->bank_num == 0) { in rockchip_set_mux()
1245 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1254 regmap = info->regmap_base; in rockchip_set_mux()
1259 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1269 regmap = info->regmap_base; in rockchip_set_mux()
1279 } else if (bank->bank_num > 0) { in rockchip_set_mux()
1285 return -EINVAL; in rockchip_set_mux()
1287 if (bank->route_mask & BIT(pin)) { in rockchip_set_mux()
1295 route_regmap = info->regmap_pmu; in rockchip_set_mux()
1298 route_regmap = info->regmap_base; in rockchip_set_mux()
1336 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_pull_reg_and_bit()
1339 if (bank->bank_num == 0) { in px30_calc_pull_reg_and_bit()
1340 *regmap = info->regmap_pmu; in px30_calc_pull_reg_and_bit()
1343 *regmap = info->regmap_base; in px30_calc_pull_reg_and_bit()
1347 *reg -= 0x10; in px30_calc_pull_reg_and_bit()
1348 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE; in px30_calc_pull_reg_and_bit()
1368 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_drv_reg_and_bit()
1371 if (bank->bank_num == 0) { in px30_calc_drv_reg_and_bit()
1372 *regmap = info->regmap_pmu; in px30_calc_drv_reg_and_bit()
1375 *regmap = info->regmap_base; in px30_calc_drv_reg_and_bit()
1379 *reg -= 0x10; in px30_calc_drv_reg_and_bit()
1380 *reg += bank->bank_num * PX30_DRV_BANK_STRIDE; in px30_calc_drv_reg_and_bit()
1401 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_schmitt_reg_and_bit()
1404 if (bank->bank_num == 0) { in px30_calc_schmitt_reg_and_bit()
1405 *regmap = info->regmap_pmu; in px30_calc_schmitt_reg_and_bit()
1409 *regmap = info->regmap_base; in px30_calc_schmitt_reg_and_bit()
1412 *reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE; in px30_calc_schmitt_reg_and_bit()
1433 struct rockchip_pinctrl *info = bank->drvdata; in rv1106_calc_drv_reg_and_bit()
1436 switch (bank->bank_num) { in rv1106_calc_drv_reg_and_bit()
1438 *regmap = info->regmap_pmu; in rv1106_calc_drv_reg_and_bit()
1443 *regmap = info->regmap_base; in rv1106_calc_drv_reg_and_bit()
1448 *regmap = info->regmap_base; in rv1106_calc_drv_reg_and_bit()
1453 *regmap = info->regmap_base; in rv1106_calc_drv_reg_and_bit()
1458 *regmap = info->regmap_base; in rv1106_calc_drv_reg_and_bit()
1463 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_drv_reg_and_bit()
1486 struct rockchip_pinctrl *info = bank->drvdata; in rv1106_calc_pull_reg_and_bit()
1489 switch (bank->bank_num) { in rv1106_calc_pull_reg_and_bit()
1491 *regmap = info->regmap_pmu; in rv1106_calc_pull_reg_and_bit()
1496 *regmap = info->regmap_base; in rv1106_calc_pull_reg_and_bit()
1501 *regmap = info->regmap_base; in rv1106_calc_pull_reg_and_bit()
1506 *regmap = info->regmap_base; in rv1106_calc_pull_reg_and_bit()
1511 *regmap = info->regmap_base; in rv1106_calc_pull_reg_and_bit()
1516 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_pull_reg_and_bit()
1540 struct rockchip_pinctrl *info = bank->drvdata; in rv1106_calc_schmitt_reg_and_bit()
1543 switch (bank->bank_num) { in rv1106_calc_schmitt_reg_and_bit()
1545 *regmap = info->regmap_pmu; in rv1106_calc_schmitt_reg_and_bit()
1550 *regmap = info->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
1555 *regmap = info->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
1560 *regmap = info->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
1565 *regmap = info->regmap_base; in rv1106_calc_schmitt_reg_and_bit()
1570 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_schmitt_reg_and_bit()
1591 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_pull_reg_and_bit()
1594 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
1595 *regmap = info->regmap_pmu; in rv1108_calc_pull_reg_and_bit()
1599 *regmap = info->regmap_base; in rv1108_calc_pull_reg_and_bit()
1601 *reg -= 0x10; in rv1108_calc_pull_reg_and_bit()
1602 *reg += bank->bank_num * RV1108_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
1622 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_drv_reg_and_bit()
1625 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
1626 *regmap = info->regmap_pmu; in rv1108_calc_drv_reg_and_bit()
1629 *regmap = info->regmap_base; in rv1108_calc_drv_reg_and_bit()
1633 *reg -= 0x10; in rv1108_calc_drv_reg_and_bit()
1634 *reg += bank->bank_num * RV1108_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
1655 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_schmitt_reg_and_bit()
1658 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
1659 *regmap = info->regmap_pmu; in rv1108_calc_schmitt_reg_and_bit()
1663 *regmap = info->regmap_base; in rv1108_calc_schmitt_reg_and_bit()
1666 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
1685 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_pull_reg_and_bit()
1688 if (bank->bank_num == 0) { in rv1126_calc_pull_reg_and_bit()
1690 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1692 *reg -= (((31 - pin_num) / RV1126_PULL_PINS_PER_REG + 1) * 4); in rv1126_calc_pull_reg_and_bit()
1697 *regmap = info->regmap_pmu; in rv1126_calc_pull_reg_and_bit()
1701 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1702 *reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE; in rv1126_calc_pull_reg_and_bit()
1722 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_drv_reg_and_bit()
1725 if (bank->bank_num == 0) { in rv1126_calc_drv_reg_and_bit()
1727 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1729 *reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4); in rv1126_calc_drv_reg_and_bit()
1730 *reg -= 0x4; in rv1126_calc_drv_reg_and_bit()
1735 *regmap = info->regmap_pmu; in rv1126_calc_drv_reg_and_bit()
1738 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1740 *reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE; in rv1126_calc_drv_reg_and_bit()
1761 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_schmitt_reg_and_bit()
1764 if (bank->bank_num == 0) { in rv1126_calc_schmitt_reg_and_bit()
1766 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1768 *reg -= (((31 - pin_num) / RV1126_SCHMITT_PINS_PER_GRF_REG + 1) * 4); in rv1126_calc_schmitt_reg_and_bit()
1772 *regmap = info->regmap_pmu; in rv1126_calc_schmitt_reg_and_bit()
1776 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1779 *reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE; in rv1126_calc_schmitt_reg_and_bit()
1795 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_schmitt_reg_and_bit()
1797 *regmap = info->regmap_base; in rk3308_calc_schmitt_reg_and_bit()
1800 *reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE; in rk3308_calc_schmitt_reg_and_bit()
1817 struct rockchip_pinctrl *info = bank->drvdata; in rk1808_calc_pull_reg_and_bit()
1819 if (bank->bank_num == 0) { in rk1808_calc_pull_reg_and_bit()
1820 *regmap = info->regmap_pmu; in rk1808_calc_pull_reg_and_bit()
1824 *regmap = info->regmap_base; in rk1808_calc_pull_reg_and_bit()
1825 *reg += (bank->bank_num - 1) * RK1808_PULL_BANK_STRIDE; in rk1808_calc_pull_reg_and_bit()
1846 struct rockchip_pinctrl *info = bank->drvdata; in rk1808_calc_drv_reg_and_bit()
1848 if (bank->bank_num == 0) { in rk1808_calc_drv_reg_and_bit()
1849 *regmap = info->regmap_pmu; in rk1808_calc_drv_reg_and_bit()
1852 *regmap = info->regmap_base; in rk1808_calc_drv_reg_and_bit()
1854 *reg += (bank->bank_num - 1) * RK1808_DRV_BANK_STRIDE; in rk1808_calc_drv_reg_and_bit()
1874 struct rockchip_pinctrl *info = bank->drvdata; in rk1808_calc_slew_rate_reg_and_bit()
1876 if (bank->bank_num == 0) { in rk1808_calc_slew_rate_reg_and_bit()
1877 *regmap = info->regmap_pmu; in rk1808_calc_slew_rate_reg_and_bit()
1880 *regmap = info->regmap_base; in rk1808_calc_slew_rate_reg_and_bit()
1882 *reg += (bank->bank_num - 1) * RK1808_SR_BANK_STRIDE; in rk1808_calc_slew_rate_reg_and_bit()
1900 struct rockchip_pinctrl *info = bank->drvdata; in rk1808_calc_schmitt_reg_and_bit()
1902 if (bank->bank_num == 0) { in rk1808_calc_schmitt_reg_and_bit()
1903 *regmap = info->regmap_pmu; in rk1808_calc_schmitt_reg_and_bit()
1906 *regmap = info->regmap_base; in rk1808_calc_schmitt_reg_and_bit()
1908 *reg += (bank->bank_num - 1) * RK1808_SCHMITT_BANK_STRIDE; in rk1808_calc_schmitt_reg_and_bit()
1924 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
1926 *regmap = info->regmap_base; in rk2928_calc_pull_reg_and_bit()
1928 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
1942 struct rockchip_pinctrl *info = bank->drvdata; in rk3128_calc_pull_reg_and_bit()
1944 *regmap = info->regmap_base; in rk3128_calc_pull_reg_and_bit()
1946 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
1964 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
1967 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
1968 *regmap = info->regmap_pmu ? info->regmap_pmu in rk3188_calc_pull_reg_and_bit()
1969 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
1970 *reg = info->regmap_pmu ? RK3188_PULL_PMU_OFFSET : 0; in rk3188_calc_pull_reg_and_bit()
1975 *regmap = info->regmap_pull ? info->regmap_pull in rk3188_calc_pull_reg_and_bit()
1976 : info->regmap_base; in rk3188_calc_pull_reg_and_bit()
1977 *reg = info->regmap_pull ? 0 : RK3188_PULL_OFFSET; in rk3188_calc_pull_reg_and_bit()
1980 *reg -= 4; in rk3188_calc_pull_reg_and_bit()
1981 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
1989 *bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG); in rk3188_calc_pull_reg_and_bit()
2001 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
2004 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
2005 *regmap = info->regmap_pmu; in rk3288_calc_pull_reg_and_bit()
2012 *regmap = info->regmap_base; in rk3288_calc_pull_reg_and_bit()
2016 *reg -= 0x10; in rk3288_calc_pull_reg_and_bit()
2017 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
2037 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
2040 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
2041 *regmap = info->regmap_pmu; in rk3288_calc_drv_reg_and_bit()
2048 *regmap = info->regmap_base; in rk3288_calc_drv_reg_and_bit()
2052 *reg -= 0x10; in rk3288_calc_drv_reg_and_bit()
2053 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
2069 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_pull_reg_and_bit()
2071 *regmap = info->regmap_base; in rk3228_calc_pull_reg_and_bit()
2073 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3228_calc_pull_reg_and_bit()
2088 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_drv_reg_and_bit()
2090 *regmap = info->regmap_base; in rk3228_calc_drv_reg_and_bit()
2092 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3228_calc_drv_reg_and_bit()
2107 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_pull_reg_and_bit()
2109 *regmap = info->regmap_base; in rk3308_calc_pull_reg_and_bit()
2111 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3308_calc_pull_reg_and_bit()
2126 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_drv_reg_and_bit()
2128 *regmap = info->regmap_base; in rk3308_calc_drv_reg_and_bit()
2130 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3308_calc_drv_reg_and_bit()
2148 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_slew_rate_reg_and_bit()
2151 *regmap = info->regmap_base; in rk3308_calc_slew_rate_reg_and_bit()
2153 *reg += (bank->bank_num) * RK3308_SLEW_RATE_BANK_STRIDE; in rk3308_calc_slew_rate_reg_and_bit()
2169 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_pull_reg_and_bit()
2172 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
2173 *regmap = info->regmap_pmu; in rk3368_calc_pull_reg_and_bit()
2180 *regmap = info->regmap_base; in rk3368_calc_pull_reg_and_bit()
2184 *reg -= 0x10; in rk3368_calc_pull_reg_and_bit()
2185 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
2202 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_drv_reg_and_bit()
2205 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
2206 *regmap = info->regmap_pmu; in rk3368_calc_drv_reg_and_bit()
2213 *regmap = info->regmap_base; in rk3368_calc_drv_reg_and_bit()
2217 *reg -= 0x10; in rk3368_calc_drv_reg_and_bit()
2218 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
2236 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_pull_reg_and_bit()
2239 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
2240 *regmap = info->regmap_pmu; in rk3399_calc_pull_reg_and_bit()
2243 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
2249 *regmap = info->regmap_base; in rk3399_calc_pull_reg_and_bit()
2253 *reg -= 0x20; in rk3399_calc_pull_reg_and_bit()
2254 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
2268 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_drv_reg_and_bit()
2272 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
2273 *regmap = info->regmap_pmu; in rk3399_calc_drv_reg_and_bit()
2275 *regmap = info->regmap_base; in rk3399_calc_drv_reg_and_bit()
2277 *reg = bank->drv[drv_num].offset; in rk3399_calc_drv_reg_and_bit()
2278 if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rk3399_calc_drv_reg_and_bit()
2279 (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY)) in rk3399_calc_drv_reg_and_bit()
2299 struct rockchip_pinctrl *info = bank->drvdata; in rk3528_calc_drv_reg_and_bit()
2301 *regmap = info->regmap_base; in rk3528_calc_drv_reg_and_bit()
2302 switch (bank->bank_num) { in rk3528_calc_drv_reg_and_bit()
2324 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_drv_reg_and_bit()
2347 struct rockchip_pinctrl *info = bank->drvdata; in rk3528_calc_pull_reg_and_bit()
2349 *regmap = info->regmap_base; in rk3528_calc_pull_reg_and_bit()
2350 switch (bank->bank_num) { in rk3528_calc_pull_reg_and_bit()
2372 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_pull_reg_and_bit()
2396 struct rockchip_pinctrl *info = bank->drvdata; in rk3528_calc_schmitt_reg_and_bit()
2398 *regmap = info->regmap_base; in rk3528_calc_schmitt_reg_and_bit()
2399 switch (bank->bank_num) { in rk3528_calc_schmitt_reg_and_bit()
2421 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_schmitt_reg_and_bit()
2443 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_drv_reg_and_bit()
2445 *regmap = info->regmap_base; in rk3562_calc_drv_reg_and_bit()
2446 switch (bank->bank_num) { in rk3562_calc_drv_reg_and_bit()
2468 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_drv_reg_and_bit()
2491 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_pull_reg_and_bit()
2493 *regmap = info->regmap_base; in rk3562_calc_pull_reg_and_bit()
2494 switch (bank->bank_num) { in rk3562_calc_pull_reg_and_bit()
2516 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_pull_reg_and_bit()
2540 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_schmitt_reg_and_bit()
2542 *regmap = info->regmap_base; in rk3562_calc_schmitt_reg_and_bit()
2543 switch (bank->bank_num) { in rk3562_calc_schmitt_reg_and_bit()
2565 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_schmitt_reg_and_bit()
2587 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_slew_rate_reg_and_bit()
2589 if (bank->bank_num == 0) { in rk3568_calc_slew_rate_reg_and_bit()
2590 *regmap = info->regmap_pmu; in rk3568_calc_slew_rate_reg_and_bit()
2593 *regmap = info->regmap_base; in rk3568_calc_slew_rate_reg_and_bit()
2595 *reg += (bank->bank_num - 1) * RK3568_SR_BANK_STRIDE; in rk3568_calc_slew_rate_reg_and_bit()
2614 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_pull_reg_and_bit()
2616 if (bank->bank_num == 0) { in rk3568_calc_pull_reg_and_bit()
2617 *regmap = info->regmap_pmu; in rk3568_calc_pull_reg_and_bit()
2619 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
2625 *regmap = info->regmap_base; in rk3568_calc_pull_reg_and_bit()
2627 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
2647 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_drv_reg_and_bit()
2650 if (bank->bank_num == 0) { in rk3568_calc_drv_reg_and_bit()
2651 *regmap = info->regmap_pmu; in rk3568_calc_drv_reg_and_bit()
2658 *regmap = info->regmap_base; in rk3568_calc_drv_reg_and_bit()
2660 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE; in rk3568_calc_drv_reg_and_bit()
2668 if ((bank->bank_num == 1 && (pin_num == 15 || pin_num == 23 || pin_num == 31)) || in rk3568_calc_drv_reg_and_bit()
2669 ((bank->bank_num == 2 || bank->bank_num == 3 || bank->bank_num == 4) && in rk3568_calc_drv_reg_and_bit()
2671 *bit -= RK3568_DRV_BITS_PER_PIN; in rk3568_calc_drv_reg_and_bit()
2787 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_pull_reg_and_bit()
2788 u8 bank_num = bank->bank_num; in rk3588_calc_pull_reg_and_bit()
2792 for (i = ARRAY_SIZE(rk3588_p_regs) - 1; i >= 0; i--) { in rk3588_calc_pull_reg_and_bit()
2800 *regmap = info->regmap_base; in rk3588_calc_pull_reg_and_bit()
2801 *reg += ((pin - rk3588_p_regs[i][0]) / RK3588_PULL_PINS_PER_REG) * 4; in rk3588_calc_pull_reg_and_bit()
2815 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_drv_reg_and_bit()
2816 u8 bank_num = bank->bank_num; in rk3588_calc_drv_reg_and_bit()
2820 for (i = ARRAY_SIZE(rk3588_ds_regs) - 1; i >= 0; i--) { in rk3588_calc_drv_reg_and_bit()
2828 *regmap = info->regmap_base; in rk3588_calc_drv_reg_and_bit()
2829 *reg += ((pin - rk3588_ds_regs[i][0]) / RK3588_DRV_PINS_PER_REG) * 4; in rk3588_calc_drv_reg_and_bit()
2844 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_schmitt_reg_and_bit()
2845 u8 bank_num = bank->bank_num; in rk3588_calc_schmitt_reg_and_bit()
2849 for (i = ARRAY_SIZE(rk3588_smt_regs) - 1; i >= 0; i--) { in rk3588_calc_schmitt_reg_and_bit()
2857 *regmap = info->regmap_base; in rk3588_calc_schmitt_reg_and_bit()
2858 *reg += ((pin - rk3588_smt_regs[i][0]) / RK3588_SMT_PINS_PER_REG) * 4; in rk3588_calc_schmitt_reg_and_bit()
2866 { 2, 4, 8, 12, -1, -1, -1, -1 },
2867 { 3, 6, 9, 12, -1, -1, -1, -1 },
2868 { 5, 10, 15, 20, -1, -1, -1, -1 },
2877 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_drive_perpin()
2878 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_drive_perpin()
2879 struct device *dev = info->dev; in rockchip_get_drive_perpin()
2884 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_get_drive_perpin()
2886 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
2900 * drive-strength offset is special, as it is in rockchip_get_drive_perpin()
2924 bit -= 16; in rockchip_get_drive_perpin()
2929 return -EINVAL; in rockchip_get_drive_perpin()
2941 return -EINVAL; in rockchip_get_drive_perpin()
2949 data &= (1 << rmask_bits) - 1; in rockchip_get_drive_perpin()
2954 ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
2971 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_drive_perpin()
2972 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_drive_perpin()
2973 struct device *dev = info->dev; in rockchip_set_drive_perpin()
2978 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_set_drive_perpin()
2980 dev_dbg(dev, "setting drive of GPIO%d-%d to %d\n", in rockchip_set_drive_perpin()
2981 bank->bank_num, pin_num, strength); in rockchip_set_drive_perpin()
2983 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
2987 if (ctrl->type == RV1126 || ctrl->type == RK3588) { in rockchip_set_drive_perpin()
2991 } else if (ctrl->type == RV1106 || in rockchip_set_drive_perpin()
2992 ctrl->type == RK3528 || in rockchip_set_drive_perpin()
2993 ctrl->type == RK3562 || in rockchip_set_drive_perpin()
2994 ctrl->type == RK3568) { in rockchip_set_drive_perpin()
2996 ret = (1 << (strength + 1)) - 1; in rockchip_set_drive_perpin()
3000 ret = -EINVAL; in rockchip_set_drive_perpin()
3026 * drive-strength offset is special, as it is spread in rockchip_set_drive_perpin()
3048 bit -= 16; in rockchip_set_drive_perpin()
3053 return -EINVAL; in rockchip_set_drive_perpin()
3064 return -EINVAL; in rockchip_set_drive_perpin()
3069 data = ((1 << rmask_bits) - 1) << (bit + 16); in rockchip_set_drive_perpin()
3077 if (ctrl->type == RK3568 && rockchip_get_cpu_version() == 0) { in rockchip_set_drive_perpin()
3078 if (bank->bank_num == 1 && pin_num == 21) in rockchip_set_drive_perpin()
3080 else if (bank->bank_num == 2 && pin_num == 2) in rockchip_set_drive_perpin()
3082 else if (bank->bank_num == 2 && pin_num == 8) in rockchip_set_drive_perpin()
3084 else if (bank->bank_num == 3 && pin_num == 0) in rockchip_set_drive_perpin()
3086 else if (bank->bank_num == 3 && pin_num == 6) in rockchip_set_drive_perpin()
3088 else if (bank->bank_num == 4 && pin_num == 0) in rockchip_set_drive_perpin()
3093 data = ((1 << rmask_bits) - 1) << 16; in rockchip_set_drive_perpin()
3095 data |= (1 << (strength + 1)) - 1; in rockchip_set_drive_perpin()
3103 ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
3130 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
3131 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_pull()
3132 struct device *dev = info->dev; in rockchip_get_pull()
3139 if (ctrl->type == RK3066B) in rockchip_get_pull()
3142 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
3150 switch (ctrl->type) { in rockchip_get_pull()
3170 pull_type = bank->pull_type[pin_num / 8]; in rockchip_get_pull()
3172 data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1; in rockchip_get_pull()
3177 return -EINVAL; in rockchip_get_pull()
3184 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
3185 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_pull()
3186 struct device *dev = info->dev; in rockchip_set_pull()
3192 dev_dbg(dev, "setting pull of GPIO%d-%d to %d\n", bank->bank_num, pin_num, pull); in rockchip_set_pull()
3195 if (ctrl->type == RK3066B) in rockchip_set_pull()
3196 return pull ? -EINVAL : 0; in rockchip_set_pull()
3198 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
3202 switch (ctrl->type) { in rockchip_set_pull()
3224 pull_type = bank->pull_type[pin_num / 8]; in rockchip_set_pull()
3225 ret = -EINVAL; in rockchip_set_pull()
3234 * In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6, in rockchip_set_pull()
3237 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) { in rockchip_set_pull()
3248 data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_pull()
3256 return -EINVAL; in rockchip_set_pull()
3272 struct rockchip_pinctrl *info = bank->drvdata; in rk3328_calc_schmitt_reg_and_bit()
3274 *regmap = info->regmap_base; in rk3328_calc_schmitt_reg_and_bit()
3277 *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; in rk3328_calc_schmitt_reg_and_bit()
3295 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_schmitt_reg_and_bit()
3297 if (bank->bank_num == 0) { in rk3568_calc_schmitt_reg_and_bit()
3298 *regmap = info->regmap_pmu; in rk3568_calc_schmitt_reg_and_bit()
3301 *regmap = info->regmap_base; in rk3568_calc_schmitt_reg_and_bit()
3303 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE; in rk3568_calc_schmitt_reg_and_bit()
3315 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_schmitt()
3316 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_schmitt()
3322 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_schmitt()
3331 switch (ctrl->type) { in rockchip_get_schmitt()
3334 return data & ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1); in rockchip_get_schmitt()
3345 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_schmitt()
3346 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_schmitt()
3347 struct device *dev = info->dev; in rockchip_set_schmitt()
3353 dev_dbg(dev, "setting input schmitt of GPIO%d-%d to %d\n", in rockchip_set_schmitt()
3354 bank->bank_num, pin_num, enable); in rockchip_set_schmitt()
3356 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_schmitt()
3361 switch (ctrl->type) { in rockchip_set_schmitt()
3364 data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_schmitt()
3388 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_slew_rate_reg_and_bit()
3391 if (bank->bank_num == 0) { in px30_calc_slew_rate_reg_and_bit()
3392 *regmap = info->regmap_pmu; in px30_calc_slew_rate_reg_and_bit()
3396 *regmap = info->regmap_base; in px30_calc_slew_rate_reg_and_bit()
3399 *reg += (bank->bank_num - 1) * PX30_SLEW_RATE_BANK_STRIDE; in px30_calc_slew_rate_reg_and_bit()
3409 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_slew_rate()
3410 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_slew_rate()
3415 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_get_slew_rate()
3420 ret = ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_slew_rate()
3435 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_slew_rate()
3436 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_slew_rate()
3441 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_set_slew_rate()
3446 dev_dbg(info->dev, "setting slew rate of GPIO%d-%d to %d\n", in rockchip_set_slew_rate()
3447 bank->bank_num, pin_num, speed); in rockchip_set_slew_rate()
3449 ret = ctrl->slew_rate_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_slew_rate()
3468 return info->nfunctions; in rockchip_pmx_get_funcs_count()
3476 return info->functions[selector].name; in rockchip_pmx_get_func_name()
3485 *groups = info->functions[selector].groups; in rockchip_pmx_get_groups()
3486 *num_groups = info->functions[selector].ngroups; in rockchip_pmx_get_groups()
3495 const unsigned int *pins = info->groups[group].pins; in rockchip_pmx_set()
3496 const struct rockchip_pin_config *data = info->groups[group].data; in rockchip_pmx_set()
3497 struct device *dev = info->dev; in rockchip_pmx_set()
3502 info->functions[selector].name, info->groups[group].name); in rockchip_pmx_set()
3508 for (cnt = 0; cnt < info->groups[group].npins; cnt++) { in rockchip_pmx_set()
3510 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
3518 for (cnt--; cnt >= 0 && !data[cnt].func; cnt--) in rockchip_pmx_set()
3519 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
3541 switch (ctrl->type) { in rockchip_pinconf_pull_valid()
3575 return -ENOMEM; in rockchip_pinconf_defer_pin()
3577 cfg->pin = pin; in rockchip_pinconf_defer_pin()
3578 cfg->param = param; in rockchip_pinconf_defer_pin()
3579 cfg->arg = arg; in rockchip_pinconf_defer_pin()
3581 list_add_tail(&cfg->head, &bank->deferred_pins); in rockchip_pinconf_defer_pin()
3592 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_set()
3605 * The lock makes sure that either gpio-probe has completed in rockchip_pinconf_set()
3608 mutex_lock(&bank->deferred_lock); in rockchip_pinconf_set()
3609 if (!gpio || !gpio->direction_output) { in rockchip_pinconf_set()
3610 rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param, in rockchip_pinconf_set()
3612 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
3618 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
3623 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3632 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_set()
3633 return -ENOTSUPP; in rockchip_pinconf_set()
3636 return -EINVAL; in rockchip_pinconf_set()
3638 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3644 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3647 return -EINVAL; in rockchip_pinconf_set()
3649 rc = gpio->direction_output(gpio, pin - bank->pin_base, in rockchip_pinconf_set()
3655 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3658 return -EINVAL; in rockchip_pinconf_set()
3660 rc = gpio->direction_input(gpio, pin - bank->pin_base); in rockchip_pinconf_set()
3665 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_set()
3666 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_set()
3667 return -ENOTSUPP; in rockchip_pinconf_set()
3670 pin - bank->pin_base, arg); in rockchip_pinconf_set()
3675 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_set()
3676 return -ENOTSUPP; in rockchip_pinconf_set()
3679 pin - bank->pin_base, arg); in rockchip_pinconf_set()
3684 if (!info->ctrl->slew_rate_calc_reg) in rockchip_pinconf_set()
3685 return -ENOTSUPP; in rockchip_pinconf_set()
3688 pin - bank->pin_base, arg); in rockchip_pinconf_set()
3693 return -ENOTSUPP; in rockchip_pinconf_set()
3706 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_get()
3713 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
3714 return -EINVAL; in rockchip_pinconf_get()
3722 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_get()
3723 return -ENOTSUPP; in rockchip_pinconf_get()
3725 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
3726 return -EINVAL; in rockchip_pinconf_get()
3731 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3733 return -EINVAL; in rockchip_pinconf_get()
3735 if (!gpio || !gpio->get) { in rockchip_pinconf_get()
3740 rc = gpio->get(gpio, pin - bank->pin_base); in rockchip_pinconf_get()
3747 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_get()
3748 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_get()
3749 return -ENOTSUPP; in rockchip_pinconf_get()
3751 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3758 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_get()
3759 return -ENOTSUPP; in rockchip_pinconf_get()
3761 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3768 if (!info->ctrl->slew_rate_calc_reg) in rockchip_pinconf_get()
3769 return -ENOTSUPP; in rockchip_pinconf_get()
3771 rc = rockchip_get_slew_rate(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3778 return -ENOTSUPP; in rockchip_pinconf_get()
3793 { .compatible = "rockchip,gpio-bank" },
3794 { .compatible = "rockchip,rk3188-gpio-bank0" },
3807 info->nfunctions++; in rockchip_pinctrl_child_count()
3808 info->ngroups += of_get_child_count(child); in rockchip_pinctrl_child_count()
3817 struct device *dev = info->dev; in rockchip_pinctrl_parse_groups()
3828 grp->name = np->name; in rockchip_pinctrl_parse_groups()
3838 return dev_err_probe(dev, -EINVAL, "wrong pins number or pins and configs should be by 4\n"); in rockchip_pinctrl_parse_groups()
3840 grp->npins = size / 4; in rockchip_pinctrl_parse_groups()
3842 grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3843 grp->data = devm_kcalloc(dev, grp->npins, sizeof(*grp->data), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3844 if (!grp->pins || !grp->data) in rockchip_pinctrl_parse_groups()
3845 return -ENOMEM; in rockchip_pinctrl_parse_groups()
3856 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3857 grp->data[j].func = be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3861 return -EINVAL; in rockchip_pinctrl_parse_groups()
3865 &grp->data[j].configs, &grp->data[j].nconfigs); in rockchip_pinctrl_parse_groups()
3877 struct device *dev = info->dev; in rockchip_pinctrl_parse_functions()
3887 func = &info->functions[index]; in rockchip_pinctrl_parse_functions()
3890 func->name = np->name; in rockchip_pinctrl_parse_functions()
3891 func->ngroups = of_get_child_count(np); in rockchip_pinctrl_parse_functions()
3892 if (func->ngroups <= 0) in rockchip_pinctrl_parse_functions()
3895 func->groups = devm_kcalloc(dev, func->ngroups, sizeof(*func->groups), GFP_KERNEL); in rockchip_pinctrl_parse_functions()
3896 if (!func->groups) in rockchip_pinctrl_parse_functions()
3897 return -ENOMEM; in rockchip_pinctrl_parse_functions()
3900 func->groups[i] = child->name; in rockchip_pinctrl_parse_functions()
3901 grp = &info->groups[grp_index++]; in rockchip_pinctrl_parse_functions()
3915 struct device *dev = &pdev->dev; in rockchip_pinctrl_parse_dt()
3916 struct device_node *np = dev->of_node; in rockchip_pinctrl_parse_dt()
3923 dev_dbg(dev, "nfunctions = %d\n", info->nfunctions); in rockchip_pinctrl_parse_dt()
3924 dev_dbg(dev, "ngroups = %d\n", info->ngroups); in rockchip_pinctrl_parse_dt()
3926 info->functions = devm_kcalloc(dev, info->nfunctions, sizeof(*info->functions), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3927 if (!info->functions) in rockchip_pinctrl_parse_dt()
3928 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3930 info->groups = devm_kcalloc(dev, info->ngroups, sizeof(*info->groups), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3931 if (!info->groups) in rockchip_pinctrl_parse_dt()
3932 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3954 struct pinctrl_desc *ctrldesc = &info->pctl; in rockchip_pinctrl_register()
3957 struct device *dev = &pdev->dev; in rockchip_pinctrl_register()
3961 ctrldesc->name = "rockchip-pinctrl"; in rockchip_pinctrl_register()
3962 ctrldesc->owner = THIS_MODULE; in rockchip_pinctrl_register()
3963 ctrldesc->pctlops = &rockchip_pctrl_ops; in rockchip_pinctrl_register()
3964 ctrldesc->pmxops = &rockchip_pmx_ops; in rockchip_pinctrl_register()
3965 ctrldesc->confops = &rockchip_pinconf_ops; in rockchip_pinctrl_register()
3967 pindesc = devm_kcalloc(dev, info->ctrl->nr_pins, sizeof(*pindesc), GFP_KERNEL); in rockchip_pinctrl_register()
3969 return -ENOMEM; in rockchip_pinctrl_register()
3971 ctrldesc->pins = pindesc; in rockchip_pinctrl_register()
3972 ctrldesc->npins = info->ctrl->nr_pins; in rockchip_pinctrl_register()
3975 for (bank = 0, k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
3976 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
3977 for (pin = 0; pin < pin_bank->nr_pins; pin++, k++) { in rockchip_pinctrl_register()
3978 pdesc->number = k; in rockchip_pinctrl_register()
3979 pdesc->name = kasprintf(GFP_KERNEL, "%s-%d", in rockchip_pinctrl_register()
3980 pin_bank->name, pin); in rockchip_pinctrl_register()
3984 INIT_LIST_HEAD(&pin_bank->deferred_pins); in rockchip_pinctrl_register()
3985 mutex_init(&pin_bank->deferred_lock); in rockchip_pinctrl_register()
3992 info->pctl_dev = devm_pinctrl_register(dev, ctrldesc, info); in rockchip_pinctrl_register()
3993 if (IS_ERR(info->pctl_dev)) in rockchip_pinctrl_register()
3994 return dev_err_probe(dev, PTR_ERR(info->pctl_dev), "could not register pinctrl driver\n"); in rockchip_pinctrl_register()
4008 struct device *dev = &pdev->dev; in rockchip_pinctrl_get_soc_data()
4009 struct device_node *node = dev->of_node; in rockchip_pinctrl_get_soc_data()
4016 ctrl = (struct rockchip_pin_ctrl *)match->data; in rockchip_pinctrl_get_soc_data()
4018 ctrl->pin_banks = rk3308bs_pin_banks; in rockchip_pinctrl_get_soc_data()
4020 ctrl->pin_banks = px30s_pin_banks; in rockchip_pinctrl_get_soc_data()
4022 grf_offs = ctrl->grf_mux_offset; in rockchip_pinctrl_get_soc_data()
4023 pmu_offs = ctrl->pmu_mux_offset; in rockchip_pinctrl_get_soc_data()
4024 drv_pmu_offs = ctrl->pmu_drv_offset; in rockchip_pinctrl_get_soc_data()
4025 drv_grf_offs = ctrl->grf_drv_offset; in rockchip_pinctrl_get_soc_data()
4026 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
4027 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
4030 raw_spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
4031 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
4032 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
4033 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
4037 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
4038 struct rockchip_drv *drv = &bank->drv[j]; in rockchip_pinctrl_get_soc_data()
4041 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()
4045 if (iom->offset >= 0) { in rockchip_pinctrl_get_soc_data()
4046 if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
4047 pmu_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
4049 grf_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
4051 iom->offset = ((iom->type & IOMUX_SOURCE_PMU) || in rockchip_pinctrl_get_soc_data()
4052 (iom->type & IOMUX_L_SOURCE_PMU)) ? in rockchip_pinctrl_get_soc_data()
4057 if (drv->offset >= 0) { in rockchip_pinctrl_get_soc_data()
4058 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
4059 drv_pmu_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
4061 drv_grf_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
4063 drv->offset = (iom->type & IOMUX_SOURCE_PMU) ? in rockchip_pinctrl_get_soc_data()
4068 i, j, iom->offset, drv->offset); in rockchip_pinctrl_get_soc_data()
4074 inc = (iom->type & (IOMUX_WIDTH_4BIT | in rockchip_pinctrl_get_soc_data()
4077 if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
4084 * 3bit drive-strenth'es are spread over two registers. in rockchip_pinctrl_get_soc_data()
4086 if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rockchip_pinctrl_get_soc_data()
4087 (drv->drv_type == DRV_TYPE_IO_3V3_ONLY)) in rockchip_pinctrl_get_soc_data()
4092 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
4100 /* calculate the per-bank recalced_mask */ in rockchip_pinctrl_get_soc_data()
4101 for (j = 0; j < ctrl->niomux_recalced; j++) { in rockchip_pinctrl_get_soc_data()
4104 if (ctrl->iomux_recalced[j].num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
4105 pin = ctrl->iomux_recalced[j].pin; in rockchip_pinctrl_get_soc_data()
4106 bank->recalced_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
4110 /* calculate the per-bank route_mask */ in rockchip_pinctrl_get_soc_data()
4111 for (j = 0; j < ctrl->niomux_routes; j++) { in rockchip_pinctrl_get_soc_data()
4114 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
4115 pin = ctrl->iomux_routes[j].pin; in rockchip_pinctrl_get_soc_data()
4116 bank->route_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
4132 int ret = pinctrl_force_sleep(info->pctl_dev); in rockchip_pinctrl_suspend()
4141 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_suspend()
4142 ret = regmap_read(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_suspend()
4145 pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_suspend()
4158 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_resume()
4159 ret = regmap_write(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_resume()
4166 return pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_resume()
4196 ret = regmap_write(info->regmap_base, RK3308_GRF_SOC_CON13, in rk3308_soc_data_init()
4203 ret = regmap_write(info->regmap_base, RK3308_GRF_SOC_CON15, in rk3308_soc_data_init()
4215 struct device *dev = &pdev->dev; in rockchip_pinctrl_probe()
4216 struct device_node *np = dev->of_node, *node; in rockchip_pinctrl_probe()
4222 if (!dev->of_node) in rockchip_pinctrl_probe()
4223 return dev_err_probe(dev, -ENODEV, "device tree node not found\n"); in rockchip_pinctrl_probe()
4227 return -ENOMEM; in rockchip_pinctrl_probe()
4229 info->dev = dev; in rockchip_pinctrl_probe()
4233 return dev_err_probe(dev, -EINVAL, "driver data not available\n"); in rockchip_pinctrl_probe()
4234 info->ctrl = ctrl; in rockchip_pinctrl_probe()
4238 info->regmap_base = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
4240 if (IS_ERR(info->regmap_base)) in rockchip_pinctrl_probe()
4241 return PTR_ERR(info->regmap_base); in rockchip_pinctrl_probe()
4247 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
4249 info->regmap_base = in rockchip_pinctrl_probe()
4252 /* to check for the old dt-bindings */ in rockchip_pinctrl_probe()
4253 info->reg_size = resource_size(res); in rockchip_pinctrl_probe()
4256 if (ctrl->type == RK3188 && info->reg_size < 0x200) { in rockchip_pinctrl_probe()
4261 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
4262 rockchip_regmap_config.name = "rockchip,pinctrl-pull"; in rockchip_pinctrl_probe()
4263 info->regmap_pull = in rockchip_pinctrl_probe()
4271 info->regmap_pmu = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
4273 if (IS_ERR(info->regmap_pmu)) in rockchip_pinctrl_probe()
4274 return PTR_ERR(info->regmap_pmu); in rockchip_pinctrl_probe()
4277 if (IS_ENABLED(CONFIG_CPU_RK3308) && ctrl->type == RK3308) { in rockchip_pinctrl_probe()
4288 g_pctldev = info->pctl_dev; in rockchip_pinctrl_probe()
4290 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in rockchip_pinctrl_probe()
4307 of_platform_depopulate(&pdev->dev); in rockchip_pinctrl_remove()
4309 for (i = 0; i < info->ctrl->nr_banks; i++) { in rockchip_pinctrl_remove()
4310 bank = &info->ctrl->pin_banks[i]; in rockchip_pinctrl_remove()
4312 mutex_lock(&bank->deferred_lock); in rockchip_pinctrl_remove()
4313 while (!list_empty(&bank->deferred_pins)) { in rockchip_pinctrl_remove()
4314 cfg = list_first_entry(&bank->deferred_pins, in rockchip_pinctrl_remove()
4316 list_del(&cfg->head); in rockchip_pinctrl_remove()
4319 mutex_unlock(&bank->deferred_lock); in rockchip_pinctrl_remove()
4358 .label = "PX30-GPIO",
4405 .label = "RV1106-GPIO",
4425 .label = "RV1108-GPIO",
4465 .label = "RV1126-GPIO",
4504 .label = "RK1808-GPIO",
4526 .label = "RK2928-GPIO",
4541 .label = "RK3036-GPIO",
4559 .label = "RK3066a-GPIO",
4575 .label = "RK3066b-GPIO",
4590 .label = "RK3128-GPIO",
4610 .label = "RK3188-GPIO",
4628 .label = "RK3228-GPIO",
4672 .label = "RK3288-GPIO",
4716 .label = "RK3308-GPIO",
4746 .label = "RK3328-GPIO",
4772 .label = "RK3368-GPIO",
4792 -1,
4793 -1,
4836 .label = "RK3399-GPIO",
4884 .label = "RK3528-GPIO",
4927 .label = "RK3562-GPIO",
4960 .label = "RK3568-GPIO",
4990 .label = "RK3588-GPIO",
4999 { .compatible = "rockchip,px30-pinctrl",
5003 { .compatible = "rockchip,rv1106-pinctrl",
5007 { .compatible = "rockchip,rv1108-pinctrl",
5011 { .compatible = "rockchip,rv1126-pinctrl",
5015 { .compatible = "rockchip,rk1808-pinctrl",
5019 { .compatible = "rockchip,rk2928-pinctrl",
5023 { .compatible = "rockchip,rk3036-pinctrl",
5027 { .compatible = "rockchip,rk3066a-pinctrl",
5029 { .compatible = "rockchip,rk3066b-pinctrl",
5033 { .compatible = "rockchip,rk3128-pinctrl",
5037 { .compatible = "rockchip,rk3188-pinctrl",
5041 { .compatible = "rockchip,rk3228-pinctrl",
5045 { .compatible = "rockchip,rk3288-pinctrl",
5049 { .compatible = "rockchip,rk3308-pinctrl",
5053 { .compatible = "rockchip,rk3328-pinctrl",
5057 { .compatible = "rockchip,rk3368-pinctrl",
5061 { .compatible = "rockchip,rk3399-pinctrl",
5065 { .compatible = "rockchip,rk3528-pinctrl",
5069 { .compatible = "rockchip,rk3562-pinctrl",
5073 { .compatible = "rockchip,rk3568-pinctrl",
5077 { .compatible = "rockchip,rk3588-pinctrl",
5087 .name = "rockchip-pinctrl",
5106 * rk_iomux_set - set the rockchip iomux by pin number.
5124 return -ENODEV; in rk_iomux_set()
5127 if (bank >= info->ctrl->nr_banks) in rk_iomux_set()
5128 return -EINVAL; in rk_iomux_set()
5131 return -EINVAL; in rk_iomux_set()
5133 gpio = &info->ctrl->pin_banks[bank]; in rk_iomux_set()
5136 for (i = 0; i < info->ngroups; i++) { in rk_iomux_set()
5137 grp = &info->groups[i]; in rk_iomux_set()
5138 for (j = 0; j < grp->npins; i++) { in rk_iomux_set()
5139 if (grp->pins[i] == (gpio->pin_base + pin)) { in rk_iomux_set()
5140 cfg = grp->data; in rk_iomux_set()
5148 dev_err(info->dev, "mux GPIO%d-%d %d fail\n", bank, pin, mux); in rk_iomux_set()
5152 if (cfg && (cfg->func != mux)) in rk_iomux_set()
5153 cfg->func = mux; in rk_iomux_set()
5163 * rk_iomux_get - get the rockchip iomux by pin number.
5179 return -ENODEV; in rk_iomux_get()
5181 return -EINVAL; in rk_iomux_get()
5184 if (bank >= info->ctrl->nr_banks) in rk_iomux_get()
5185 return -EINVAL; in rk_iomux_get()
5188 return -EINVAL; in rk_iomux_get()
5190 gpio = &info->ctrl->pin_banks[bank]; in rk_iomux_get()
5204 MODULE_ALIAS("platform:pinctrl-rockchip");