Lines Matching +full:drv +full:- +full:pinconf
1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/pinctrl/pinconf.h>
16 #include <linux/pinctrl/pinconf-generic.h>
23 #include "pinctrl-utils.h"
512 PISTACHIO_FUNCTION_NONE = -1,
643 .mux_reg = -1, \
644 .mux_shift = -1, \
645 .mux_mask = -1, \
657 .mux_reg = -1, \
658 .mux_shift = -1, \
659 .mux_mask = -1, \
833 return readl(pctl->base + reg); in pctl_readl()
838 writel(val, pctl->base + reg); in pctl_writel()
848 return readl(bank->base + reg); in gpio_readl()
854 writel(val, bank->base + reg); in gpio_writel()
883 return pctl->ngroups; in pistachio_pinctrl_get_groups_count()
891 return pctl->groups[group].name; in pistachio_pinctrl_get_group_name()
901 *pins = &pctl->groups[group].pin; in pistachio_pinctrl_get_group_pins()
919 return pctl->nfunctions; in pistachio_pinmux_get_functions_count()
927 return pctl->functions[func].name; in pistachio_pinmux_get_function_name()
937 *groups = pctl->functions[func].groups; in pistachio_pinmux_get_function_groups()
938 *num_groups = pctl->functions[func].ngroups; in pistachio_pinmux_get_function_groups()
947 const struct pistachio_pin_group *pg = &pctl->groups[group]; in pistachio_pinmux_enable()
948 const struct pistachio_function *pf = &pctl->functions[func]; in pistachio_pinmux_enable()
953 if (pg->mux_reg > 0) { in pistachio_pinmux_enable()
954 for (i = 0; i < ARRAY_SIZE(pg->mux_option); i++) { in pistachio_pinmux_enable()
955 if (pg->mux_option[i] == func) in pistachio_pinmux_enable()
958 if (i == ARRAY_SIZE(pg->mux_option)) { in pistachio_pinmux_enable()
959 dev_err(pctl->dev, "Cannot mux pin %u to function %u\n", in pistachio_pinmux_enable()
961 return -EINVAL; in pistachio_pinmux_enable()
964 val = pctl_readl(pctl, pg->mux_reg); in pistachio_pinmux_enable()
965 val &= ~(pg->mux_mask << pg->mux_shift); in pistachio_pinmux_enable()
966 val |= i << pg->mux_shift; in pistachio_pinmux_enable()
967 pctl_writel(pctl, val, pg->mux_reg); in pistachio_pinmux_enable()
969 if (pf->scenarios) { in pistachio_pinmux_enable()
970 for (i = 0; i < pf->nscenarios; i++) { in pistachio_pinmux_enable()
971 if (pf->scenarios[i] == group) in pistachio_pinmux_enable()
974 if (WARN_ON(i == pf->nscenarios)) in pistachio_pinmux_enable()
975 return -EINVAL; in pistachio_pinmux_enable()
977 val = pctl_readl(pctl, pf->scenario_reg); in pistachio_pinmux_enable()
978 val &= ~(pf->scenario_mask << pf->scenario_shift); in pistachio_pinmux_enable()
979 val |= i << pf->scenario_shift; in pistachio_pinmux_enable()
980 pctl_writel(pctl, val, pf->scenario_reg); in pistachio_pinmux_enable()
984 range = pinctrl_find_gpio_range_from_pin(pctl->pctldev, pg->pin); in pistachio_pinmux_enable()
986 gpio_disable(gpiochip_get_data(range->gc), pg->pin - range->pin_base); in pistachio_pinmux_enable()
1054 dev_dbg(pctl->dev, "Property %u not supported\n", param); in pistachio_pinconf_get()
1055 return -ENOTSUPP; in pistachio_pinconf_get()
1068 u32 drv, val, arg; in pistachio_pinconf_set() local
1122 drv = PADS_DRIVE_STRENGTH_2MA; in pistachio_pinconf_set()
1125 drv = PADS_DRIVE_STRENGTH_4MA; in pistachio_pinconf_set()
1128 drv = PADS_DRIVE_STRENGTH_8MA; in pistachio_pinconf_set()
1131 drv = PADS_DRIVE_STRENGTH_12MA; in pistachio_pinconf_set()
1134 dev_err(pctl->dev, in pistachio_pinconf_set()
1137 return -EINVAL; in pistachio_pinconf_set()
1139 val |= drv << PADS_DRIVE_STRENGTH_SHIFT(pin); in pistachio_pinconf_set()
1143 dev_err(pctl->dev, "Property %u not supported\n", in pistachio_pinconf_set()
1145 return -ENOTSUPP; in pistachio_pinconf_set()
1159 .name = "pistachio-pinctrl",
1223 gpio_mask_writel(bank, GPIO_INTERRUPT_STATUS, data->hwirq, 0); in pistachio_gpio_irq_ack()
1230 gpio_mask_writel(bank, GPIO_INTERRUPT_EN, data->hwirq, 0); in pistachio_gpio_irq_mask()
1237 gpio_mask_writel(bank, GPIO_INTERRUPT_EN, data->hwirq, 1); in pistachio_gpio_irq_unmask()
1244 pistachio_gpio_direction_input(chip, data->hwirq); in pistachio_gpio_irq_startup()
1256 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 1); in pistachio_gpio_irq_set_type()
1257 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1259 gpio_mask_writel(bank, GPIO_INTERRUPT_EDGE, data->hwirq, in pistachio_gpio_irq_set_type()
1263 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 0); in pistachio_gpio_irq_set_type()
1264 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1266 gpio_mask_writel(bank, GPIO_INTERRUPT_EDGE, data->hwirq, in pistachio_gpio_irq_set_type()
1270 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1272 gpio_mask_writel(bank, GPIO_INTERRUPT_EDGE, data->hwirq, in pistachio_gpio_irq_set_type()
1276 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 1); in pistachio_gpio_irq_set_type()
1277 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1281 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 0); in pistachio_gpio_irq_set_type()
1282 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1286 return -EINVAL; in pistachio_gpio_irq_set_type()
1309 generic_handle_irq(irq_linear_revmap(gc->irq.domain, pin)); in pistachio_gpio_irq_handler()
1350 struct device_node *node = pctl->dev->of_node; in pistachio_gpio_register()
1355 for (i = 0; i < pctl->nbanks; i++) { in pistachio_gpio_register()
1363 dev_err(pctl->dev, "No node for bank %u\n", i); in pistachio_gpio_register()
1364 ret = -ENODEV; in pistachio_gpio_register()
1368 if (!of_find_property(child, "gpio-controller", NULL)) { in pistachio_gpio_register()
1369 dev_err(pctl->dev, in pistachio_gpio_register()
1370 "No gpio-controller property for bank %u\n", i); in pistachio_gpio_register()
1372 ret = -ENODEV; in pistachio_gpio_register()
1378 dev_err(pctl->dev, "No IRQ for bank %u\n", i); in pistachio_gpio_register()
1380 ret = -EINVAL; in pistachio_gpio_register()
1384 bank = &pctl->gpio_banks[i]; in pistachio_gpio_register()
1385 bank->pctl = pctl; in pistachio_gpio_register()
1386 bank->base = pctl->base + GPIO_BANK_BASE(i); in pistachio_gpio_register()
1388 bank->gpio_chip.parent = pctl->dev; in pistachio_gpio_register()
1389 bank->gpio_chip.of_node = child; in pistachio_gpio_register()
1391 girq = &bank->gpio_chip.irq; in pistachio_gpio_register()
1392 girq->chip = &bank->irq_chip; in pistachio_gpio_register()
1393 girq->parent_handler = pistachio_gpio_irq_handler; in pistachio_gpio_register()
1394 girq->num_parents = 1; in pistachio_gpio_register()
1395 girq->parents = devm_kcalloc(pctl->dev, 1, in pistachio_gpio_register()
1396 sizeof(*girq->parents), in pistachio_gpio_register()
1398 if (!girq->parents) { in pistachio_gpio_register()
1399 ret = -ENOMEM; in pistachio_gpio_register()
1402 girq->parents[0] = irq; in pistachio_gpio_register()
1403 girq->default_type = IRQ_TYPE_NONE; in pistachio_gpio_register()
1404 girq->handler = handle_level_irq; in pistachio_gpio_register()
1406 ret = gpiochip_add_data(&bank->gpio_chip, bank); in pistachio_gpio_register()
1408 dev_err(pctl->dev, "Failed to add GPIO chip %u: %d\n", in pistachio_gpio_register()
1413 ret = gpiochip_add_pin_range(&bank->gpio_chip, in pistachio_gpio_register()
1414 dev_name(pctl->dev), 0, in pistachio_gpio_register()
1415 bank->pin_base, bank->npins); in pistachio_gpio_register()
1417 dev_err(pctl->dev, "Failed to add GPIO range %u: %d\n", in pistachio_gpio_register()
1419 gpiochip_remove(&bank->gpio_chip); in pistachio_gpio_register()
1426 for (; i > 0; i--) { in pistachio_gpio_register()
1427 bank = &pctl->gpio_banks[i - 1]; in pistachio_gpio_register()
1428 gpiochip_remove(&bank->gpio_chip); in pistachio_gpio_register()
1434 { .compatible = "img,pistachio-system-pinctrl", },
1442 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); in pistachio_pinctrl_probe()
1444 return -ENOMEM; in pistachio_pinctrl_probe()
1445 pctl->dev = &pdev->dev; in pistachio_pinctrl_probe()
1446 dev_set_drvdata(&pdev->dev, pctl); in pistachio_pinctrl_probe()
1448 pctl->base = devm_platform_ioremap_resource(pdev, 0); in pistachio_pinctrl_probe()
1449 if (IS_ERR(pctl->base)) in pistachio_pinctrl_probe()
1450 return PTR_ERR(pctl->base); in pistachio_pinctrl_probe()
1452 pctl->pins = pistachio_pins; in pistachio_pinctrl_probe()
1453 pctl->npins = ARRAY_SIZE(pistachio_pins); in pistachio_pinctrl_probe()
1454 pctl->functions = pistachio_functions; in pistachio_pinctrl_probe()
1455 pctl->nfunctions = ARRAY_SIZE(pistachio_functions); in pistachio_pinctrl_probe()
1456 pctl->groups = pistachio_groups; in pistachio_pinctrl_probe()
1457 pctl->ngroups = ARRAY_SIZE(pistachio_groups); in pistachio_pinctrl_probe()
1458 pctl->gpio_banks = pistachio_gpio_banks; in pistachio_pinctrl_probe()
1459 pctl->nbanks = ARRAY_SIZE(pistachio_gpio_banks); in pistachio_pinctrl_probe()
1461 pistachio_pinctrl_desc.pins = pctl->pins; in pistachio_pinctrl_probe()
1462 pistachio_pinctrl_desc.npins = pctl->npins; in pistachio_pinctrl_probe()
1464 pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pistachio_pinctrl_desc, in pistachio_pinctrl_probe()
1466 if (IS_ERR(pctl->pctldev)) { in pistachio_pinctrl_probe()
1467 dev_err(&pdev->dev, "Failed to register pinctrl device\n"); in pistachio_pinctrl_probe()
1468 return PTR_ERR(pctl->pctldev); in pistachio_pinctrl_probe()
1476 .name = "pistachio-pinctrl",