93 #define U300_PIN_REG(pin, reg) \  macro
215 	return !!(readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset));  in u300_gpio_get()
226 	val = readl(U300_PIN_REG(offset, dor));  in u300_gpio_set()
228 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));  in u300_gpio_set()
230 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));  in u300_gpio_set()
242 	val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_direction_input()
245 	writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_direction_input()
259 	val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_direction_output()
272 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_direction_output()
290 	biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset));  in u300_gpio_config_get()
293 	drmode = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_get()
350 		val = readl(U300_PIN_REG(offset, per));  in u300_gpio_config_set()
351 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));  in u300_gpio_config_set()
354 		val = readl(U300_PIN_REG(offset, per));  in u300_gpio_config_set()
355 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));  in u300_gpio_config_set()
358 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
363 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
366 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
371 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
374 		val = readl(U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
379 		writel(val, U300_PIN_REG(offset, pcr));  in u300_gpio_config_set()
405 	val = readl(U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
409 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
414 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_toggle_trigger()
443 		val = readl(U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
444 		writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
449 		val = readl(U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
450 		writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));  in u300_gpio_irq_type()
469 	val = readl(U300_PIN_REG(offset, ien));  in u300_gpio_irq_enable()
470 	writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));  in u300_gpio_irq_enable()
483 	val = readl(U300_PIN_REG(offset, ien));  in u300_gpio_irq_disable()
484 	writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));  in u300_gpio_irq_disable()
508 	val = readl(U300_PIN_REG(pinoffset, iev));  in u300_gpio_irq_handler()
512 	writel(val, U300_PIN_REG(pinoffset, iev));  in u300_gpio_irq_handler()