Lines Matching +full:- +full:pinfunc
1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/pinctrl/at91.h>
18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
67 #define ATMEL_GET_PIN_NO(pinfunc) ((pinfunc) & 0xff) argument
68 #define ATMEL_GET_PIN_FUNC(pinfunc) ((pinfunc >> 16) & 0xf) argument
69 #define ATMEL_GET_PIN_IOSET(pinfunc) ((pinfunc >> 20) & 0xf) argument
93 * struct atmel_pioctrl - Atmel PIO controller (pinmux + gpio)
141 {"atmel,drive-strength", ATMEL_PIN_CONFIG_DRIVE_STRENGTH, 0},
144 /* --- GPIO --- */
148 return readl_relaxed(atmel_pioctrl->reg_base in atmel_gpio_read()
156 writel_relaxed(val, atmel_pioctrl->reg_base in atmel_gpio_write()
171 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_set_type()
174 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, in atmel_gpio_irq_set_type()
175 BIT(pin->line)); in atmel_gpio_irq_set_type()
176 reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR); in atmel_gpio_irq_set_type()
202 return -EINVAL; in atmel_gpio_irq_set_type()
205 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR, reg); in atmel_gpio_irq_set_type()
213 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_mask()
215 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_IDR, in atmel_gpio_irq_mask()
216 BIT(pin->line)); in atmel_gpio_irq_mask()
222 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_unmask()
224 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_IER, in atmel_gpio_irq_unmask()
225 BIT(pin->line)); in atmel_gpio_irq_unmask()
233 int bank = ATMEL_PIO_BANK(d->hwirq); in atmel_gpio_irq_set_wake()
234 int line = ATMEL_PIO_LINE(d->hwirq); in atmel_gpio_irq_set_wake()
237 irq_set_irq_wake(atmel_pioctrl->irqs[bank], on); in atmel_gpio_irq_set_wake()
240 atmel_pioctrl->pm_wakeup_sources[bank] |= BIT(line); in atmel_gpio_irq_set_wake()
242 atmel_pioctrl->pm_wakeup_sources[bank] &= ~(BIT(line)); in atmel_gpio_irq_set_wake()
263 return irq_find_mapping(atmel_pioctrl->irq_domain, offset); in atmel_gpio_to_irq()
272 int n, bank = -1; in atmel_gpio_irq_handler()
275 for (n = 0; n < atmel_pioctrl->nbanks; n++) { in atmel_gpio_irq_handler()
276 if (atmel_pioctrl->irqs[n] == irq) { in atmel_gpio_irq_handler()
283 dev_err(atmel_pioctrl->dev, in atmel_gpio_irq_handler()
300 atmel_pioctrl->gpio_chip, in atmel_gpio_irq_handler()
310 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_direction_input()
313 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, in atmel_gpio_direction_input()
314 BIT(pin->line)); in atmel_gpio_direction_input()
315 reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR); in atmel_gpio_direction_input()
317 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR, reg); in atmel_gpio_direction_input()
325 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_get()
328 reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_PDSR); in atmel_gpio_get()
330 return !!(reg & BIT(pin->line)); in atmel_gpio_get()
339 bitmap_zero(bits, atmel_pioctrl->npins); in atmel_gpio_get_multiple()
341 for (bank = 0; bank < atmel_pioctrl->nbanks; bank++) { in atmel_gpio_get_multiple()
364 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_direction_output()
367 atmel_gpio_write(atmel_pioctrl, pin->bank, in atmel_gpio_direction_output()
369 BIT(pin->line)); in atmel_gpio_direction_output()
371 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, in atmel_gpio_direction_output()
372 BIT(pin->line)); in atmel_gpio_direction_output()
373 reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR); in atmel_gpio_direction_output()
375 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR, reg); in atmel_gpio_direction_output()
383 struct atmel_pin *pin = atmel_pioctrl->pins[offset]; in atmel_gpio_set()
385 atmel_gpio_write(atmel_pioctrl, pin->bank, in atmel_gpio_set()
387 BIT(pin->line)); in atmel_gpio_set()
396 for (bank = 0; bank < atmel_pioctrl->nbanks; bank++) { in atmel_gpio_set_multiple()
401 * On a 64-bit platform, BITS_PER_LONG is 64 so it is necessary to iterate over in atmel_gpio_set_multiple()
434 /* --- PINCTRL --- */
439 unsigned bank = atmel_pioctrl->pins[pin_id]->bank; in atmel_pin_config_read()
440 unsigned line = atmel_pioctrl->pins[pin_id]->line; in atmel_pin_config_read()
441 void __iomem *addr = atmel_pioctrl->reg_base in atmel_pin_config_read()
455 unsigned bank = atmel_pioctrl->pins[pin_id]->bank; in atmel_pin_config_write()
456 unsigned line = atmel_pioctrl->pins[pin_id]->line; in atmel_pin_config_write()
457 void __iomem *addr = atmel_pioctrl->reg_base in atmel_pin_config_write()
470 return atmel_pioctrl->npins; in atmel_pctl_get_groups_count()
478 return atmel_pioctrl->groups[selector].name; in atmel_pctl_get_group_name()
487 *pins = (unsigned *)&atmel_pioctrl->groups[selector].pin; in atmel_pctl_get_group_pins()
499 for (i = 0; i < atmel_pioctrl->npins; i++) { in atmel_pctl_find_group_by_pin()
500 struct atmel_group *grp = atmel_pioctrl->groups + i; in atmel_pctl_find_group_by_pin()
502 if (grp->pin == pin) in atmel_pctl_find_group_by_pin()
511 u32 pinfunc, const char **grp_name, in atmel_pctl_xlate_pinfunc() argument
518 pin_id = ATMEL_GET_PIN_NO(pinfunc); in atmel_pctl_xlate_pinfunc()
519 func_id = ATMEL_GET_PIN_FUNC(pinfunc); in atmel_pctl_xlate_pinfunc()
522 return -EINVAL; in atmel_pctl_xlate_pinfunc()
528 return -EINVAL; in atmel_pctl_xlate_pinfunc()
529 *grp_name = grp->name; in atmel_pctl_xlate_pinfunc()
531 atmel_pioctrl->pins[pin_id]->mux = func_id; in atmel_pctl_xlate_pinfunc()
532 atmel_pioctrl->pins[pin_id]->ioset = ATMEL_GET_PIN_IOSET(pinfunc); in atmel_pctl_xlate_pinfunc()
534 if (np->parent == atmel_pioctrl->node) in atmel_pctl_xlate_pinfunc()
535 atmel_pioctrl->pins[pin_id]->device = np->name; in atmel_pctl_xlate_pinfunc()
537 atmel_pioctrl->pins[pin_id]->device = np->parent->name; in atmel_pctl_xlate_pinfunc()
551 u32 pinfunc; in atmel_pctl_dt_subnode_to_map() local
556 return -EINVAL; in atmel_pctl_dt_subnode_to_map()
561 dev_err(pctldev->dev, "%pOF: could not parse node property\n", in atmel_pctl_dt_subnode_to_map()
566 num_pins = pins->length / sizeof(u32); in atmel_pctl_dt_subnode_to_map()
568 dev_err(pctldev->dev, "no pins found in node %pOF\n", np); in atmel_pctl_dt_subnode_to_map()
569 ret = -EINVAL; in atmel_pctl_dt_subnode_to_map()
589 ret = of_property_read_u32_index(np, "pinmux", i, &pinfunc); in atmel_pctl_dt_subnode_to_map()
593 ret = atmel_pctl_xlate_pinfunc(pctldev, np, pinfunc, &group, in atmel_pctl_dt_subnode_to_map()
649 dev_err(pctldev->dev, "can't create maps for node %pOF\n", in atmel_pctl_dt_node_to_map()
682 *groups = atmel_pioctrl->group_names; in atmel_pmx_get_function_groups()
683 *num_groups = atmel_pioctrl->npins; in atmel_pmx_get_function_groups()
696 dev_dbg(pctldev->dev, "enable function %s group %s\n", in atmel_pmx_set_mux()
697 atmel_functions[function], atmel_pioctrl->groups[group].name); in atmel_pmx_set_mux()
699 pin = atmel_pioctrl->groups[group].pin; in atmel_pmx_set_mux()
703 dev_dbg(pctldev->dev, "pin: %u, conf: 0x%08x\n", pin, conf); in atmel_pmx_set_mux()
722 struct atmel_group *grp = atmel_pioctrl->groups + group; in atmel_conf_pin_config_group_get()
723 unsigned pin_id = grp->pin; in atmel_conf_pin_config_group_get()
731 return -EINVAL; in atmel_conf_pin_config_group_get()
737 return -EINVAL; in atmel_conf_pin_config_group_get()
743 return -EINVAL; in atmel_conf_pin_config_group_get()
748 return -EINVAL; in atmel_conf_pin_config_group_get()
753 return -EINVAL; in atmel_conf_pin_config_group_get()
758 return -EINVAL; in atmel_conf_pin_config_group_get()
762 return -ENOTSUPP; in atmel_conf_pin_config_group_get()
775 struct atmel_group *grp = atmel_pioctrl->groups + group; in atmel_conf_pin_config_group_set()
776 unsigned bank, pin, pin_id = grp->pin; in atmel_conf_pin_config_group_set()
786 dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n", in atmel_conf_pin_config_group_set()
821 * - can't have different debounce periods inside a same group, in atmel_conf_pin_config_group_set()
822 * - the register to configure this period is a secure register. in atmel_conf_pin_config_group_set()
837 writel_relaxed(mask, atmel_pioctrl->reg_base + in atmel_conf_pin_config_group_set()
841 writel_relaxed(mask, atmel_pioctrl->reg_base + in atmel_conf_pin_config_group_set()
855 dev_warn(pctldev->dev, "drive strength not updated (incorrect value)\n"); in atmel_conf_pin_config_group_set()
859 dev_warn(pctldev->dev, in atmel_conf_pin_config_group_set()
866 dev_dbg(pctldev->dev, "%s: reg=0x%08x\n", __func__, conf); in atmel_conf_pin_config_group_set()
878 if (!atmel_pioctrl->pins[pin_id]->device) in atmel_conf_pin_config_dbg_show()
881 if (atmel_pioctrl->pins[pin_id]) in atmel_conf_pin_config_dbg_show()
883 atmel_pioctrl->pins[pin_id]->device, in atmel_conf_pin_config_dbg_show()
884 atmel_pioctrl->pins[pin_id]->ioset); in atmel_conf_pin_config_dbg_show()
888 seq_printf(s, "%s ", "pull-up"); in atmel_conf_pin_config_dbg_show()
890 seq_printf(s, "%s ", "pull-down"); in atmel_conf_pin_config_dbg_show()
894 seq_printf(s, "%s ", "open-drain"); in atmel_conf_pin_config_dbg_show()
900 seq_printf(s, "%s ", "medium-drive"); in atmel_conf_pin_config_dbg_show()
903 seq_printf(s, "%s ", "high-drive"); in atmel_conf_pin_config_dbg_show()
907 seq_printf(s, "%s ", "low-drive"); in atmel_conf_pin_config_dbg_show()
934 for (i = 0; i < atmel_pioctrl->nbanks; i++) { in atmel_pctrl_suspend()
935 atmel_pioctrl->pm_suspend_backup[i].imr = in atmel_pctrl_suspend()
938 ~atmel_pioctrl->pm_wakeup_sources[i]); in atmel_pctrl_suspend()
939 atmel_pioctrl->pm_suspend_backup[i].odsr = in atmel_pctrl_suspend()
944 atmel_pioctrl->pm_suspend_backup[i].cfgr[j] = in atmel_pctrl_suspend()
958 for (i = 0; i < atmel_pioctrl->nbanks; i++) { in atmel_pctrl_resume()
960 atmel_pioctrl->pm_suspend_backup[i].imr); in atmel_pctrl_resume()
962 atmel_pioctrl->pm_suspend_backup[i].odsr); in atmel_pctrl_resume()
967 atmel_pioctrl->pm_suspend_backup[i].cfgr[j]); in atmel_pctrl_resume()
992 .compatible = "atmel,sama5d2-pinctrl",
995 .compatible = "microchip,sama7g5-pinctrl",
1004 struct device *dev = &pdev->dev; in atmel_pinctrl_probe()
1015 return -ENOMEM; in atmel_pinctrl_probe()
1016 atmel_pioctrl->dev = dev; in atmel_pinctrl_probe()
1017 atmel_pioctrl->node = dev->of_node; in atmel_pinctrl_probe()
1020 match = of_match_node(atmel_pctrl_of_match, dev->of_node); in atmel_pinctrl_probe()
1023 return -ENODEV; in atmel_pinctrl_probe()
1025 atmel_pioctrl_data = match->data; in atmel_pinctrl_probe()
1026 atmel_pioctrl->nbanks = atmel_pioctrl_data->nbanks; in atmel_pinctrl_probe()
1027 atmel_pioctrl->npins = atmel_pioctrl->nbanks * ATMEL_PIO_NPINS_PER_BANK; in atmel_pinctrl_probe()
1029 atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); in atmel_pinctrl_probe()
1030 if (IS_ERR(atmel_pioctrl->reg_base)) in atmel_pinctrl_probe()
1031 return PTR_ERR(atmel_pioctrl->reg_base); in atmel_pinctrl_probe()
1033 atmel_pioctrl->clk = devm_clk_get(dev, NULL); in atmel_pinctrl_probe()
1034 if (IS_ERR(atmel_pioctrl->clk)) { in atmel_pinctrl_probe()
1036 return PTR_ERR(atmel_pioctrl->clk); in atmel_pinctrl_probe()
1039 atmel_pioctrl->pins = devm_kcalloc(dev, in atmel_pinctrl_probe()
1040 atmel_pioctrl->npins, in atmel_pinctrl_probe()
1041 sizeof(*atmel_pioctrl->pins), in atmel_pinctrl_probe()
1043 if (!atmel_pioctrl->pins) in atmel_pinctrl_probe()
1044 return -ENOMEM; in atmel_pinctrl_probe()
1046 pin_desc = devm_kcalloc(dev, atmel_pioctrl->npins, sizeof(*pin_desc), in atmel_pinctrl_probe()
1049 return -ENOMEM; in atmel_pinctrl_probe()
1051 atmel_pinctrl_desc.npins = atmel_pioctrl->npins; in atmel_pinctrl_probe()
1057 atmel_pioctrl->npins, sizeof(*group_names), in atmel_pinctrl_probe()
1060 return -ENOMEM; in atmel_pinctrl_probe()
1061 atmel_pioctrl->group_names = group_names; in atmel_pinctrl_probe()
1063 atmel_pioctrl->groups = devm_kcalloc(&pdev->dev, in atmel_pinctrl_probe()
1064 atmel_pioctrl->npins, sizeof(*atmel_pioctrl->groups), in atmel_pinctrl_probe()
1066 if (!atmel_pioctrl->groups) in atmel_pinctrl_probe()
1067 return -ENOMEM; in atmel_pinctrl_probe()
1068 for (i = 0 ; i < atmel_pioctrl->npins; i++) { in atmel_pinctrl_probe()
1069 struct atmel_group *group = atmel_pioctrl->groups + i; in atmel_pinctrl_probe()
1073 atmel_pioctrl->pins[i] = devm_kzalloc(dev, in atmel_pinctrl_probe()
1074 sizeof(**atmel_pioctrl->pins), GFP_KERNEL); in atmel_pinctrl_probe()
1075 if (!atmel_pioctrl->pins[i]) in atmel_pinctrl_probe()
1076 return -ENOMEM; in atmel_pinctrl_probe()
1078 atmel_pioctrl->pins[i]->pin_id = i; in atmel_pinctrl_probe()
1079 atmel_pioctrl->pins[i]->bank = bank; in atmel_pinctrl_probe()
1080 atmel_pioctrl->pins[i]->line = line; in atmel_pinctrl_probe()
1087 group->name = group_names[i] = pin_desc[i].name; in atmel_pinctrl_probe()
1088 group->pin = pin_desc[i].number; in atmel_pinctrl_probe()
1093 atmel_pioctrl->gpio_chip = &atmel_gpio_chip; in atmel_pinctrl_probe()
1094 atmel_pioctrl->gpio_chip->of_node = dev->of_node; in atmel_pinctrl_probe()
1095 atmel_pioctrl->gpio_chip->ngpio = atmel_pioctrl->npins; in atmel_pinctrl_probe()
1096 atmel_pioctrl->gpio_chip->label = dev_name(dev); in atmel_pinctrl_probe()
1097 atmel_pioctrl->gpio_chip->parent = dev; in atmel_pinctrl_probe()
1098 atmel_pioctrl->gpio_chip->names = atmel_pioctrl->group_names; in atmel_pinctrl_probe()
1100 atmel_pioctrl->pm_wakeup_sources = devm_kcalloc(dev, in atmel_pinctrl_probe()
1101 atmel_pioctrl->nbanks, in atmel_pinctrl_probe()
1102 sizeof(*atmel_pioctrl->pm_wakeup_sources), in atmel_pinctrl_probe()
1104 if (!atmel_pioctrl->pm_wakeup_sources) in atmel_pinctrl_probe()
1105 return -ENOMEM; in atmel_pinctrl_probe()
1107 atmel_pioctrl->pm_suspend_backup = devm_kcalloc(dev, in atmel_pinctrl_probe()
1108 atmel_pioctrl->nbanks, in atmel_pinctrl_probe()
1109 sizeof(*atmel_pioctrl->pm_suspend_backup), in atmel_pinctrl_probe()
1111 if (!atmel_pioctrl->pm_suspend_backup) in atmel_pinctrl_probe()
1112 return -ENOMEM; in atmel_pinctrl_probe()
1114 atmel_pioctrl->irqs = devm_kcalloc(dev, in atmel_pinctrl_probe()
1115 atmel_pioctrl->nbanks, in atmel_pinctrl_probe()
1116 sizeof(*atmel_pioctrl->irqs), in atmel_pinctrl_probe()
1118 if (!atmel_pioctrl->irqs) in atmel_pinctrl_probe()
1119 return -ENOMEM; in atmel_pinctrl_probe()
1122 for (i = 0; i < atmel_pioctrl->nbanks; i++) { in atmel_pinctrl_probe()
1127 return -EINVAL; in atmel_pinctrl_probe()
1129 atmel_pioctrl->irqs[i] = res->start; in atmel_pinctrl_probe()
1130 irq_set_chained_handler(res->start, atmel_gpio_irq_handler); in atmel_pinctrl_probe()
1131 irq_set_handler_data(res->start, atmel_pioctrl); in atmel_pinctrl_probe()
1135 atmel_pioctrl->irq_domain = irq_domain_add_linear(dev->of_node, in atmel_pinctrl_probe()
1136 atmel_pioctrl->gpio_chip->ngpio, in atmel_pinctrl_probe()
1138 if (!atmel_pioctrl->irq_domain) { in atmel_pinctrl_probe()
1140 return -ENODEV; in atmel_pinctrl_probe()
1142 atmel_pioctrl->irq_domain->name = "atmel gpio"; in atmel_pinctrl_probe()
1144 for (i = 0; i < atmel_pioctrl->npins; i++) { in atmel_pinctrl_probe()
1145 int irq = irq_create_mapping(atmel_pioctrl->irq_domain, i); in atmel_pinctrl_probe()
1155 ret = clk_prepare_enable(atmel_pioctrl->clk); in atmel_pinctrl_probe()
1161 atmel_pioctrl->pinctrl_dev = devm_pinctrl_register(&pdev->dev, in atmel_pinctrl_probe()
1164 if (IS_ERR(atmel_pioctrl->pinctrl_dev)) { in atmel_pinctrl_probe()
1165 ret = PTR_ERR(atmel_pioctrl->pinctrl_dev); in atmel_pinctrl_probe()
1170 ret = gpiochip_add_data(atmel_pioctrl->gpio_chip, atmel_pioctrl); in atmel_pinctrl_probe()
1176 ret = gpiochip_add_pin_range(atmel_pioctrl->gpio_chip, dev_name(dev), in atmel_pinctrl_probe()
1177 0, 0, atmel_pioctrl->gpio_chip->ngpio); in atmel_pinctrl_probe()
1183 dev_info(&pdev->dev, "atmel pinctrl initialized\n"); in atmel_pinctrl_probe()
1188 gpiochip_remove(atmel_pioctrl->gpio_chip); in atmel_pinctrl_probe()
1191 clk_disable_unprepare(atmel_pioctrl->clk); in atmel_pinctrl_probe()
1194 irq_domain_remove(atmel_pioctrl->irq_domain); in atmel_pinctrl_probe()
1201 .name = "pinctrl-at91-pio4",