Lines Matching +full:8 +full:- +full:12
1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/pinctrl/pinconf-generic.h>
15 #include <dt-bindings/pinctrl/mt65xx.h>
17 #include "pinctrl-mtk-common.h"
18 #include "pinctrl-mtk-mt2712.h"
22 MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10),
25 MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6),
30 MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8),
31 MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12),
34 MTK_PIN_PUPD_SPEC_SR(36, 0xf40, 10, 9, 8),
47 MTK_PIN_PUPD_SPEC_SR(49, 0xdf0, 14, 13, 12),
48 MTK_PIN_PUPD_SPEC_SR(50, 0xdf0, 10, 9, 8),
57 MTK_PIN_PUPD_SPEC_SR(64, 0xdb0, 14, 13, 12),
59 MTK_PIN_PUPD_SPEC_SR(66, 0xdb0, 10, 9, 8),
66 MTK_PIN_PUPD_SPEC_SR(90, 0xdd0, 14, 13, 12),
67 MTK_PIN_PUPD_SPEC_SR(91, 0xdd0, 10, 9, 8),
75 MTK_PIN_PUPD_SPEC_SR(136, 0xe50, 14, 13, 12),
77 MTK_PIN_PUPD_SPEC_SR(138, 0xe70, 8, 7, 6),
79 MTK_PIN_PUPD_SPEC_SR(140, 0xe70, 14, 13, 12),
97 MTK_PIN_IES_SMT_SPEC(8, 11, 0x900, 1),
98 MTK_PIN_IES_SMT_SPEC(12, 12, 0x8d0, 6),
125 MTK_PIN_IES_SMT_SPEC(71, 74, 0x8d0, 8),
134 MTK_PIN_IES_SMT_SPEC(101, 104, 0x8d0, 12),
155 MTK_PIN_IES_SMT_SPEC(131, 134, 0x8e0, 8),
160 MTK_PIN_IES_SMT_SPEC(157, 160, 0x8e0, 12),
177 MTK_PIN_IES_SMT_SPEC(187, 187, 0x8f0, 8),
179 MTK_PIN_IES_SMT_SPEC(189, 189, 0x8f0, 8),
185 MTK_PIN_IES_SMT_SPEC(196, 199, 0x8f0, 12),
194 MTK_PIN_IES_SMT_SPEC(8, 9, 0x8c0, 1),
196 MTK_PIN_IES_SMT_SPEC(12, 12, 0x890, 6),
222 MTK_PIN_IES_SMT_SPEC(71, 74, 0x890, 8),
231 MTK_PIN_IES_SMT_SPEC(101, 104, 0x890, 12),
252 MTK_PIN_IES_SMT_SPEC(131, 135, 0x8a0, 8),
257 MTK_PIN_IES_SMT_SPEC(157, 160, 0x8a0, 12),
274 MTK_PIN_IES_SMT_SPEC(187, 187, 0x8b0, 8),
276 MTK_PIN_IES_SMT_SPEC(189, 189, 0x8b0, 8),
282 MTK_PIN_IES_SMT_SPEC(196, 199, 0x8b0, 12),
298 return -EINVAL; in mt2712_ies_smt_set()
302 /* 0E4E8SR 4/8/12/16 */
304 /* 0E2E4SR 2/4/6/8 */
305 MTK_DRV_GRP(2, 8, 1, 2, 2),
306 /* E8E4E2 2/4/6/8/10/12/14/16 */
316 MTK_PIN_DRV_GRP(4, 0xc00, 12, 0),
317 MTK_PIN_DRV_GRP(5, 0xc00, 12, 0),
318 MTK_PIN_DRV_GRP(6, 0xc00, 12, 0),
319 MTK_PIN_DRV_GRP(7, 0xc00, 12, 0),
321 MTK_PIN_DRV_GRP(8, 0xc10, 0, 0),
326 MTK_PIN_DRV_GRP(12, 0xb60, 0, 0),
343 MTK_PIN_DRV_GRP(25, 0xb40, 8, 0),
345 MTK_PIN_DRV_GRP(26, 0xb40, 12, 0),
349 MTK_PIN_DRV_GRP(28, 0xb40, 12, 0),
350 MTK_PIN_DRV_GRP(29, 0xb40, 12, 0),
352 MTK_PIN_DRV_GRP(30, 0xf50, 8, 2),
353 MTK_PIN_DRV_GRP(31, 0xf50, 8, 2),
354 MTK_PIN_DRV_GRP(32, 0xf50, 8, 2),
355 MTK_PIN_DRV_GRP(33, 0xf50, 8, 2),
356 MTK_PIN_DRV_GRP(34, 0xf50, 8, 2),
357 MTK_PIN_DRV_GRP(35, 0xf50, 8, 2),
358 MTK_PIN_DRV_GRP(36, 0xf50, 8, 2),
360 MTK_PIN_DRV_GRP(37, 0xc40, 8, 2),
362 MTK_PIN_DRV_GRP(38, 0xc60, 8, 2),
363 MTK_PIN_DRV_GRP(39, 0xc60, 8, 2),
364 MTK_PIN_DRV_GRP(40, 0xc60, 8, 2),
365 MTK_PIN_DRV_GRP(41, 0xc60, 8, 2),
366 MTK_PIN_DRV_GRP(42, 0xc60, 8, 2),
367 MTK_PIN_DRV_GRP(43, 0xc60, 8, 2),
368 MTK_PIN_DRV_GRP(44, 0xc60, 8, 2),
369 MTK_PIN_DRV_GRP(45, 0xc60, 8, 2),
371 MTK_PIN_DRV_GRP(46, 0xc50, 8, 2),
373 MTK_PIN_DRV_GRP(47, 0xda0, 8, 2),
375 MTK_PIN_DRV_GRP(48, 0xd90, 8, 2),
377 MTK_PIN_DRV_GRP(49, 0xd60, 8, 2),
378 MTK_PIN_DRV_GRP(50, 0xd60, 8, 2),
379 MTK_PIN_DRV_GRP(51, 0xd60, 8, 2),
380 MTK_PIN_DRV_GRP(52, 0xd60, 8, 2),
382 MTK_PIN_DRV_GRP(53, 0xd50, 8, 2),
384 MTK_PIN_DRV_GRP(54, 0xd80, 8, 2),
386 MTK_PIN_DRV_GRP(55, 0xe00, 8, 2),
388 MTK_PIN_DRV_GRP(56, 0xd40, 8, 2),
390 MTK_PIN_DRV_GRP(63, 0xc80, 8, 2),
392 MTK_PIN_DRV_GRP(64, 0xca0, 8, 2),
393 MTK_PIN_DRV_GRP(65, 0xca0, 8, 2),
394 MTK_PIN_DRV_GRP(66, 0xca0, 8, 2),
396 MTK_PIN_DRV_GRP(67, 0xcd0, 8, 2),
398 MTK_PIN_DRV_GRP(68, 0xca0, 8, 2),
400 MTK_PIN_DRV_GRP(69, 0xc90, 8, 2),
402 MTK_PIN_DRV_GRP(70, 0xcc0, 8, 2),
404 MTK_PIN_DRV_GRP(71, 0xb60, 8, 1),
405 MTK_PIN_DRV_GRP(72, 0xb60, 8, 1),
406 MTK_PIN_DRV_GRP(73, 0xb60, 8, 1),
407 MTK_PIN_DRV_GRP(74, 0xb60, 8, 1),
409 MTK_PIN_DRV_GRP(75, 0xb60, 12, 1),
410 MTK_PIN_DRV_GRP(76, 0xb60, 12, 1),
411 MTK_PIN_DRV_GRP(77, 0xb60, 12, 1),
418 MTK_PIN_DRV_GRP(82, 0xb60, 12, 1),
419 MTK_PIN_DRV_GRP(83, 0xb60, 12, 1),
420 MTK_PIN_DRV_GRP(84, 0xb60, 12, 1),
421 MTK_PIN_DRV_GRP(85, 0xb60, 12, 1),
422 MTK_PIN_DRV_GRP(86, 0xb60, 12, 1),
423 MTK_PIN_DRV_GRP(87, 0xb60, 12, 1),
424 MTK_PIN_DRV_GRP(88, 0xb60, 12, 1),
426 MTK_PIN_DRV_GRP(89, 0xce0, 8, 2),
428 MTK_PIN_DRV_GRP(90, 0xd00, 8, 2),
429 MTK_PIN_DRV_GRP(91, 0xd00, 8, 2),
430 MTK_PIN_DRV_GRP(92, 0xd00, 8, 2),
431 MTK_PIN_DRV_GRP(93, 0xd00, 8, 2),
433 MTK_PIN_DRV_GRP(94, 0xd20, 8, 2),
435 MTK_PIN_DRV_GRP(95, 0xcf0, 8, 2),
437 MTK_PIN_DRV_GRP(96, 0xd30, 8, 2),
444 MTK_PIN_DRV_GRP(101, 0xb70, 8, 0),
445 MTK_PIN_DRV_GRP(102, 0xb70, 8, 0),
446 MTK_PIN_DRV_GRP(103, 0xb70, 8, 0),
447 MTK_PIN_DRV_GRP(104, 0xb70, 8, 0),
458 MTK_PIN_DRV_GRP(143, 0xba0, 12, 0),
459 MTK_PIN_DRV_GRP(144, 0xba0, 12, 0),
460 MTK_PIN_DRV_GRP(145, 0xba0, 12, 0),
461 MTK_PIN_DRV_GRP(146, 0xba0, 12, 0),
462 MTK_PIN_DRV_GRP(147, 0xba0, 12, 0),
475 MTK_PIN_DRV_GRP(157, 0xbb0, 8, 0),
476 MTK_PIN_DRV_GRP(158, 0xbb0, 8, 0),
477 MTK_PIN_DRV_GRP(159, 0xbb0, 8, 0),
478 MTK_PIN_DRV_GRP(160, 0xbb0, 8, 0),
480 MTK_PIN_DRV_GRP(161, 0xbb0, 12, 0),
481 MTK_PIN_DRV_GRP(162, 0xbb0, 12, 0),
482 MTK_PIN_DRV_GRP(163, 0xbb0, 12, 0),
483 MTK_PIN_DRV_GRP(164, 0xbb0, 12, 0),
493 MTK_PIN_DRV_GRP(171, 0xbc0, 8, 0),
494 MTK_PIN_DRV_GRP(172, 0xbc0, 8, 0),
496 MTK_PIN_DRV_GRP(173, 0xbc0, 12, 0),
501 MTK_PIN_DRV_GRP(176, 0xbc0, 12, 0),
505 MTK_PIN_DRV_GRP(178, 0xbd0, 8, 0),
509 MTK_PIN_DRV_GRP(180, 0xbd0, 8, 0),
511 MTK_PIN_DRV_GRP(181, 0xbd0, 12, 0),
515 MTK_PIN_DRV_GRP(183, 0xbd0, 12, 0),
521 MTK_PIN_DRV_GRP(186, 0xbe0, 8, 0),
523 MTK_PIN_DRV_GRP(187, 0xbe0, 12, 0),
527 MTK_PIN_DRV_GRP(189, 0xbe0, 12, 0),
533 MTK_PIN_DRV_GRP(192, 0xbf0, 8, 0),
538 MTK_PIN_DRV_GRP(195, 0xbf0, 8, 0),
540 MTK_PIN_DRV_GRP(196, 0xbf0, 12, 0),
541 MTK_PIN_DRV_GRP(197, 0xbf0, 12, 0),
542 MTK_PIN_DRV_GRP(198, 0xbf0, 12, 0),
543 MTK_PIN_DRV_GRP(199, 0xbf0, 12, 0),
554 MTK_PIN_DRV_GRP(207, 0xc00, 8, 0),
555 MTK_PIN_DRV_GRP(208, 0xc00, 8, 0),
556 MTK_PIN_DRV_GRP(209, 0xc00, 8, 0),
581 .ports = 8,
594 .compatible = "mediatek,mt2712-pinctrl",
603 .name = "mediatek-mt2712-pinctrl",