Lines Matching +full:input +full:- +full:debounce
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013, Intel Corporation
25 #include <linux/pinctrl/pinconf-generic.h>
27 #include "pinctrl-intel.h"
62 #define BYT_INPUT_EN BIT(2) /* 0: input enabled (active low)*/
549 for (i = 0; i < vg->ncommunities; i++) { in byt_get_community()
550 comm = vg->communities + i; in byt_get_community()
551 if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base) in byt_get_community()
567 offset -= comm->pin_base; in byt_gpio_reg()
576 reg_offset = comm->pad_map[offset] * 16; in byt_gpio_reg()
580 return comm->pad_regs + reg_offset + reg; in byt_gpio_reg()
587 return vg->soc->ngroups; in byt_get_groups_count()
595 return vg->soc->groups[selector].name; in byt_get_group_name()
605 *pins = vg->soc->groups[selector].pins; in byt_get_group_pins()
606 *num_pins = vg->soc->groups[selector].npins; in byt_get_group_pins()
621 return vg->soc->nfunctions; in byt_get_functions_count()
629 return vg->soc->functions[selector].name; in byt_get_function_name()
639 *groups = vg->soc->functions[selector].groups; in byt_get_function_groups()
640 *num_groups = vg->soc->functions[selector].ngroups; in byt_get_function_groups()
660 dev_warn(vg->dev, in byt_set_group_simple_mux()
690 dev_warn(vg->dev, in byt_set_group_mixed_mux()
709 const struct intel_function func = vg->soc->functions[func_selector]; in byt_set_mux()
710 const struct intel_pingroup group = vg->soc->groups[group_selector]; in byt_set_mux()
724 /* SCORE pin 92-93 */ in byt_get_gpio_mux()
725 if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) && in byt_get_gpio_mux()
729 /* SUS pin 11-21 */ in byt_get_gpio_mux()
730 if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) && in byt_get_gpio_mux()
746 /* Do not clear direct-irq enabled IRQs (from gpio_disable_free) */ in byt_gpio_clear_triggering()
783 dev_warn(vg->dev, FW_BUG "pin %u forcibly re-configured as GPIO\n", offset); in byt_gpio_request_enable()
788 pm_runtime_get(vg->dev); in byt_gpio_request_enable()
800 pm_runtime_put(vg->dev); in byt_gpio_disable_free()
815 dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output"); in byt_gpio_direct_irq_check()
821 bool input) in byt_gpio_set_direction() argument
832 if (input) in byt_gpio_set_direction()
890 return -EINVAL; in byt_set_pull_strength()
905 u32 conf, pull, val, debounce; in byt_pin_config_get() local
917 return -EINVAL; in byt_pin_config_get()
920 /* Pull assignment is only applicable in input mode */ in byt_pin_config_get()
922 return -EINVAL; in byt_pin_config_get()
928 /* Pull assignment is only applicable in input mode */ in byt_pin_config_get()
930 return -EINVAL; in byt_pin_config_get()
937 return -EINVAL; in byt_pin_config_get()
940 debounce = readl(db_reg); in byt_pin_config_get()
943 switch (debounce & BYT_DEBOUNCE_PULSE_MASK) { in byt_pin_config_get()
966 return -EINVAL; in byt_pin_config_get()
971 return -ENOTSUPP; in byt_pin_config_get()
990 u32 conf, val, debounce; in byt_pin_config_set() local
1012 * Pull assignment is only applicable in input mode. If in byt_pin_config_set()
1013 * chip is not in input mode, set it and warn about it. in byt_pin_config_set()
1018 dev_warn(vg->dev, in byt_pin_config_set()
1019 "pin %u forcibly set to input mode\n", in byt_pin_config_set()
1034 * Pull assignment is only applicable in input mode. If in byt_pin_config_set()
1035 * chip is not in input mode, set it and warn about it. in byt_pin_config_set()
1040 dev_warn(vg->dev, in byt_pin_config_set()
1041 "pin %u forcibly set to input mode\n", in byt_pin_config_set()
1051 debounce = readl(db_reg); in byt_pin_config_set()
1060 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1061 debounce |= BYT_DEBOUNCE_PULSE_375US; in byt_pin_config_set()
1064 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1065 debounce |= BYT_DEBOUNCE_PULSE_750US; in byt_pin_config_set()
1068 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1069 debounce |= BYT_DEBOUNCE_PULSE_1500US; in byt_pin_config_set()
1072 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1073 debounce |= BYT_DEBOUNCE_PULSE_3MS; in byt_pin_config_set()
1076 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1077 debounce |= BYT_DEBOUNCE_PULSE_6MS; in byt_pin_config_set()
1080 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1081 debounce |= BYT_DEBOUNCE_PULSE_12MS; in byt_pin_config_set()
1084 debounce &= ~BYT_DEBOUNCE_PULSE_MASK; in byt_pin_config_set()
1085 debounce |= BYT_DEBOUNCE_PULSE_24MS; in byt_pin_config_set()
1089 ret = -EINVAL; in byt_pin_config_set()
1094 writel(debounce, db_reg); in byt_pin_config_set()
1097 ret = -ENOTSUPP; in byt_pin_config_set()
1166 return -EINVAL; in byt_gpio_get_direction()
1177 return -EINVAL; in byt_gpio_get_direction()
1235 for (i = 0; i < vg->soc->npins; i++) { in byt_gpio_dbg_show()
1245 pin = vg->soc->pins[i].number; in byt_gpio_dbg_show()
1301 " gpio-%-3d (%-20.20s) %s %s %s pad-%-3d offset:0x%03x mux:%d %s%s%s", in byt_gpio_dbg_show()
1307 comm->pad_map[i], comm->pad_map[i] * 16, in byt_gpio_dbg_show()
1314 seq_printf(s, " %-4s %-3s", pull, pull_str); in byt_gpio_dbg_show()
1319 seq_puts(s, " open-drain"); in byt_gpio_dbg_show()
1409 if (!reg || offset >= vg->chip.ngpio) in byt_irq_type()
1410 return -EINVAL; in byt_irq_type()
1450 for (base = 0; base < vg->chip.ngpio; base += 32) { in byt_gpio_irq_handler()
1454 dev_warn(vg->dev, in byt_gpio_irq_handler()
1464 virq = irq_find_mapping(vg->chip.irq.domain, base + pin); in byt_gpio_irq_handler()
1468 chip->irq_eoi(data); in byt_gpio_irq_handler()
1485 for (i = 0; i < vg->soc->npins; i++) { in byt_init_irq_valid_mask()
1486 unsigned int pin = vg->soc->pins[i].number; in byt_init_irq_valid_mask()
1490 dev_warn(vg->dev, in byt_init_irq_valid_mask()
1499 dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i); in byt_init_irq_valid_mask()
1502 dev_dbg(vg->dev, "disabling GPIO %d\n", i); in byt_init_irq_valid_mask()
1514 for (base = 0; base < vg->soc->npins; base += 32) { in byt_gpio_irq_init_hw()
1518 dev_warn(vg->dev, in byt_gpio_irq_init_hw()
1529 dev_err(vg->dev, in byt_gpio_irq_init_hw()
1540 struct device *dev = vg->dev; in byt_gpio_add_pin_ranges()
1543 ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins); in byt_gpio_add_pin_ranges()
1552 struct platform_device *pdev = to_platform_device(vg->dev); in byt_gpio_probe()
1557 vg->chip = byt_gpio_chip; in byt_gpio_probe()
1558 gc = &vg->chip; in byt_gpio_probe()
1559 gc->label = dev_name(vg->dev); in byt_gpio_probe()
1560 gc->base = -1; in byt_gpio_probe()
1561 gc->can_sleep = false; in byt_gpio_probe()
1562 gc->add_pin_ranges = byt_gpio_add_pin_ranges; in byt_gpio_probe()
1563 gc->parent = vg->dev; in byt_gpio_probe()
1564 gc->ngpio = vg->soc->npins; in byt_gpio_probe()
1567 vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads), in byt_gpio_probe()
1569 if (!vg->context.pads) in byt_gpio_probe()
1570 return -ENOMEM; in byt_gpio_probe()
1578 vg->irqchip.name = "BYT-GPIO", in byt_gpio_probe()
1579 vg->irqchip.irq_ack = byt_irq_ack, in byt_gpio_probe()
1580 vg->irqchip.irq_mask = byt_irq_mask, in byt_gpio_probe()
1581 vg->irqchip.irq_unmask = byt_irq_unmask, in byt_gpio_probe()
1582 vg->irqchip.irq_set_type = byt_irq_type, in byt_gpio_probe()
1583 vg->irqchip.flags = IRQCHIP_SKIP_SET_WAKE, in byt_gpio_probe()
1585 girq = &gc->irq; in byt_gpio_probe()
1586 girq->chip = &vg->irqchip; in byt_gpio_probe()
1587 girq->init_hw = byt_gpio_irq_init_hw; in byt_gpio_probe()
1588 girq->init_valid_mask = byt_init_irq_valid_mask; in byt_gpio_probe()
1589 girq->parent_handler = byt_gpio_irq_handler; in byt_gpio_probe()
1590 girq->num_parents = 1; in byt_gpio_probe()
1591 girq->parents = devm_kcalloc(vg->dev, girq->num_parents, in byt_gpio_probe()
1592 sizeof(*girq->parents), GFP_KERNEL); in byt_gpio_probe()
1593 if (!girq->parents) in byt_gpio_probe()
1594 return -ENOMEM; in byt_gpio_probe()
1595 girq->parents[0] = irq; in byt_gpio_probe()
1596 girq->default_type = IRQ_TYPE_NONE; in byt_gpio_probe()
1597 girq->handler = handle_bad_irq; in byt_gpio_probe()
1600 ret = devm_gpiochip_add_data(vg->dev, gc, vg); in byt_gpio_probe()
1602 dev_err(vg->dev, "failed adding byt-gpio chip\n"); in byt_gpio_probe()
1612 struct platform_device *pdev = to_platform_device(vg->dev); in byt_set_soc_data()
1615 vg->soc = soc; in byt_set_soc_data()
1617 vg->ncommunities = vg->soc->ncommunities; in byt_set_soc_data()
1618 vg->communities = devm_kcalloc(vg->dev, vg->ncommunities, in byt_set_soc_data()
1619 sizeof(*vg->communities), GFP_KERNEL); in byt_set_soc_data()
1620 if (!vg->communities) in byt_set_soc_data()
1621 return -ENOMEM; in byt_set_soc_data()
1623 for (i = 0; i < vg->soc->ncommunities; i++) { in byt_set_soc_data()
1624 struct intel_community *comm = vg->communities + i; in byt_set_soc_data()
1626 *comm = vg->soc->communities[i]; in byt_set_soc_data()
1628 comm->pad_regs = devm_platform_ioremap_resource(pdev, 0); in byt_set_soc_data()
1629 if (IS_ERR(comm->pad_regs)) in byt_set_soc_data()
1630 return PTR_ERR(comm->pad_regs); in byt_set_soc_data()
1645 struct device *dev = &pdev->dev; in byt_pinctrl_probe()
1655 return -ENOMEM; in byt_pinctrl_probe()
1657 vg->dev = dev; in byt_pinctrl_probe()
1664 vg->pctldesc = byt_pinctrl_desc; in byt_pinctrl_probe()
1665 vg->pctldesc.name = dev_name(dev); in byt_pinctrl_probe()
1666 vg->pctldesc.pins = vg->soc->pins; in byt_pinctrl_probe()
1667 vg->pctldesc.npins = vg->soc->npins; in byt_pinctrl_probe()
1669 vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg); in byt_pinctrl_probe()
1670 if (IS_ERR(vg->pctldev)) { in byt_pinctrl_probe()
1672 return PTR_ERR(vg->pctldev); in byt_pinctrl_probe()
1694 for (i = 0; i < vg->soc->npins; i++) { in byt_gpio_suspend()
1697 unsigned int pin = vg->soc->pins[i].number; in byt_gpio_suspend()
1701 dev_warn(vg->dev, in byt_gpio_suspend()
1707 vg->context.pads[i].conf0 = value; in byt_gpio_suspend()
1711 vg->context.pads[i].val = value; in byt_gpio_suspend()
1726 for (i = 0; i < vg->soc->npins; i++) { in byt_gpio_resume()
1729 unsigned int pin = vg->soc->pins[i].number; in byt_gpio_resume()
1733 dev_warn(vg->dev, in byt_gpio_resume()
1740 vg->context.pads[i].conf0) { in byt_gpio_resume()
1742 value |= vg->context.pads[i].conf0; in byt_gpio_resume()
1750 vg->context.pads[i].val) { in byt_gpio_resume()
1754 v |= vg->context.pads[i].val; in byt_gpio_resume()