Lines Matching refs:NSP_PIN_DESC
141 #define NSP_PIN_DESC(p, n, g) \ macro
152 NSP_PIN_DESC(0, "spi_clk", 1),
153 NSP_PIN_DESC(1, "spi_ss", 1),
154 NSP_PIN_DESC(2, "spi_mosi", 1),
155 NSP_PIN_DESC(3, "spi_miso", 1),
156 NSP_PIN_DESC(4, "scl", 1),
157 NSP_PIN_DESC(5, "sda", 1),
158 NSP_PIN_DESC(6, "mdc", 1),
159 NSP_PIN_DESC(7, "mdio", 1),
160 NSP_PIN_DESC(8, "pwm0", 1),
161 NSP_PIN_DESC(9, "pwm1", 1),
162 NSP_PIN_DESC(10, "pwm2", 1),
163 NSP_PIN_DESC(11, "pwm3", 1),
164 NSP_PIN_DESC(12, "uart1_rx", 1),
165 NSP_PIN_DESC(13, "uart1_tx", 1),
166 NSP_PIN_DESC(14, "uart1_cts", 1),
167 NSP_PIN_DESC(15, "uart1_rts", 1),
168 NSP_PIN_DESC(16, "uart2_rx", 1),
169 NSP_PIN_DESC(17, "uart2_tx", 1),
170 NSP_PIN_DESC(18, "synce", 0),
171 NSP_PIN_DESC(19, "sata0_led", 0),
172 NSP_PIN_DESC(20, "sata1_led", 0),
173 NSP_PIN_DESC(21, "xtal_out", 1),
174 NSP_PIN_DESC(22, "sdio_pwr", 1),
175 NSP_PIN_DESC(23, "sdio_en_1p8v", 1),
176 NSP_PIN_DESC(24, "gpio_24", 1),
177 NSP_PIN_DESC(25, "gpio_25", 1),
178 NSP_PIN_DESC(26, "p5_led0", 0),
179 NSP_PIN_DESC(27, "p5_led1", 0),
180 NSP_PIN_DESC(28, "gpio_28", 1),
181 NSP_PIN_DESC(29, "gpio_29", 1),
182 NSP_PIN_DESC(30, "gpio_30", 1),
183 NSP_PIN_DESC(31, "gpio_31", 1),
184 NSP_PIN_DESC(32, "nand_ale", 0),
185 NSP_PIN_DESC(33, "nand_ce0", 0),
186 NSP_PIN_DESC(34, "nand_r/b", 0),
187 NSP_PIN_DESC(35, "nand_dq0", 0),
188 NSP_PIN_DESC(36, "nand_dq1", 0),
189 NSP_PIN_DESC(37, "nand_dq2", 0),
190 NSP_PIN_DESC(38, "nand_dq3", 0),
191 NSP_PIN_DESC(39, "nand_dq4", 0),
192 NSP_PIN_DESC(40, "nand_dq5", 0),
193 NSP_PIN_DESC(41, "nand_dq6", 0),
194 NSP_PIN_DESC(42, "nand_dq7", 0),