Lines Matching refs:gtr_dev
253 static inline u32 xpsgtr_read(struct xpsgtr_dev *gtr_dev, u32 reg) in xpsgtr_read() argument
255 return readl(gtr_dev->serdes + reg); in xpsgtr_read()
258 static inline void xpsgtr_write(struct xpsgtr_dev *gtr_dev, u32 reg, u32 value) in xpsgtr_write() argument
260 writel(value, gtr_dev->serdes + reg); in xpsgtr_write()
263 static inline void xpsgtr_clr_set(struct xpsgtr_dev *gtr_dev, u32 reg, in xpsgtr_clr_set() argument
266 u32 value = xpsgtr_read(gtr_dev, reg); in xpsgtr_clr_set()
270 xpsgtr_write(gtr_dev, reg, value); in xpsgtr_clr_set()
307 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_wait_pll_lock() local
311 dev_dbg(gtr_dev->dev, "Waiting for PLL lock\n"); in xpsgtr_wait_pll_lock()
330 dev_err(gtr_dev->dev, in xpsgtr_wait_pll_lock()
389 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_lane_set_protocol() local
394 xpsgtr_clr_set(gtr_dev, ICM_CFG0, ICM_CFG0_L0_MASK, protocol); in xpsgtr_lane_set_protocol()
397 xpsgtr_clr_set(gtr_dev, ICM_CFG0, ICM_CFG0_L1_MASK, in xpsgtr_lane_set_protocol()
401 xpsgtr_clr_set(gtr_dev, ICM_CFG1, ICM_CFG0_L0_MASK, protocol); in xpsgtr_lane_set_protocol()
404 xpsgtr_clr_set(gtr_dev, ICM_CFG1, ICM_CFG0_L1_MASK, in xpsgtr_lane_set_protocol()
436 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_phy_init_sata() local
440 writel(gtr_phy->lane, gtr_dev->siou + SATA_CONTROL_OFFSET); in xpsgtr_phy_init_sata()
446 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_phy_init_sgmii() local
451 xpsgtr_clr_set(gtr_dev, TX_PROT_BUS_WIDTH, mask, val); in xpsgtr_phy_init_sgmii()
452 xpsgtr_clr_set(gtr_dev, RX_PROT_BUS_WIDTH, mask, val); in xpsgtr_phy_init_sgmii()
504 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_phy_tx_term_fix() local
509 xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET); in xpsgtr_phy_tx_term_fix()
512 xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_EN); in xpsgtr_phy_tx_term_fix()
514 xpsgtr_write(gtr_dev, L3_TM_CALIB_DIG18, 0x00); in xpsgtr_phy_tx_term_fix()
515 xpsgtr_write(gtr_dev, L3_TM_CALIB_DIG19, L3_TM_OVERRIDE_NSW_CODE); in xpsgtr_phy_tx_term_fix()
525 xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET); in xpsgtr_phy_tx_term_fix()
527 dev_dbg(gtr_dev->dev, "calibrating...\n"); in xpsgtr_phy_tx_term_fix()
530 u32 reg = xpsgtr_read(gtr_dev, L3_CALIB_DONE_STATUS); in xpsgtr_phy_tx_term_fix()
536 dev_err(gtr_dev->dev, "calibration time out\n"); in xpsgtr_phy_tx_term_fix()
543 dev_dbg(gtr_dev->dev, "calibration done\n"); in xpsgtr_phy_tx_term_fix()
546 nsw = xpsgtr_read(gtr_dev, L0_TXPMA_ST_3) & L0_DN_CALIB_CODE; in xpsgtr_phy_tx_term_fix()
549 xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_EN); in xpsgtr_phy_tx_term_fix()
552 xpsgtr_write(gtr_dev, L3_TM_CALIB_DIG19, nsw >> L3_NSW_CALIB_SHIFT); in xpsgtr_phy_tx_term_fix()
555 xpsgtr_write(gtr_dev, L3_TM_CALIB_DIG18, in xpsgtr_phy_tx_term_fix()
560 xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET); in xpsgtr_phy_tx_term_fix()
568 struct xpsgtr_dev *gtr_dev = gtr_phy->dev; in xpsgtr_phy_init() local
571 mutex_lock(>r_dev->gtr_mutex); in xpsgtr_phy_init()
577 if (gtr_dev->tx_term_fix) { in xpsgtr_phy_init()
582 gtr_dev->tx_term_fix = false; in xpsgtr_phy_init()
610 mutex_unlock(>r_dev->gtr_mutex); in xpsgtr_phy_init()
760 struct xpsgtr_dev *gtr_dev = dev_get_drvdata(dev); in xpsgtr_xlate() local
779 if (phy_lane >= ARRAY_SIZE(gtr_dev->phys)) { in xpsgtr_xlate()
784 gtr_phy = >r_dev->phys[phy_lane]; in xpsgtr_xlate()
790 dev_err(gtr_dev->dev, "Invalid PHY type and/or instance\n"); in xpsgtr_xlate()
795 if (refclk >= ARRAY_SIZE(gtr_dev->refclk_sscs) || in xpsgtr_xlate()
796 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate()
821 struct xpsgtr_dev *gtr_dev = dev_get_drvdata(dev); in xpsgtr_suspend() local
824 gtr_dev->saved_icm_cfg0 = xpsgtr_read(gtr_dev, ICM_CFG0); in xpsgtr_suspend()
825 gtr_dev->saved_icm_cfg1 = xpsgtr_read(gtr_dev, ICM_CFG1); in xpsgtr_suspend()
832 struct xpsgtr_dev *gtr_dev = dev_get_drvdata(dev); in xpsgtr_resume() local
837 icm_cfg0 = xpsgtr_read(gtr_dev, ICM_CFG0); in xpsgtr_resume()
838 icm_cfg1 = xpsgtr_read(gtr_dev, ICM_CFG1); in xpsgtr_resume()
841 if (!gtr_dev->saved_icm_cfg0 && !gtr_dev->saved_icm_cfg1) in xpsgtr_resume()
845 if (icm_cfg0 == gtr_dev->saved_icm_cfg0 && in xpsgtr_resume()
846 icm_cfg1 == gtr_dev->saved_icm_cfg1) in xpsgtr_resume()
852 for (i = 0; i < ARRAY_SIZE(gtr_dev->phys); i++) in xpsgtr_resume()
853 gtr_dev->phys[i].skip_phy_init = skip_phy_init; in xpsgtr_resume()
866 static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) in xpsgtr_get_ref_clocks() argument
870 for (refclk = 0; refclk < ARRAY_SIZE(gtr_dev->refclk_sscs); ++refclk) { in xpsgtr_get_ref_clocks()
877 clk = devm_clk_get_optional(gtr_dev->dev, name); in xpsgtr_get_ref_clocks()
880 dev_err(gtr_dev->dev, in xpsgtr_get_ref_clocks()
897 gtr_dev->refclk_sscs[refclk] = &ssc_lookup[i]; in xpsgtr_get_ref_clocks()
903 dev_err(gtr_dev->dev, in xpsgtr_get_ref_clocks()
916 struct xpsgtr_dev *gtr_dev; in xpsgtr_probe() local
921 gtr_dev = devm_kzalloc(&pdev->dev, sizeof(*gtr_dev), GFP_KERNEL); in xpsgtr_probe()
922 if (!gtr_dev) in xpsgtr_probe()
925 gtr_dev->dev = &pdev->dev; in xpsgtr_probe()
926 platform_set_drvdata(pdev, gtr_dev); in xpsgtr_probe()
928 mutex_init(>r_dev->gtr_mutex); in xpsgtr_probe()
931 gtr_dev->tx_term_fix = in xpsgtr_probe()
935 gtr_dev->serdes = devm_platform_ioremap_resource_byname(pdev, "serdes"); in xpsgtr_probe()
936 if (IS_ERR(gtr_dev->serdes)) in xpsgtr_probe()
937 return PTR_ERR(gtr_dev->serdes); in xpsgtr_probe()
939 gtr_dev->siou = devm_platform_ioremap_resource_byname(pdev, "siou"); in xpsgtr_probe()
940 if (IS_ERR(gtr_dev->siou)) in xpsgtr_probe()
941 return PTR_ERR(gtr_dev->siou); in xpsgtr_probe()
943 ret = xpsgtr_get_ref_clocks(gtr_dev); in xpsgtr_probe()
948 for (port = 0; port < ARRAY_SIZE(gtr_dev->phys); ++port) { in xpsgtr_probe()
949 struct xpsgtr_phy *gtr_phy = >r_dev->phys[port]; in xpsgtr_probe()
953 gtr_phy->dev = gtr_dev; in xpsgtr_probe()