Lines Matching refs:clk_div_sel
183 static struct wiz_clk_div_sel clk_div_sel[] = { variable
206 struct wiz_clk_div_sel *clk_div_sel; member
315 struct wiz_clk_div_sel *clk_div_sel; in wiz_regfield_init() local
348 clk_div_sel = &wiz->clk_div_sel[CMN_REFCLK_DIG_DIV]; in wiz_regfield_init()
349 clk_div_sel->field = devm_regmap_field_alloc(dev, regmap, in wiz_regfield_init()
351 if (IS_ERR(clk_div_sel->field)) { in wiz_regfield_init()
353 return PTR_ERR(clk_div_sel->field); in wiz_regfield_init()
357 clk_div_sel = &wiz->clk_div_sel[CMN_REFCLK1_DIG_DIV]; in wiz_regfield_init()
358 clk_div_sel->field = in wiz_regfield_init()
361 if (IS_ERR(clk_div_sel->field)) { in wiz_regfield_init()
363 return PTR_ERR(clk_div_sel->field); in wiz_regfield_init()
621 clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name); in wiz_clock_cleanup()
686 node_name = clk_div_sel[i].node_name; in wiz_clock_init()
694 ret = wiz_div_clk_register(wiz, clk_node, clk_div_sel[i].field, in wiz_clock_init()
695 clk_div_sel[i].table); in wiz_clock_init()
916 wiz->clk_div_sel = clk_div_sel; in wiz_probe()