364 static inline void miphy28lp_set_reset(struct miphy28lp_phy *miphy_phy)  in miphy28lp_set_reset()  argument
366 	void __iomem *base = miphy_phy->base;  in miphy28lp_set_reset()
378 	if (miphy_phy->type == PHY_TYPE_PCIE) {  in miphy28lp_set_reset()
387 static inline void miphy28lp_pll_calibration(struct miphy28lp_phy *miphy_phy,  in miphy28lp_pll_calibration()  argument
390 	void __iomem *base = miphy_phy->base;  in miphy28lp_pll_calibration()
411 	if (miphy_phy->type != PHY_TYPE_SATA)  in miphy28lp_pll_calibration()
416 	if (miphy_phy->type == PHY_TYPE_USB3) {  in miphy28lp_pll_calibration()
429 static inline void miphy28lp_sata_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_sata_config_gen()  argument
431 	void __iomem *base = miphy_phy->base;  in miphy28lp_sata_config_gen()
456 static inline void miphy28lp_pcie_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_pcie_config_gen()  argument
458 	void __iomem *base = miphy_phy->base;  in miphy28lp_pcie_config_gen()
485 static inline int miphy28lp_wait_compensation(struct miphy28lp_phy *miphy_phy)  in miphy28lp_wait_compensation()  argument
492 		val = readb_relaxed(miphy_phy->base + MIPHY_COMP_FSM_6);  in miphy28lp_wait_compensation()
503 static inline int miphy28lp_compensation(struct miphy28lp_phy *miphy_phy,  in miphy28lp_compensation()  argument
506 	void __iomem *base = miphy_phy->base;  in miphy28lp_compensation()
516 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
526 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
527 		return miphy28lp_wait_compensation(miphy_phy);  in miphy28lp_compensation()
532 static inline void miphy28_usb3_miphy_reset(struct miphy28lp_phy *miphy_phy)  in miphy28_usb3_miphy_reset()  argument
534 	void __iomem *base = miphy_phy->base;  in miphy28_usb3_miphy_reset()
560 static void miphy_sata_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_sata_tune_ssc()  argument
562 	void __iomem *base = miphy_phy->base;  in miphy_sata_tune_ssc()
598 static void miphy_pcie_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_pcie_tune_ssc()  argument
600 	void __iomem *base = miphy_phy->base;  in miphy_pcie_tune_ssc()
638 static inline void miphy_tune_tx_impedance(struct miphy28lp_phy *miphy_phy)  in miphy_tune_tx_impedance()  argument
641 	writeb_relaxed(0x02, miphy_phy->base + MIPHY_COMP_POSTP);  in miphy_tune_tx_impedance()
644 static inline int miphy28lp_configure_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_sata()  argument
646 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_sata()
651 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_sata()
654 	miphy28lp_pll_calibration(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
657 	miphy28lp_sata_config_gen(miphy_phy);  in miphy28lp_configure_sata()
668 	err = miphy28lp_compensation(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
672 	if (miphy_phy->px_rx_pol_inv) {  in miphy28lp_configure_sata()
674 		val = readb_relaxed(miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
676 		writeb_relaxed(val, miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
679 	if (miphy_phy->ssc)  in miphy28lp_configure_sata()
680 		miphy_sata_tune_ssc(miphy_phy);  in miphy28lp_configure_sata()
682 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_sata()
683 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_sata()
688 static inline int miphy28lp_configure_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_pcie()  argument
690 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_pcie()
694 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_pcie()
697 	miphy28lp_pll_calibration(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
700 	miphy28lp_pcie_config_gen(miphy_phy);  in miphy28lp_configure_pcie()
711 	err = miphy28lp_compensation(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
715 	if (miphy_phy->ssc)  in miphy28lp_configure_pcie()
716 		miphy_pcie_tune_ssc(miphy_phy);  in miphy28lp_configure_pcie()
718 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_pcie()
719 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_pcie()
725 static inline void miphy28lp_configure_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_usb3()  argument
727 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_usb3()
731 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_usb3()
734 	miphy28lp_pll_calibration(miphy_phy, &usb3_pll_ratio);  in miphy28lp_configure_usb3()
803 	miphy28_usb3_miphy_reset(miphy_phy);  in miphy28lp_configure_usb3()
806 static inline int miphy_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_is_ready()  argument
816 	if (miphy_phy->type == PHY_TYPE_SATA)  in miphy_is_ready()
820 		val = readb_relaxed(miphy_phy->base + MIPHY_STATUS_1);  in miphy_is_ready()
830 static int miphy_osc_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_osc_is_ready()  argument
832 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy_osc_is_ready()
836 	if (!miphy_phy->osc_rdy)  in miphy_osc_is_ready()
839 	if (!miphy_phy->syscfg_reg[SYSCFG_STATUS])  in miphy_osc_is_ready()
844 				miphy_phy->syscfg_reg[SYSCFG_STATUS], &val);  in miphy_osc_is_ready()
888 static int miphy28lp_setup(struct miphy28lp_phy *miphy_phy, u32 miphy_val)  in miphy28lp_setup()  argument
891 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_setup()
893 	if (!miphy_phy->syscfg_reg[SYSCFG_CTRL])  in miphy28lp_setup()
896 	err = reset_control_assert(miphy_phy->miphy_rst);  in miphy28lp_setup()
902 	if (miphy_phy->osc_force_ext)  in miphy28lp_setup()
906 			   miphy_phy->syscfg_reg[SYSCFG_CTRL],  in miphy28lp_setup()
909 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_setup()
915 	return miphy_osc_is_ready(miphy_phy);  in miphy28lp_setup()
918 static int miphy28lp_init_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_sata()  argument
920 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_sata()
923 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_sata()
924 			(!miphy_phy->syscfg_reg[SYSCFG_PCI]) ||  in miphy28lp_init_sata()
925 			(!miphy_phy->base))  in miphy28lp_init_sata()
928 	dev_info(miphy_dev->dev, "sata-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_sata()
931 	sata_conf |= ((miphy_phy->sata_gen - SATA_GEN1) << SATA_SPDMODE);  in miphy28lp_init_sata()
934 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_sata()
937 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_sata()
941 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_sata()
949 	miphy28lp_configure_sata(miphy_phy);  in miphy28lp_init_sata()
951 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_sata()
954 static int miphy28lp_init_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_pcie()  argument
956 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_pcie()
959 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_pcie()
960 			(!miphy_phy->syscfg_reg[SYSCFG_PCI])  in miphy28lp_init_pcie()
961 		|| (!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_pcie()
964 	dev_info(miphy_dev->dev, "pcie-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_pcie()
968 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_pcie()
971 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_pcie()
975 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_pcie()
983 	err = miphy28lp_configure_pcie(miphy_phy);  in miphy28lp_init_pcie()
988 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x104); /* Rise_0 */  in miphy28lp_init_pcie()
989 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x105); /* Rise_1 */  in miphy28lp_init_pcie()
990 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x108); /* Fall_0 */  in miphy28lp_init_pcie()
991 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x109); /* Fall-1 */  in miphy28lp_init_pcie()
992 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x10c); /* Threshold_0 */  in miphy28lp_init_pcie()
993 	writeb_relaxed(0x60, miphy_phy->pipebase + 0x10d); /* Threshold_1 */  in miphy28lp_init_pcie()
996 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_pcie()
999 static int miphy28lp_init_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_usb3()  argument
1001 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_usb3()
1004 	if ((!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_usb3()
1007 	dev_info(miphy_dev->dev, "usb3-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_usb3()
1010 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_SYNC_D_EN);  in miphy28lp_init_usb3()
1017 	miphy28lp_configure_usb3(miphy_phy);  in miphy28lp_init_usb3()
1020 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x23);  in miphy28lp_init_usb3()
1021 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x24);  in miphy28lp_init_usb3()
1022 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x26);  in miphy28lp_init_usb3()
1023 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x27);  in miphy28lp_init_usb3()
1024 	writeb_relaxed(0x18, miphy_phy->pipebase + 0x29);  in miphy28lp_init_usb3()
1025 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x2a);  in miphy28lp_init_usb3()
1028 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x68);  in miphy28lp_init_usb3()
1029 	writeb_relaxed(0x0d, miphy_phy->pipebase + 0x69);  in miphy28lp_init_usb3()
1030 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6a);  in miphy28lp_init_usb3()
1031 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6b);  in miphy28lp_init_usb3()
1032 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6c);  in miphy28lp_init_usb3()
1033 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6d);  in miphy28lp_init_usb3()
1034 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6e);  in miphy28lp_init_usb3()
1035 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6f);  in miphy28lp_init_usb3()
1037 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_usb3()
1042 	struct miphy28lp_phy *miphy_phy = phy_get_drvdata(phy);  in miphy28lp_init()  local
1043 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init()
1048 	switch (miphy_phy->type) {  in miphy28lp_init()
1051 		ret = miphy28lp_init_sata(miphy_phy);  in miphy28lp_init()
1054 		ret = miphy28lp_init_pcie(miphy_phy);  in miphy28lp_init()
1057 		ret = miphy28lp_init_usb3(miphy_phy);  in miphy28lp_init()
1069 static int miphy28lp_get_addr(struct miphy28lp_phy *miphy_phy)  in miphy28lp_get_addr()  argument
1071 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_get_addr()
1072 	struct device_node *phynode = miphy_phy->phy->dev.of_node;  in miphy28lp_get_addr()
1075 	if ((miphy_phy->type != PHY_TYPE_SATA) &&  in miphy28lp_get_addr()
1076 	    (miphy_phy->type != PHY_TYPE_PCIE) &&  in miphy28lp_get_addr()
1077 	    (miphy_phy->type != PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1082 			PHY_TYPE_name[miphy_phy->type - PHY_TYPE_SATA],  in miphy28lp_get_addr()
1083 			&miphy_phy->base);  in miphy28lp_get_addr()
1087 	if ((miphy_phy->type == PHY_TYPE_PCIE) ||  in miphy28lp_get_addr()
1088 	    (miphy_phy->type == PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1090 					     &miphy_phy->pipebase);  in miphy28lp_get_addr()
1102 	struct miphy28lp_phy *miphy_phy = NULL;  in miphy28lp_xlate()  local
1113 			miphy_phy = miphy_dev->phys[index];  in miphy28lp_xlate()
1117 	if (!miphy_phy) {  in miphy28lp_xlate()
1122 	miphy_phy->type = args->args[0];  in miphy28lp_xlate()
1124 	ret = miphy28lp_get_addr(miphy_phy);  in miphy28lp_xlate()
1128 	return miphy_phy->phy;  in miphy28lp_xlate()
1137 				  struct miphy28lp_phy *miphy_phy)  in miphy28lp_probe_resets()  argument
1139 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_probe_resets()
1142 	miphy_phy->miphy_rst =  in miphy28lp_probe_resets()
1145 	if (IS_ERR(miphy_phy->miphy_rst)) {  in miphy28lp_probe_resets()
1148 		return PTR_ERR(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1151 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1161 			      struct miphy28lp_phy *miphy_phy)  in miphy28lp_of_probe()  argument
1166 	miphy_phy->osc_force_ext =  in miphy28lp_of_probe()
1169 	miphy_phy->osc_rdy = of_property_read_bool(np, "st,osc-rdy");  in miphy28lp_of_probe()
1171 	miphy_phy->px_rx_pol_inv =  in miphy28lp_of_probe()
1174 	miphy_phy->ssc = of_property_read_bool(np, "st,ssc-on");  in miphy28lp_of_probe()
1176 	miphy_phy->tx_impedance =  in miphy28lp_of_probe()
1179 	of_property_read_u32(np, "st,sata-gen", &miphy_phy->sata_gen);  in miphy28lp_of_probe()
1180 	if (!miphy_phy->sata_gen)  in miphy28lp_of_probe()
1181 		miphy_phy->sata_gen = SATA_GEN1;  in miphy28lp_of_probe()
1185 			miphy_phy->syscfg_reg[i] = ctrlreg;  in miphy28lp_of_probe()
1222 		struct miphy28lp_phy *miphy_phy;  in miphy28lp_probe()  local
1224 		miphy_phy = devm_kzalloc(&pdev->dev, sizeof(*miphy_phy),  in miphy28lp_probe()
1226 		if (!miphy_phy) {  in miphy28lp_probe()
1231 		miphy_dev->phys[port] = miphy_phy;  in miphy28lp_probe()
1243 		ret = miphy28lp_of_probe(child, miphy_phy);  in miphy28lp_probe()