Lines Matching refs:MIPHY_CONF
65 #define MIPHY_CONF 0x0f macro
417 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_pll_calibration()
438 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_sata_config_gen()
465 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_pcie_config_gen()
551 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
554 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
557 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
579 writeb_relaxed(val, base + MIPHY_CONF); in miphy_sata_tune_ssc()
617 writeb_relaxed(val, base + MIPHY_CONF); in miphy_pcie_tune_ssc()
737 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()
774 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()