Lines Matching full:regmap
16 #include <linux/regmap.h>
332 struct regmap *regmap; member
333 struct regmap *grf;
474 static int rockchip_grf_write(struct regmap *grf, unsigned int reg, in rockchip_grf_write()
534 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c44), in rockchip_hdptx_phy_set_voltage()
540 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c44), in rockchip_hdptx_phy_set_voltage()
547 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c44), in rockchip_hdptx_phy_set_voltage()
553 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c0c), in rockchip_hdptx_phy_set_voltage()
559 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c10), in rockchip_hdptx_phy_set_voltage()
566 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c18), in rockchip_hdptx_phy_set_voltage()
577 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c1c), in rockchip_hdptx_phy_set_voltage()
583 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c6c), in rockchip_hdptx_phy_set_voltage()
586 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c58), in rockchip_hdptx_phy_set_voltage()
589 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c40), in rockchip_hdptx_phy_set_voltage()
621 regmap_update_bits(hdptx->regmap, 0x081c, LANE_EN, in rockchip_hdptx_phy_lane_disable()
627 regmap_update_bits(hdptx->regmap, 0x0020, OVRD_LCPLL_EN | LCPLL_EN, in rockchip_hdptx_phy_lane_disable()
630 regmap_update_bits(hdptx->regmap, 0x00f4, OVRD_ROPLL_EN | ROPLL_EN, in rockchip_hdptx_phy_lane_disable()
643 regmap_update_bits(hdptx->regmap, 0x081c, LANE_EN, in rockchip_hdptx_phy_set_lanes()
672 regmap_update_bits(hdptx->regmap, 0x0254, DP_TX_LINK_BW, in rockchip_hdptx_phy_set_rate()
676 regmap_update_bits(hdptx->regmap, 0x01d0, in rockchip_hdptx_phy_set_rate()
680 regmap_write(hdptx->regmap, 0x01d4, in rockchip_hdptx_phy_set_rate()
682 regmap_update_bits(hdptx->regmap, 0x01d8, in rockchip_hdptx_phy_set_rate()
685 regmap_update_bits(hdptx->regmap, 0x0264, SSC_EN, in rockchip_hdptx_phy_set_rate()
688 regmap_update_bits(hdptx->regmap, 0x01d0, in rockchip_hdptx_phy_set_rate()
692 regmap_write(hdptx->regmap, 0x01d4, in rockchip_hdptx_phy_set_rate()
694 regmap_update_bits(hdptx->regmap, 0x01d8, in rockchip_hdptx_phy_set_rate()
697 regmap_update_bits(hdptx->regmap, 0x0264, SSC_EN, in rockchip_hdptx_phy_set_rate()
701 regmap_update_bits(hdptx->regmap, 0x0020, OVRD_LCPLL_EN | LCPLL_EN, in rockchip_hdptx_phy_set_rate()
704 regmap_update_bits(hdptx->regmap, 0x00f4, OVRD_ROPLL_EN | ROPLL_EN, in rockchip_hdptx_phy_set_rate()
768 regmap_write(hdptx->regmap, 0x0144, FIELD_PREP(ROPLL_PMS_MDIV, 0x87)); in rockchip_hdptx_phy_dp_pll_init()
769 regmap_write(hdptx->regmap, 0x0148, FIELD_PREP(ROPLL_PMS_MDIV, 0x71)); in rockchip_hdptx_phy_dp_pll_init()
770 regmap_write(hdptx->regmap, 0x014c, FIELD_PREP(ROPLL_PMS_MDIV, 0x71)); in rockchip_hdptx_phy_dp_pll_init()
772 regmap_write(hdptx->regmap, 0x0154, in rockchip_hdptx_phy_dp_pll_init()
774 regmap_write(hdptx->regmap, 0x0158, in rockchip_hdptx_phy_dp_pll_init()
776 regmap_write(hdptx->regmap, 0x015c, in rockchip_hdptx_phy_dp_pll_init()
779 regmap_write(hdptx->regmap, 0x0164, in rockchip_hdptx_phy_dp_pll_init()
783 regmap_write(hdptx->regmap, 0x0168, in rockchip_hdptx_phy_dp_pll_init()
786 regmap_update_bits(hdptx->regmap, 0x016c, ROPLL_PMS_SDIV_HBR2, in rockchip_hdptx_phy_dp_pll_init()
789 regmap_update_bits(hdptx->regmap, 0x0178, ANA_ROPLL_SDM_EN, in rockchip_hdptx_phy_dp_pll_init()
791 regmap_update_bits(hdptx->regmap, 0x0178, in rockchip_hdptx_phy_dp_pll_init()
795 regmap_update_bits(hdptx->regmap, 0x0178, ROPLL_SDC_FRACTIONAL_EN_RBR, in rockchip_hdptx_phy_dp_pll_init()
797 regmap_update_bits(hdptx->regmap, 0x0178, ROPLL_SDC_FRACTIONAL_EN_HBR, in rockchip_hdptx_phy_dp_pll_init()
799 regmap_update_bits(hdptx->regmap, 0x0178, ROPLL_SDC_FRACTIONAL_EN_HBR2, in rockchip_hdptx_phy_dp_pll_init()
801 regmap_update_bits(hdptx->regmap, 0x017c, in rockchip_hdptx_phy_dp_pll_init()
806 regmap_write(hdptx->regmap, 0x0180, in rockchip_hdptx_phy_dp_pll_init()
808 regmap_write(hdptx->regmap, 0x0184, in rockchip_hdptx_phy_dp_pll_init()
810 regmap_write(hdptx->regmap, 0x0188, in rockchip_hdptx_phy_dp_pll_init()
813 regmap_update_bits(hdptx->regmap, 0x0190, in rockchip_hdptx_phy_dp_pll_init()
821 regmap_write(hdptx->regmap, 0x0194, in rockchip_hdptx_phy_dp_pll_init()
823 regmap_write(hdptx->regmap, 0x0198, in rockchip_hdptx_phy_dp_pll_init()
825 regmap_write(hdptx->regmap, 0x019c, in rockchip_hdptx_phy_dp_pll_init()
828 regmap_update_bits(hdptx->regmap, 0x01a4, ROPLL_SDC_N_RBR, in rockchip_hdptx_phy_dp_pll_init()
830 regmap_update_bits(hdptx->regmap, 0x01a8, in rockchip_hdptx_phy_dp_pll_init()
835 regmap_write(hdptx->regmap, 0x01b0, in rockchip_hdptx_phy_dp_pll_init()
837 regmap_write(hdptx->regmap, 0x01b4, in rockchip_hdptx_phy_dp_pll_init()
839 regmap_write(hdptx->regmap, 0x01b8, in rockchip_hdptx_phy_dp_pll_init()
842 regmap_write(hdptx->regmap, 0x01c0, in rockchip_hdptx_phy_dp_pll_init()
844 regmap_write(hdptx->regmap, 0x01c4, in rockchip_hdptx_phy_dp_pll_init()
846 regmap_write(hdptx->regmap, 0x01c8, in rockchip_hdptx_phy_dp_pll_init()
849 regmap_update_bits(hdptx->regmap, 0x01d0, in rockchip_hdptx_phy_dp_pll_init()
853 regmap_update_bits(hdptx->regmap, 0x01dc, ANA_ROPLL_SSC_CLK_DIV_SEL, in rockchip_hdptx_phy_dp_pll_init()
856 regmap_update_bits(hdptx->regmap, 0x0118, in rockchip_hdptx_phy_dp_pll_init()
860 regmap_update_bits(hdptx->regmap, 0x011c, in rockchip_hdptx_phy_dp_pll_init()
866 regmap_update_bits(hdptx->regmap, 0x0204, ANA_PLL_CD_TX_SER_RATE_SEL, in rockchip_hdptx_phy_dp_pll_init()
869 regmap_update_bits(hdptx->regmap, 0x025c, DIG_CLK_SEL, in rockchip_hdptx_phy_dp_pll_init()
871 regmap_update_bits(hdptx->regmap, 0x021c, ANA_PLL_TX_HS_CLK_EN, in rockchip_hdptx_phy_dp_pll_init()
873 regmap_update_bits(hdptx->regmap, 0x0204, in rockchip_hdptx_phy_dp_pll_init()
877 regmap_update_bits(hdptx->regmap, 0x0264, CMN_ROPLL_ALONE_MODE, in rockchip_hdptx_phy_dp_pll_init()
879 regmap_update_bits(hdptx->regmap, 0x0208, ANA_PLL_CD_VREG_GAIN_CTRL, in rockchip_hdptx_phy_dp_pll_init()
881 regmap_update_bits(hdptx->regmap, 0x00f0, ANA_LCPLL_RESERVED7, in rockchip_hdptx_phy_dp_pll_init()
883 regmap_update_bits(hdptx->regmap, 0x020c, ANA_PLL_CD_VREG_ICTRL, in rockchip_hdptx_phy_dp_pll_init()
885 regmap_update_bits(hdptx->regmap, 0x0214, ANA_PLL_SYNC_LOSS_DET_MODE, in rockchip_hdptx_phy_dp_pll_init()
887 regmap_update_bits(hdptx->regmap, 0x0210, PLL_LCRO_CLK_SEL, in rockchip_hdptx_phy_dp_pll_init()
889 regmap_update_bits(hdptx->regmap, 0x0268, HS_SPEED_SEL, in rockchip_hdptx_phy_dp_pll_init()
891 regmap_update_bits(hdptx->regmap, 0x026c, LS_SPEED_SEL, in rockchip_hdptx_phy_dp_pll_init()
900 regmap_update_bits(hdptx->regmap, 0x0414, ANA_SB_TX_HLVL_PROG, in rockchip_hdptx_phy_dp_aux_init()
902 regmap_update_bits(hdptx->regmap, 0x0418, ANA_SB_TX_LLVL_PROG, in rockchip_hdptx_phy_dp_aux_init()
905 regmap_update_bits(hdptx->regmap, 0x044c, in rockchip_hdptx_phy_dp_aux_init()
909 regmap_update_bits(hdptx->regmap, 0x0450, in rockchip_hdptx_phy_dp_aux_init()
913 regmap_update_bits(hdptx->regmap, 0x0454, in rockchip_hdptx_phy_dp_aux_init()
917 regmap_update_bits(hdptx->regmap, 0x0458, in rockchip_hdptx_phy_dp_aux_init()
920 regmap_update_bits(hdptx->regmap, 0x045c, in rockchip_hdptx_phy_dp_aux_init()
923 regmap_update_bits(hdptx->regmap, 0x0460, in rockchip_hdptx_phy_dp_aux_init()
926 regmap_update_bits(hdptx->regmap, 0x0468, SB_TG_CNT_RUN_NO_7_0, in rockchip_hdptx_phy_dp_aux_init()
928 regmap_update_bits(hdptx->regmap, 0x046c, in rockchip_hdptx_phy_dp_aux_init()
932 regmap_update_bits(hdptx->regmap, 0x0470, SB_AFC_STB_NUM, in rockchip_hdptx_phy_dp_aux_init()
934 regmap_update_bits(hdptx->regmap, 0x0474, SB_TG_OSC_CNT_MIN, in rockchip_hdptx_phy_dp_aux_init()
936 regmap_update_bits(hdptx->regmap, 0x0478, SB_TG_OSC_CNT_MAX, in rockchip_hdptx_phy_dp_aux_init()
938 regmap_update_bits(hdptx->regmap, 0x047c, SB_PWM_AFC_CTRL, in rockchip_hdptx_phy_dp_aux_init()
940 regmap_update_bits(hdptx->regmap, 0x0434, ANA_SB_DMRX_LPBK_DATA, in rockchip_hdptx_phy_dp_aux_init()
942 regmap_update_bits(hdptx->regmap, 0x0440, in rockchip_hdptx_phy_dp_aux_init()
946 regmap_update_bits(hdptx->regmap, 0x043c, ANA_SB_VREG_GAIN_CTRL, in rockchip_hdptx_phy_dp_aux_init()
948 regmap_update_bits(hdptx->regmap, 0x0408, ANA_SB_RXTERM_OFFSP, in rockchip_hdptx_phy_dp_aux_init()
950 regmap_update_bits(hdptx->regmap, 0x040c, ANA_SB_RXTERM_OFFSN, in rockchip_hdptx_phy_dp_aux_init()
952 regmap_update_bits(hdptx->regmap, 0x047c, SB_RCAL_RSTN, in rockchip_hdptx_phy_dp_aux_init()
954 regmap_update_bits(hdptx->regmap, 0x0410, SB_AUX_EN, in rockchip_hdptx_phy_dp_aux_init()
956 regmap_update_bits(hdptx->regmap, 0x0480, SB_AUX_EN_IN, in rockchip_hdptx_phy_dp_aux_init()
958 regmap_update_bits(hdptx->regmap, 0x040c, OVRD_SB_RX_RESCAL_DONE, in rockchip_hdptx_phy_dp_aux_init()
960 regmap_update_bits(hdptx->regmap, 0x0410, OVRD_SB_EN, in rockchip_hdptx_phy_dp_aux_init()
962 regmap_update_bits(hdptx->regmap, 0x0408, OVRD_SB_RXTERM_EN, in rockchip_hdptx_phy_dp_aux_init()
964 regmap_update_bits(hdptx->regmap, 0x043c, OVRD_SB_VREG_EN, in rockchip_hdptx_phy_dp_aux_init()
966 regmap_update_bits(hdptx->regmap, 0x0410, OVRD_SB_AUX_EN, in rockchip_hdptx_phy_dp_aux_init()
980 regmap_update_bits(hdptx->regmap, 0x040c, SB_RX_RESCAL_DONE, in rockchip_hdptx_phy_dp_aux_init()
983 regmap_update_bits(hdptx->regmap, 0x0410, SB_EN, in rockchip_hdptx_phy_dp_aux_init()
986 regmap_update_bits(hdptx->regmap, 0x0408, SB_RXRERM_EN, in rockchip_hdptx_phy_dp_aux_init()
989 regmap_update_bits(hdptx->regmap, 0x043c, SB_VREG_EN, in rockchip_hdptx_phy_dp_aux_init()
992 regmap_update_bits(hdptx->regmap, 0x0410, SB_AUX_EN, in rockchip_hdptx_phy_dp_aux_init()
1020 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c04), in rockchip_hdptx_phy_reset()
1061 regmap_update_bits(hdptx->regmap, LANE_REG(lane, 0x0c78), in rockchip_hdptx_phy_power_on()
1071 regmap_update_bits(hdptx->regmap, 0x0800, PROTOCOL_SEL, in rockchip_hdptx_phy_power_on()
1073 regmap_update_bits(hdptx->regmap, 0x0818, DATA_BUS_WIDTH, in rockchip_hdptx_phy_power_on()
1075 regmap_update_bits(hdptx->regmap, 0x0818, BUS_WIDTH_SEL, in rockchip_hdptx_phy_power_on()
1085 regmap_update_bits(hdptx->regmap, 0x0800, PROTOCOL_SEL, in rockchip_hdptx_phy_power_on()
1158 hdptx->regmap = devm_regmap_init_mmio(dev, regs, in rockchip_hdptx_phy_probe()
1160 if (IS_ERR(hdptx->regmap)) in rockchip_hdptx_phy_probe()
1161 return dev_err_probe(dev, PTR_ERR(hdptx->regmap), in rockchip_hdptx_phy_probe()
1162 "failed to create regmap\n"); in rockchip_hdptx_phy_probe()
1194 "failed to get grf regmap\n"); in rockchip_hdptx_phy_probe()