Lines Matching +full:0 +full:x77
30 #define GRF_HDPTX_CON0 0x00
35 #define GRF_HDPTX_STATUS 0x80
39 #define HDPTX_O_SB_RDY BIT(0)
41 #define CMN_REG0000 0x0000
42 #define CMN_REG0001 0x0004
43 #define CMN_REG0002 0x0008
44 #define CMN_REG0003 0x000C
45 #define CMN_REG0004 0x0010
46 #define CMN_REG0005 0x0014
47 #define CMN_REG0006 0x0018
48 #define CMN_REG0007 0x001C
49 #define CMN_REG0008 0x0020
54 #define CMN_REG0009 0x0024
55 #define CMN_REG000A 0x0028
56 #define CMN_REG000B 0x002C
57 #define CMN_REG000C 0x0030
58 #define CMN_REG000D 0x0034
59 #define CMN_REG000E 0x0038
60 #define CMN_REG000F 0x003C
61 #define CMN_REG0010 0x0040
62 #define CMN_REG0011 0x0044
63 #define CMN_REG0012 0x0048
64 #define CMN_REG0013 0x004C
65 #define CMN_REG0014 0x0050
66 #define CMN_REG0015 0x0054
67 #define CMN_REG0016 0x0058
68 #define CMN_REG0017 0x005C
69 #define CMN_REG0018 0x0060
70 #define CMN_REG0019 0x0064
71 #define CMN_REG001A 0x0068
72 #define CMN_REG001B 0x006C
73 #define CMN_REG001C 0x0070
74 #define CMN_REG001D 0x0074
75 #define CMN_REG001E 0x0078
78 #define LCPLL_100M_CLK_EN_MASK BIT(0)
79 #define LCPLL_100M_CLK_EN(x) UPDATE(x, 0, 0)
80 #define CMN_REG001F 0x007C
81 #define CMN_REG0020 0x0080
82 #define CMN_REG0021 0x0084
83 #define CMN_REG0022 0x0088
84 #define CMN_REG0023 0x008C
85 #define CMN_REG0024 0x0090
86 #define CMN_REG0025 0x0094
88 #define CMN_REG0026 0x0098
89 #define CMN_REG0027 0x009C
90 #define CMN_REG0028 0x00A0
92 #define LCPLL_SDC_FRAC_RSTN BIT(0)
93 #define CMN_REG0029 0x00A4
94 #define CMN_REG002A 0x00A8
95 #define CMN_REG002B 0x00AC
96 #define CMN_REG002C 0x00B0
97 #define CMN_REG002D 0x00B4
100 #define CMN_REG002E 0x00B8
101 #define LCPLL_SDC_NUMBERATOR_MASK GENMASK(5, 0)
102 #define LCPLL_SDC_NUMBERATOR(x) UPDATE(x, 5, 0)
103 #define CMN_REG002F 0x00BC
106 #define LCPLL_SDC_NDIV_RSTN BIT(0)
107 #define CMN_REG0030 0x00C0
108 #define CMN_REG0031 0x00C4
109 #define CMN_REG0032 0x00C8
110 #define CMN_REG0033 0x00CC
111 #define CMN_REG0034 0x00D0
112 #define CMN_REG0035 0x00D4
113 #define CMN_REG0036 0x00D8
114 #define CMN_REG0037 0x00DC
115 #define CMN_REG0038 0x00E0
116 #define CMN_REG0039 0x00E4
117 #define CMN_REG003A 0x00E8
118 #define CMN_REG003B 0x00EC
119 #define CMN_REG003C 0x00F0
120 #define CMN_REG003D 0x00F4
122 #define CMN_REG003E 0x00F8
123 #define CMN_REG003F 0x00FC
124 #define CMN_REG0040 0x0100
125 #define CMN_REG0041 0x0104
126 #define CMN_REG0042 0x0108
127 #define CMN_REG0043 0x010C
128 #define CMN_REG0044 0x0110
129 #define CMN_REG0045 0x0114
130 #define CMN_REG0046 0x0118
131 #define CMN_REG0047 0x011C
132 #define CMN_REG0048 0x0120
133 #define CMN_REG0049 0x0124
134 #define CMN_REG004A 0x0128
135 #define CMN_REG004B 0x012C
136 #define CMN_REG004C 0x0130
137 #define CMN_REG004D 0x0134
138 #define CMN_REG004E 0x0138
140 #define CMN_REG004F 0x013C
141 #define CMN_REG0050 0x0140
142 #define CMN_REG0051 0x0144
143 #define CMN_REG0052 0x0148
144 #define CMN_REG0053 0x014C
145 #define CMN_REG0054 0x0150
146 #define CMN_REG0055 0x0154
147 #define CMN_REG0056 0x0158
148 #define CMN_REG0057 0x015C
149 #define CMN_REG0058 0x0160
150 #define CMN_REG0059 0x0164
151 #define CMN_REG005A 0x0168
152 #define CMN_REG005B 0x016C
153 #define CMN_REG005C 0x0170
155 #define CMN_REG005D 0x0174
156 #define CMN_REG005E 0x0178
162 #define ROPLL_SDM_FRAC_EN_HBR3 BIT(0)
163 #define CMN_REG005F 0x017C
164 #define CMN_REG0060 0x0180
165 #define CMN_REG0061 0x0184
166 #define CMN_REG0062 0x0188
167 #define CMN_REG0063 0x018C
168 #define CMN_REG0064 0x0190
171 #define CMN_REG0065 0x0194
172 #define CMN_REG0066 0x0198
173 #define CMN_REG0067 0x019C
174 #define CMN_REG0068 0x01A0
175 #define CMN_REG0069 0x01A4
176 #define ROPLL_SDC_N_RBR_MASK GENMASK(2, 0)
177 #define ROPLL_SDC_N_RBR(x) UPDATE(x, 2, 0)
178 #define CMN_REG006A 0x01A8
179 #define CMN_REG006B 0x01AC
180 #define CMN_REG006C 0x01B0
181 #define CMN_REG006D 0x01B4
182 #define CMN_REG006E 0x01B8
183 #define CMN_REG006F 0x01BC
184 #define CMN_REG0070 0x01C0
185 #define CMN_REG0071 0x01C4
186 #define CMN_REG0072 0x01C8
187 #define CMN_REG0073 0x01CC
188 #define CMN_REG0074 0x01D0
190 #define ROPLL_SSC_EN BIT(0)
191 #define CMN_REG0075 0x01D4
192 #define CMN_REG0076 0x01D8
193 #define CMN_REG0077 0x01DC
194 #define CMN_REG0078 0x01E0
195 #define CMN_REG0079 0x01E4
196 #define CMN_REG007A 0x01E8
197 #define CMN_REG007B 0x01EC
198 #define CMN_REG007C 0x01F0
199 #define CMN_REG007D 0x01F4
200 #define CMN_REG007E 0x01F8
201 #define CMN_REG007F 0x01FC
202 #define CMN_REG0080 0x0200
203 #define CMN_REG0081 0x0204
205 #define PLL_CD_HSCLK_EAST_EN BIT(0)
206 #define CMN_REG0082 0x0208
207 #define CMN_REG0083 0x020C
208 #define CMN_REG0084 0x0210
209 #define CMN_REG0085 0x0214
210 #define CMN_REG0086 0x0218
215 #define PLL_PCG_CLK_EN BIT(0)
216 #define CMN_REG0087 0x021C
219 #define CMN_REG0088 0x0220
220 #define CMN_REG0089 0x0224
222 #define CMN_REG008A 0x0228
223 #define CMN_REG008B 0x022C
224 #define CMN_REG008C 0x0230
225 #define CMN_REG008D 0x0234
226 #define CMN_REG008E 0x0238
227 #define CMN_REG008F 0x023C
228 #define CMN_REG0090 0x0240
229 #define CMN_REG0091 0x0244
230 #define CMN_REG0092 0x0248
231 #define CMN_REG0093 0x024C
232 #define CMN_REG0094 0x0250
233 #define CMN_REG0095 0x0254
234 #define CMN_REG0096 0x0258
235 #define CMN_REG0097 0x025C
238 #define LCPLL_REF 0
239 #define CMN_REG0098 0x0260
240 #define CMN_REG0099 0x0264
243 #define CMN_REG009A 0x0268
244 #define HS_SPEED_SEL BIT(0)
245 #define DIV_10_CLOCK BIT(0)
246 #define CMN_REG009B 0x026C
249 #define LINK_SYMBOL_CLOCK1_2 0
250 #define CMN_REG009C 0x0270
251 #define CMN_REG009D 0x0274
252 #define CMN_REG009E 0x0278
253 #define CMN_REG009F 0x027C
254 #define CMN_REG00A0 0x0280
255 #define CMN_REG00A1 0x0284
256 #define CMN_REG00A2 0x0288
257 #define CMN_REG00A3 0x028C
258 #define CMN_REG00AD 0x0290
259 #define CMN_REG00A5 0x0294
260 #define CMN_REG00A6 0x0298
261 #define CMN_REG00A7 0x029C
262 #define SB_REG0100 0x0400
263 #define SB_REG0101 0x0404
264 #define SB_REG0102 0x0408
269 #define ANA_SB_RXTERM_OFFSP_MASK GENMASK(3, 0)
270 #define ANA_SB_RXTERM_OFFSP(x) UPDATE(x, 3, 0)
271 #define SB_REG0103 0x040C
276 #define SB_RX_RESCAL_DONE_MASK BIT(0)
277 #define SB_RX_RESCAL_DONE(x) UPDATE(x, 0, 0)
278 #define SB_REG0104 0x0410
283 #define SB_REG0105 0x0414
288 #define ANA_SB_TX_HLVL_PROG_MASK GENMASK(2, 0)
289 #define ANA_SB_TX_HLVL_PROG(x) UPDATE(x, 2, 0)
290 #define SB_REG0106 0x0418
293 #define SB_REG0107 0x041C
294 #define SB_REG0108 0x0420
295 #define SB_REG0109 0x0424
296 #define ANA_SB_DMRX_AFC_DIV_RATIO_MASK GENMASK(2, 0)
297 #define ANA_SB_DMRX_AFC_DIV_RATIO(x) UPDATE(x, 2, 0)
298 #define SB_REG010A 0x0428
299 #define SB_REG010B 0x042C
300 #define SB_REG010C 0x0430
301 #define SB_REG010D 0x0434
302 #define SB_REG010E 0x0438
303 #define SB_REG010F 0x043C
312 #define ANA_SB_VREG_GAIN_CTRL_MASK GENMASK(3, 0)
313 #define ANA_SB_VREG_GAIN_CTRL(x) UPDATE(x, 3, 0)
314 #define SB_REG0110 0x0440
315 #define ANA_SB_VREG_REF_SEL_MASK BIT(0)
316 #define ANA_SB_VREG_REF_SEL(x) UPDATE(x, 0, 0)
317 #define SB_REG0111 0x0444
318 #define SB_REG0112 0x0448
319 #define SB_REG0113 0x044C
322 #define SB_RX_RTERM_CTRL_MASK GENMASK(3, 0)
323 #define SB_RX_RTERM_CTRL(x) UPDATE(x, 3, 0)
324 #define SB_REG0114 0x0450
327 #define SB_TG_RXTERM_EN_DELAY_TIME_MASK GENMASK(2, 0)
328 #define SB_TG_RXTERM_EN_DELAY_TIME(x) UPDATE(x, 2, 0)
329 #define SB_REG0115 0x0454
332 #define SB_TG_OSC_EN_DELAY_TIME_MASK GENMASK(2, 0)
333 #define SB_TG_OSC_EN_DELAY_TIME(x) UPDATE(x, 2, 0)
334 #define SB_REG0116 0x0458
337 #define SB_REG0117 0x045C
338 #define FAST_PULSE_TIME_MASK GENMASK(3, 0)
339 #define FAST_PULSE_TIME(x) UPDATE(x, 3, 0)
340 #define SB_REG0118 0x0460
341 #define SB_REG0119 0x0464
342 #define SB_REG011A 0x0468
343 #define SB_REG011B 0x046C
346 #define SB_AFC_TOL_MASK GENMASK(3, 0)
347 #define SB_AFC_TOL(x) UPDATE(x, 3, 0)
348 #define SB_REG011C 0x0470
349 #define SB_REG011D 0x0474
350 #define SB_REG011E 0x0478
351 #define SB_REG011F 0x047C
356 #define SB_REG0120 0x0480
361 #define SB_REG0121 0x0484
362 #define SB_REG0122 0x0488
363 #define SB_REG0123 0x048C
368 #define SB_REG0124 0x0490
369 #define SB_REG0125 0x0494
370 #define SB_REG0126 0x0498
371 #define SB_REG0127 0x049C
372 #define SB_REG0128 0x04A0
373 #define SB_REG0129 0x04AD
374 #define LNTOP_REG0200 0x0800
378 #define LNTOP_REG0201 0x0804
379 #define LNTOP_REG0202 0x0808
380 #define LNTOP_REG0203 0x080C
381 #define LNTOP_REG0204 0x0810
382 #define LNTOP_REG0205 0x0814
383 #define LNTOP_REG0206 0x0818
384 #define DATA_BUS_WIDTH (0x3 << 1)
385 #define WIDTH_40BIT (0x3 << 1)
386 #define WIDTH_36BIT (0x2 << 1)
387 #define DATA_BUS_SEL BIT(0)
388 #define DATA_BUS_36_40 BIT(0)
389 #define LNTOP_REG0207 0x081C
390 #define LANE_EN 0xf
391 #define ALL_LANE_EN 0xf
392 #define LNTOP_REG0208 0x0820
393 #define LNTOP_REG0209 0x0824
394 #define LNTOP_REG020A 0x0828
395 #define LNTOP_REG020B 0x082C
396 #define LNTOP_REG020C 0x0830
397 #define LNTOP_REG020D 0x0834
398 #define LNTOP_REG020E 0x0838
399 #define LNTOP_REG020F 0x083C
400 #define LNTOP_REG0210 0x0840
401 #define LNTOP_REG0211 0x0844
402 #define LNTOP_REG0212 0x0848
403 #define LNTOP_REG0213 0x084C
404 #define LNTOP_REG0214 0x0850
405 #define LNTOP_REG0215 0x0854
406 #define LNTOP_REG0216 0x0858
407 #define LNTOP_REG0217 0x085C
408 #define LNTOP_REG0218 0x0860
409 #define LNTOP_REG0219 0x0864
410 #define LNTOP_REG021A 0x0868
411 #define LNTOP_REG021B 0x086C
412 #define LNTOP_REG021C 0x0870
413 #define LNTOP_REG021D 0x0874
414 #define LNTOP_REG021E 0x0878
415 #define LNTOP_REG021F 0x087C
416 #define LNTOP_REG0220 0x0880
417 #define LNTOP_REG0221 0x0884
418 #define LNTOP_REG0222 0x0888
419 #define LNTOP_REG0223 0x088C
420 #define LNTOP_REG0224 0x0890
421 #define LNTOP_REG0225 0x0894
422 #define LNTOP_REG0226 0x0898
423 #define LNTOP_REG0227 0x089C
424 #define LNTOP_REG0228 0x08A0
425 #define LNTOP_REG0229 0x08A4
426 #define LANE_REG0300 0x0C00
427 #define LANE_REG0301 0x0C04
428 #define LANE_REG0302 0x0C08
429 #define LANE_REG0303 0x0C0C
430 #define LANE_REG0304 0x0C10
431 #define LANE_REG0305 0x0C14
432 #define LANE_REG0306 0x0C18
433 #define LANE_REG0307 0x0C1C
434 #define LANE_REG0308 0x0C20
435 #define LANE_REG0309 0x0C24
436 #define LANE_REG030A 0x0C28
437 #define LANE_REG030B 0x0C2C
438 #define LANE_REG030C 0x0C30
439 #define LANE_REG030D 0x0C34
440 #define LANE_REG030E 0x0C38
441 #define LANE_REG030F 0x0C3C
442 #define LANE_REG0310 0x0C40
443 #define LANE_REG0311 0x0C44
444 #define LANE_REG0312 0x0C48
449 #define LANE_REG0313 0x0C4C
450 #define LANE_REG0314 0x0C50
451 #define LANE_REG0315 0x0C54
452 #define LANE_REG0316 0x0C58
453 #define LANE_REG0317 0x0C5C
454 #define LANE_REG0318 0x0C60
455 #define LANE_REG0319 0x0C64
456 #define LANE_REG031A 0x0C68
457 #define LANE_REG031B 0x0C6C
458 #define LANE_REG031C 0x0C70
459 #define LANE_REG031D 0x0C74
460 #define LANE_REG031E 0x0C78
461 #define LANE_REG031F 0x0C7C
462 #define LANE_REG0320 0x0C80
463 #define LANE_REG0321 0x0C84
464 #define LANE_REG0322 0x0C88
465 #define LANE_REG0323 0x0C8C
466 #define LANE_REG0324 0x0C90
467 #define LANE_REG0325 0x0C94
468 #define LANE_REG0326 0x0C98
469 #define LANE_REG0327 0x0C9C
470 #define LANE_REG0328 0x0CA0
471 #define LANE_REG0329 0x0CA4
472 #define LANE_REG032A 0x0CA8
473 #define LANE_REG032B 0x0CAC
474 #define LANE_REG032C 0x0CB0
475 #define LANE_REG032D 0x0CB4
476 #define LANE_REG0400 0x1000
477 #define LANE_REG0401 0x1004
478 #define LANE_REG0402 0x1008
479 #define LANE_REG0403 0x100C
480 #define LANE_REG0404 0x1010
481 #define LANE_REG0405 0x1014
482 #define LANE_REG0406 0x1018
483 #define LANE_REG0407 0x101C
484 #define LANE_REG0408 0x1020
485 #define LANE_REG0409 0x1024
486 #define LANE_REG040A 0x1028
487 #define LANE_REG040B 0x102C
488 #define LANE_REG040C 0x1030
489 #define LANE_REG040D 0x1034
490 #define LANE_REG040E 0x1038
491 #define LANE_REG040F 0x103C
492 #define LANE_REG0410 0x1040
493 #define LANE_REG0411 0x1044
494 #define LANE_REG0412 0x1048
499 #define LANE_REG0413 0x104C
500 #define LANE_REG0414 0x1050
501 #define LANE_REG0415 0x1054
502 #define LANE_REG0416 0x1058
503 #define LANE_REG0417 0x105C
504 #define LANE_REG0418 0x1060
505 #define LANE_REG0419 0x1064
506 #define LANE_REG041A 0x1068
507 #define LANE_REG041B 0x106C
508 #define LANE_REG041C 0x1070
509 #define LANE_REG041D 0x1074
510 #define LANE_REG041E 0x1078
511 #define LANE_REG041F 0x107C
512 #define LANE_REG0420 0x1080
513 #define LANE_REG0421 0x1084
514 #define LANE_REG0422 0x1088
515 #define LANE_REG0423 0x108C
516 #define LANE_REG0424 0x1090
517 #define LANE_REG0425 0x1094
518 #define LANE_REG0426 0x1098
519 #define LANE_REG0427 0x109C
520 #define LANE_REG0428 0x10A0
521 #define LANE_REG0429 0x10A4
522 #define LANE_REG042A 0x10A8
523 #define LANE_REG042B 0x10AC
524 #define LANE_REG042C 0x10B0
525 #define LANE_REG042D 0x10B4
526 #define LANE_REG0500 0x1400
527 #define LANE_REG0501 0x1404
528 #define LANE_REG0502 0x1408
529 #define LANE_REG0503 0x140C
530 #define LANE_REG0504 0x1410
531 #define LANE_REG0505 0x1414
532 #define LANE_REG0506 0x1418
533 #define LANE_REG0507 0x141C
534 #define LANE_REG0508 0x1420
535 #define LANE_REG0509 0x1424
536 #define LANE_REG050A 0x1428
537 #define LANE_REG050B 0x142C
538 #define LANE_REG050C 0x1430
539 #define LANE_REG050D 0x1434
540 #define LANE_REG050E 0x1438
541 #define LANE_REG050F 0x143C
542 #define LANE_REG0510 0x1440
543 #define LANE_REG0511 0x1444
544 #define LANE_REG0512 0x1448
549 #define LANE_REG0513 0x144C
550 #define LANE_REG0514 0x1450
551 #define LANE_REG0515 0x1454
552 #define LANE_REG0516 0x1458
553 #define LANE_REG0517 0x145C
554 #define LANE_REG0518 0x1460
555 #define LANE_REG0519 0x1464
556 #define LANE_REG051A 0x1468
557 #define LANE_REG051B 0x146C
558 #define LANE_REG051C 0x1470
559 #define LANE_REG051D 0x1474
560 #define LANE_REG051E 0x1478
561 #define LANE_REG051F 0x147C
562 #define LANE_REG0520 0x1480
563 #define LANE_REG0521 0x1484
564 #define LANE_REG0522 0x1488
565 #define LANE_REG0523 0x148C
566 #define LANE_REG0524 0x1490
567 #define LANE_REG0525 0x1494
568 #define LANE_REG0526 0x1498
569 #define LANE_REG0527 0x149C
570 #define LANE_REG0528 0x14A0
571 #define LANE_REG0529 0x14AD
572 #define LANE_REG052A 0x14A8
573 #define LANE_REG052B 0x14AC
574 #define LANE_REG052C 0x14B0
575 #define LANE_REG052D 0x14B4
576 #define LANE_REG0600 0x1800
577 #define LANE_REG0601 0x1804
578 #define LANE_REG0602 0x1808
579 #define LANE_REG0603 0x180C
580 #define LANE_REG0604 0x1810
581 #define LANE_REG0605 0x1814
582 #define LANE_REG0606 0x1818
583 #define LANE_REG0607 0x181C
584 #define LANE_REG0608 0x1820
585 #define LANE_REG0609 0x1824
586 #define LANE_REG060A 0x1828
587 #define LANE_REG060B 0x182C
588 #define LANE_REG060C 0x1830
589 #define LANE_REG060D 0x1834
590 #define LANE_REG060E 0x1838
591 #define LANE_REG060F 0x183C
592 #define LANE_REG0610 0x1840
593 #define LANE_REG0611 0x1844
594 #define LANE_REG0612 0x1848
599 #define LANE_REG0613 0x184C
600 #define LANE_REG0614 0x1850
601 #define LANE_REG0615 0x1854
602 #define LANE_REG0616 0x1858
603 #define LANE_REG0617 0x185C
604 #define LANE_REG0618 0x1860
605 #define LANE_REG0619 0x1864
606 #define LANE_REG061A 0x1868
607 #define LANE_REG061B 0x186C
608 #define LANE_REG061C 0x1870
609 #define LANE_REG061D 0x1874
610 #define LANE_REG061E 0x1878
611 #define LANE_REG061F 0x187C
612 #define LANE_REG0620 0x1880
613 #define LANE_REG0621 0x1884
614 #define LANE_REG0622 0x1888
615 #define LANE_REG0623 0x188C
616 #define LANE_REG0624 0x1890
617 #define LANE_REG0625 0x1894
618 #define LANE_REG0626 0x1898
619 #define LANE_REG0627 0x189C
620 #define LANE_REG0628 0x18A0
621 #define LANE_REG0629 0x18A4
622 #define LANE_REG062A 0x18A8
623 #define LANE_REG062B 0x18AC
624 #define LANE_REG062C 0x18B0
625 #define LANE_REG062D 0x18B4
628 #define DATA_RATE_MASK 0xFFFFFFF
735 { 48000000, 1, 0, 0, 0x7d, 0x7d, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
736 0, 0x13, 0x18, 1, 0, 0x20, 0x0c, 1, 0,
738 { 40000000, 1, 1, 0, 0x68, 0x68, 1, 1, 0, 0, 0, 1, 1, 1, 1, 9, 0, 1, 1,
739 0, 2, 3, 1, 0, 0x20, 0x0c, 1, 0,
741 { 24000000, 1, 0, 0, 0x7d, 0x7d, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
742 0, 0x13, 0x18, 1, 0, 0x20, 0x0c, 1, 0,
744 { 18000000, 1, 0, 0, 0x7d, 0x7d, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
745 0, 0x13, 0x18, 1, 0, 0x20, 0x0c, 1, 0,
747 { 9000000, 1, 0, 0, 0x7d, 0x7d, 1, 1, 3, 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
748 0, 0x13, 0x18, 1, 0, 0x20, 0x0c, 1, 0,
750 { ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
751 0, 0, 0, 0, 0, 0,
756 { 24000000, 0x19, 0x19, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
757 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
759 { 18000000, 0x7d, 0x7d, 1, 1, 0, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
760 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
762 { 9000000, 0x7d, 0x7d, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
763 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
765 { ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
766 0, 0, 0, 0,
771 { 5940000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
772 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
774 { 3712500, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
775 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
777 { 2970000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
778 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
780 { 1620000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
781 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
783 { 1856250, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
784 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
787 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
789 { 1485000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
790 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
793 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
796 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
798 { 1065000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1,
799 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
801 { 1080000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
802 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
805 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
807 { 835000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0,
808 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
810 { 928125, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
811 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
813 { 742500, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
814 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
816 { 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1,
817 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
819 { 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, 1,
820 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
822 { 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
823 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
825 { 270000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
826 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
828 { 251750, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1,
829 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
831 { ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
832 0, 0, 0, 0,
840 case 0x0000 ... 0x029c: in rockchip_hdptx_phy_is_accissible_reg()
841 case 0x0400 ... 0x04a4: in rockchip_hdptx_phy_is_accissible_reg()
842 case 0x0800 ... 0x08a4: in rockchip_hdptx_phy_is_accissible_reg()
843 case 0x0c00 ... 0x0cb4: in rockchip_hdptx_phy_is_accissible_reg()
844 case 0x1000 ... 0x10b4: in rockchip_hdptx_phy_is_accissible_reg()
845 case 0x1400 ... 0x14b4: in rockchip_hdptx_phy_is_accissible_reg()
846 case 0x1800 ... 0x18b4: in rockchip_hdptx_phy_is_accissible_reg()
858 .max_register = 0x18b4,
906 u32 val = 0; in hdptx_pre_power_up()
922 u32 val = 0; in hdptx_post_enable_lane()
933 hdptx_write(hdptx, LNTOP_REG0207, 0x07); in hdptx_post_enable_lane()
935 hdptx_write(hdptx, LNTOP_REG0207, 0x0f); in hdptx_post_enable_lane()
937 for (i = 0; i < 50; i++) { in hdptx_post_enable_lane()
952 return 0; in hdptx_post_enable_lane()
957 u32 val = 0; in hdptx_post_enable_pll()
971 for (i = 0; i < 20; i++) { in hdptx_post_enable_pll()
986 return 0; in hdptx_post_enable_pll()
1002 hdptx_write(hdptx, LANE_REG0300, 0x82); in hdptx_phy_disable()
1003 hdptx_write(hdptx, SB_REG010F, 0xc1); in hdptx_phy_disable()
1004 hdptx_write(hdptx, SB_REG0110, 0x1); in hdptx_phy_disable()
1005 hdptx_write(hdptx, LANE_REG0301, 0x80); in hdptx_phy_disable()
1006 hdptx_write(hdptx, LANE_REG0401, 0x80); in hdptx_phy_disable()
1007 hdptx_write(hdptx, LANE_REG0501, 0x80); in hdptx_phy_disable()
1008 hdptx_write(hdptx, LANE_REG0601, 0x80); in hdptx_phy_disable()
1022 hdptx_write(hdptx, SB_REG011C, 0x04); in hdptx_earc_config()
1025 hdptx_write(hdptx, SB_REG0109, 0x05); in hdptx_earc_config()
1031 SB_PWM_AFC_CTRL(0xc) | SB_RCAL_RSTN(1)); in hdptx_earc_config()
1040 hdptx_write(hdptx, SB_REG011A, 0x03); in hdptx_earc_config()
1041 hdptx_write(hdptx, SB_REG0118, 0x0a); in hdptx_earc_config()
1042 hdptx_write(hdptx, SB_REG011E, 0x6a); in hdptx_earc_config()
1043 hdptx_write(hdptx, SB_REG011D, 0x67); in hdptx_earc_config()
1055 ANA_SB_VREG_GAIN_CTRL(0)); in hdptx_earc_config()
1095 OVRD_SB_VREG_LPF_BYPASS(0)); in hdptx_earc_config()
1108 unsigned long k = 0, lc, k_sub, lc_sub; in hdptx_phy_clk_pll_calc()
1133 GENMASK(6, 0), in hdptx_phy_clk_pll_calc()
1134 GENMASK(7, 0), in hdptx_phy_clk_pll_calc()
1139 GENMASK(6, 0), in hdptx_phy_clk_pll_calc()
1140 GENMASK(7, 0), in hdptx_phy_clk_pll_calc()
1157 cfg->sdm_en = k > 0 ? 1 : 0; in hdptx_phy_clk_pll_calc()
1174 u8 color_depth = (bus_width & COLOR_DEPTH_MASK) ? 1 : 0; in hdptx_ropll_cmn_config()
1176 struct ropll_config rc = {0}; in hdptx_ropll_cmn_config()
1184 for (; cfg->bit_rate != ~0; cfg++) in hdptx_ropll_cmn_config()
1188 if (cfg->bit_rate == ~0) { in hdptx_ropll_cmn_config()
1212 hdptx_write(hdptx, CMN_REG0008, 0x00); in hdptx_ropll_cmn_config()
1213 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_ropll_cmn_config()
1214 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_ropll_cmn_config()
1215 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_ropll_cmn_config()
1216 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_ropll_cmn_config()
1217 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_ropll_cmn_config()
1218 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_ropll_cmn_config()
1219 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_ropll_cmn_config()
1220 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_ropll_cmn_config()
1221 hdptx_write(hdptx, CMN_REG0011, 0x01); in hdptx_ropll_cmn_config()
1222 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_ropll_cmn_config()
1223 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_ropll_cmn_config()
1224 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_ropll_cmn_config()
1225 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_ropll_cmn_config()
1226 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_ropll_cmn_config()
1227 hdptx_write(hdptx, CMN_REG0017, 0x20); in hdptx_ropll_cmn_config()
1228 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_ropll_cmn_config()
1229 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_ropll_cmn_config()
1230 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_ropll_cmn_config()
1231 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_ropll_cmn_config()
1232 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_ropll_cmn_config()
1233 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_ropll_cmn_config()
1234 hdptx_write(hdptx, CMN_REG001E, 0x14); in hdptx_ropll_cmn_config()
1235 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_ropll_cmn_config()
1236 hdptx_write(hdptx, CMN_REG0020, 0x00); in hdptx_ropll_cmn_config()
1237 hdptx_write(hdptx, CMN_REG0021, 0x00); in hdptx_ropll_cmn_config()
1238 hdptx_write(hdptx, CMN_REG0022, 0x11); in hdptx_ropll_cmn_config()
1239 hdptx_write(hdptx, CMN_REG0023, 0x00); in hdptx_ropll_cmn_config()
1240 hdptx_write(hdptx, CMN_REG0024, 0x00); in hdptx_ropll_cmn_config()
1241 hdptx_write(hdptx, CMN_REG0025, 0x53); in hdptx_ropll_cmn_config()
1242 hdptx_write(hdptx, CMN_REG0026, 0x00); in hdptx_ropll_cmn_config()
1243 hdptx_write(hdptx, CMN_REG0027, 0x00); in hdptx_ropll_cmn_config()
1244 hdptx_write(hdptx, CMN_REG0028, 0x01); in hdptx_ropll_cmn_config()
1245 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_ropll_cmn_config()
1246 hdptx_write(hdptx, CMN_REG002A, 0x00); in hdptx_ropll_cmn_config()
1247 hdptx_write(hdptx, CMN_REG002B, 0x00); in hdptx_ropll_cmn_config()
1248 hdptx_write(hdptx, CMN_REG002C, 0x00); in hdptx_ropll_cmn_config()
1249 hdptx_write(hdptx, CMN_REG002D, 0x00); in hdptx_ropll_cmn_config()
1250 hdptx_write(hdptx, CMN_REG002E, 0x04); in hdptx_ropll_cmn_config()
1251 hdptx_write(hdptx, CMN_REG002F, 0x00); in hdptx_ropll_cmn_config()
1252 hdptx_write(hdptx, CMN_REG0030, 0x20); in hdptx_ropll_cmn_config()
1253 hdptx_write(hdptx, CMN_REG0031, 0x30); in hdptx_ropll_cmn_config()
1254 hdptx_write(hdptx, CMN_REG0032, 0x0b); in hdptx_ropll_cmn_config()
1255 hdptx_write(hdptx, CMN_REG0033, 0x23); in hdptx_ropll_cmn_config()
1256 hdptx_write(hdptx, CMN_REG0034, 0x00); in hdptx_ropll_cmn_config()
1257 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_ropll_cmn_config()
1258 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_ropll_cmn_config()
1259 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_ropll_cmn_config()
1260 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_ropll_cmn_config()
1261 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_ropll_cmn_config()
1262 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_ropll_cmn_config()
1263 hdptx_write(hdptx, CMN_REG003D, 0x40); in hdptx_ropll_cmn_config()
1264 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_ropll_cmn_config()
1265 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_ropll_cmn_config()
1266 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_ropll_cmn_config()
1267 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_ropll_cmn_config()
1268 hdptx_write(hdptx, CMN_REG0042, 0x78); in hdptx_ropll_cmn_config()
1269 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_ropll_cmn_config()
1270 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_ropll_cmn_config()
1271 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_ropll_cmn_config()
1272 hdptx_write(hdptx, CMN_REG0046, 0xdd); in hdptx_ropll_cmn_config()
1273 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_ropll_cmn_config()
1274 hdptx_write(hdptx, CMN_REG0048, 0x11); in hdptx_ropll_cmn_config()
1275 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_ropll_cmn_config()
1276 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_ropll_cmn_config()
1277 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_ropll_cmn_config()
1278 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_ropll_cmn_config()
1279 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_ropll_cmn_config()
1280 hdptx_write(hdptx, CMN_REG004E, 0x34); in hdptx_ropll_cmn_config()
1281 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_ropll_cmn_config()
1282 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_ropll_cmn_config()
1291 hdptx_write(hdptx, CMN_REG005C, 0x25); in hdptx_ropll_cmn_config()
1292 hdptx_write(hdptx, CMN_REG005D, 0x0c); in hdptx_ropll_cmn_config()
1293 hdptx_write(hdptx, CMN_REG005E, 0x4f); in hdptx_ropll_cmn_config()
1297 hdptx_update_bits(hdptx, CMN_REG005E, 0xf, 0); in hdptx_ropll_cmn_config()
1299 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_ropll_cmn_config()
1312 hdptx_write(hdptx, CMN_REG006B, 0x04); in hdptx_ropll_cmn_config()
1314 hdptx_write(hdptx, CMN_REG0073, 0x30); in hdptx_ropll_cmn_config()
1315 hdptx_write(hdptx, CMN_REG0074, 0x04); in hdptx_ropll_cmn_config()
1316 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_ropll_cmn_config()
1317 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_ropll_cmn_config()
1318 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_ropll_cmn_config()
1319 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_ropll_cmn_config()
1320 hdptx_write(hdptx, CMN_REG0079, 0x00); in hdptx_ropll_cmn_config()
1321 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_ropll_cmn_config()
1322 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_ropll_cmn_config()
1323 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_ropll_cmn_config()
1324 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_ropll_cmn_config()
1325 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_ropll_cmn_config()
1326 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_ropll_cmn_config()
1327 hdptx_write(hdptx, CMN_REG0081, 0x01); in hdptx_ropll_cmn_config()
1328 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_ropll_cmn_config()
1329 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_ropll_cmn_config()
1330 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_ropll_cmn_config()
1331 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_ropll_cmn_config()
1341 hdptx_write(hdptx, CMN_REG0087, 0x04); in hdptx_ropll_cmn_config()
1342 hdptx_write(hdptx, CMN_REG0089, 0x00); in hdptx_ropll_cmn_config()
1343 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_ropll_cmn_config()
1344 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_ropll_cmn_config()
1345 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_ropll_cmn_config()
1346 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_ropll_cmn_config()
1347 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_ropll_cmn_config()
1348 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_ropll_cmn_config()
1349 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_ropll_cmn_config()
1350 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_ropll_cmn_config()
1351 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_ropll_cmn_config()
1352 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_ropll_cmn_config()
1353 hdptx_write(hdptx, CMN_REG0095, 0x00); in hdptx_ropll_cmn_config()
1354 hdptx_write(hdptx, CMN_REG0097, 0x02); in hdptx_ropll_cmn_config()
1355 hdptx_write(hdptx, CMN_REG0099, 0x04); in hdptx_ropll_cmn_config()
1356 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_ropll_cmn_config()
1357 hdptx_write(hdptx, CMN_REG009B, 0x00); in hdptx_ropll_cmn_config()
1366 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_ropll_tmds_mode_config()
1367 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_ropll_tmds_mode_config()
1368 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_ropll_tmds_mode_config()
1369 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_ropll_tmds_mode_config()
1370 hdptx_write(hdptx, LNTOP_REG0200, 0x06); in hdptx_ropll_tmds_mode_config()
1374 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_ropll_tmds_mode_config()
1375 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_ropll_tmds_mode_config()
1376 hdptx_write(hdptx, LNTOP_REG0203, 0x0f); in hdptx_ropll_tmds_mode_config()
1377 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_ropll_tmds_mode_config()
1378 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_ropll_tmds_mode_config()
1381 hdptx_write(hdptx, LNTOP_REG0201, 0x07); in hdptx_ropll_tmds_mode_config()
1382 hdptx_write(hdptx, LNTOP_REG0202, 0xc1); in hdptx_ropll_tmds_mode_config()
1383 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_ropll_tmds_mode_config()
1384 hdptx_write(hdptx, LNTOP_REG0204, 0x7c); in hdptx_ropll_tmds_mode_config()
1385 hdptx_write(hdptx, LNTOP_REG0205, 0x1f); in hdptx_ropll_tmds_mode_config()
1388 hdptx_write(hdptx, LNTOP_REG0206, 0x07); in hdptx_ropll_tmds_mode_config()
1389 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_ropll_tmds_mode_config()
1390 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_ropll_tmds_mode_config()
1391 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_ropll_tmds_mode_config()
1392 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_ropll_tmds_mode_config()
1393 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_ropll_tmds_mode_config()
1394 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_ropll_tmds_mode_config()
1395 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_ropll_tmds_mode_config()
1396 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_ropll_tmds_mode_config()
1397 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_ropll_tmds_mode_config()
1398 hdptx_write(hdptx, LANE_REG0312, 0x00); in hdptx_ropll_tmds_mode_config()
1399 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_ropll_tmds_mode_config()
1400 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_ropll_tmds_mode_config()
1401 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_ropll_tmds_mode_config()
1402 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_ropll_tmds_mode_config()
1403 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_ropll_tmds_mode_config()
1404 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_ropll_tmds_mode_config()
1405 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_ropll_tmds_mode_config()
1406 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_ropll_tmds_mode_config()
1407 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_ropll_tmds_mode_config()
1408 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_ropll_tmds_mode_config()
1409 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_ropll_tmds_mode_config()
1410 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_ropll_tmds_mode_config()
1411 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_ropll_tmds_mode_config()
1412 hdptx_write(hdptx, LANE_REG0412, 0x00); in hdptx_ropll_tmds_mode_config()
1413 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_ropll_tmds_mode_config()
1414 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_ropll_tmds_mode_config()
1415 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_ropll_tmds_mode_config()
1416 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_ropll_tmds_mode_config()
1417 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_ropll_tmds_mode_config()
1418 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_ropll_tmds_mode_config()
1419 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_ropll_tmds_mode_config()
1420 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_ropll_tmds_mode_config()
1421 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_ropll_tmds_mode_config()
1422 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_ropll_tmds_mode_config()
1423 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_ropll_tmds_mode_config()
1424 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_ropll_tmds_mode_config()
1425 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_ropll_tmds_mode_config()
1426 hdptx_write(hdptx, LANE_REG0512, 0x00); in hdptx_ropll_tmds_mode_config()
1427 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_ropll_tmds_mode_config()
1428 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_ropll_tmds_mode_config()
1429 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_ropll_tmds_mode_config()
1430 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_ropll_tmds_mode_config()
1431 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_ropll_tmds_mode_config()
1432 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_ropll_tmds_mode_config()
1433 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_ropll_tmds_mode_config()
1434 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_ropll_tmds_mode_config()
1435 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_ropll_tmds_mode_config()
1436 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_ropll_tmds_mode_config()
1437 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_ropll_tmds_mode_config()
1438 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_ropll_tmds_mode_config()
1439 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_ropll_tmds_mode_config()
1440 hdptx_write(hdptx, LANE_REG0612, 0x00); in hdptx_ropll_tmds_mode_config()
1441 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_ropll_tmds_mode_config()
1442 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_ropll_tmds_mode_config()
1443 hdptx_write(hdptx, LANE_REG061E, 0x08); in hdptx_ropll_tmds_mode_config()
1446 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_ropll_tmds_mode_config()
1447 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_ropll_tmds_mode_config()
1448 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_ropll_tmds_mode_config()
1449 hdptx_write(hdptx, LANE_REG061E, 0x0a); in hdptx_ropll_tmds_mode_config()
1451 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_ropll_tmds_mode_config()
1452 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_ropll_tmds_mode_config()
1454 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_ropll_tmds_mode_config()
1455 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_ropll_tmds_mode_config()
1456 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_ropll_tmds_mode_config()
1457 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_ropll_tmds_mode_config()
1458 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_ropll_tmds_mode_config()
1459 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_ropll_tmds_mode_config()
1460 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_ropll_tmds_mode_config()
1461 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_ropll_tmds_mode_config()
1462 hdptx_write(hdptx, LANE_REG0306, 0x1c); in hdptx_ropll_tmds_mode_config()
1463 hdptx_write(hdptx, LANE_REG0406, 0x1c); in hdptx_ropll_tmds_mode_config()
1464 hdptx_write(hdptx, LANE_REG0506, 0x1c); in hdptx_ropll_tmds_mode_config()
1465 hdptx_write(hdptx, LANE_REG0606, 0x1c); in hdptx_ropll_tmds_mode_config()
1495 hdptx_write(hdptx, CMN_REG0008, 0xd0); in hdptx_lcpll_ropll_cmn_config()
1496 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1497 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_lcpll_ropll_cmn_config()
1498 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_lcpll_ropll_cmn_config()
1499 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_lcpll_ropll_cmn_config()
1500 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_lcpll_ropll_cmn_config()
1501 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_lcpll_ropll_cmn_config()
1502 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_lcpll_ropll_cmn_config()
1503 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_lcpll_ropll_cmn_config()
1504 hdptx_write(hdptx, CMN_REG0011, 0x00); in hdptx_lcpll_ropll_cmn_config()
1505 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_lcpll_ropll_cmn_config()
1506 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_lcpll_ropll_cmn_config()
1507 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_lcpll_ropll_cmn_config()
1508 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_lcpll_ropll_cmn_config()
1509 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_lcpll_ropll_cmn_config()
1510 hdptx_write(hdptx, CMN_REG0017, 0x00); in hdptx_lcpll_ropll_cmn_config()
1511 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_lcpll_ropll_cmn_config()
1512 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_lcpll_ropll_cmn_config()
1513 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_lcpll_ropll_cmn_config()
1514 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1515 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_lcpll_ropll_cmn_config()
1516 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_lcpll_ropll_cmn_config()
1517 hdptx_write(hdptx, CMN_REG001E, 0x35); in hdptx_lcpll_ropll_cmn_config()
1518 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1519 hdptx_write(hdptx, CMN_REG0020, 0x6b); in hdptx_lcpll_ropll_cmn_config()
1520 hdptx_write(hdptx, CMN_REG0021, 0x6b); in hdptx_lcpll_ropll_cmn_config()
1521 hdptx_write(hdptx, CMN_REG0022, 0x11); in hdptx_lcpll_ropll_cmn_config()
1522 hdptx_write(hdptx, CMN_REG0024, 0x00); in hdptx_lcpll_ropll_cmn_config()
1523 hdptx_write(hdptx, CMN_REG0025, 0x10); in hdptx_lcpll_ropll_cmn_config()
1524 hdptx_write(hdptx, CMN_REG0026, 0x53); in hdptx_lcpll_ropll_cmn_config()
1525 hdptx_write(hdptx, CMN_REG0027, 0x15); in hdptx_lcpll_ropll_cmn_config()
1526 hdptx_write(hdptx, CMN_REG0028, 0x0d); in hdptx_lcpll_ropll_cmn_config()
1527 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_lcpll_ropll_cmn_config()
1528 hdptx_write(hdptx, CMN_REG002A, 0x09); in hdptx_lcpll_ropll_cmn_config()
1529 hdptx_write(hdptx, CMN_REG002B, 0x01); in hdptx_lcpll_ropll_cmn_config()
1530 hdptx_write(hdptx, CMN_REG002C, 0x02); in hdptx_lcpll_ropll_cmn_config()
1531 hdptx_write(hdptx, CMN_REG002D, 0x02); in hdptx_lcpll_ropll_cmn_config()
1532 hdptx_write(hdptx, CMN_REG002E, 0x0d); in hdptx_lcpll_ropll_cmn_config()
1533 hdptx_write(hdptx, CMN_REG002F, 0x61); in hdptx_lcpll_ropll_cmn_config()
1534 hdptx_write(hdptx, CMN_REG0030, 0x00); in hdptx_lcpll_ropll_cmn_config()
1535 hdptx_write(hdptx, CMN_REG0031, 0x20); in hdptx_lcpll_ropll_cmn_config()
1536 hdptx_write(hdptx, CMN_REG0032, 0x30); in hdptx_lcpll_ropll_cmn_config()
1537 hdptx_write(hdptx, CMN_REG0033, 0x0b); in hdptx_lcpll_ropll_cmn_config()
1538 hdptx_write(hdptx, CMN_REG0034, 0x23); in hdptx_lcpll_ropll_cmn_config()
1539 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_lcpll_ropll_cmn_config()
1540 hdptx_write(hdptx, CMN_REG0037, 0x00); in hdptx_lcpll_ropll_cmn_config()
1541 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_lcpll_ropll_cmn_config()
1542 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_lcpll_ropll_cmn_config()
1543 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_lcpll_ropll_cmn_config()
1544 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1545 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_lcpll_ropll_cmn_config()
1546 hdptx_write(hdptx, CMN_REG003D, 0xc0); in hdptx_lcpll_ropll_cmn_config()
1547 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1548 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_lcpll_ropll_cmn_config()
1549 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_lcpll_ropll_cmn_config()
1550 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_lcpll_ropll_cmn_config()
1551 hdptx_write(hdptx, CMN_REG0042, 0xb8); in hdptx_lcpll_ropll_cmn_config()
1552 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_lcpll_ropll_cmn_config()
1553 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_lcpll_ropll_cmn_config()
1554 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_lcpll_ropll_cmn_config()
1555 hdptx_write(hdptx, CMN_REG0046, 0xff); in hdptx_lcpll_ropll_cmn_config()
1556 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_lcpll_ropll_cmn_config()
1557 hdptx_write(hdptx, CMN_REG0048, 0x44); in hdptx_lcpll_ropll_cmn_config()
1558 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_lcpll_ropll_cmn_config()
1559 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_lcpll_ropll_cmn_config()
1560 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1561 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_lcpll_ropll_cmn_config()
1562 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_lcpll_ropll_cmn_config()
1563 hdptx_write(hdptx, CMN_REG004E, 0x14); in hdptx_lcpll_ropll_cmn_config()
1564 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1565 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_lcpll_ropll_cmn_config()
1566 hdptx_write(hdptx, CMN_REG0054, 0x19); in hdptx_lcpll_ropll_cmn_config()
1567 hdptx_write(hdptx, CMN_REG0058, 0x19); in hdptx_lcpll_ropll_cmn_config()
1568 hdptx_write(hdptx, CMN_REG0059, 0x11); in hdptx_lcpll_ropll_cmn_config()
1569 hdptx_write(hdptx, CMN_REG005B, 0x30); in hdptx_lcpll_ropll_cmn_config()
1570 hdptx_write(hdptx, CMN_REG005C, 0x25); in hdptx_lcpll_ropll_cmn_config()
1571 hdptx_write(hdptx, CMN_REG005D, 0x14); in hdptx_lcpll_ropll_cmn_config()
1572 hdptx_write(hdptx, CMN_REG005E, 0x0e); in hdptx_lcpll_ropll_cmn_config()
1573 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_lcpll_ropll_cmn_config()
1574 hdptx_write(hdptx, CMN_REG0063, 0x01); in hdptx_lcpll_ropll_cmn_config()
1575 hdptx_write(hdptx, CMN_REG0064, 0x0e); in hdptx_lcpll_ropll_cmn_config()
1576 hdptx_write(hdptx, CMN_REG0068, 0x00); in hdptx_lcpll_ropll_cmn_config()
1577 hdptx_write(hdptx, CMN_REG0069, 0x02); in hdptx_lcpll_ropll_cmn_config()
1578 hdptx_write(hdptx, CMN_REG006B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1579 hdptx_write(hdptx, CMN_REG006F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1580 hdptx_write(hdptx, CMN_REG0073, 0x02); in hdptx_lcpll_ropll_cmn_config()
1581 hdptx_write(hdptx, CMN_REG0074, 0x00); in hdptx_lcpll_ropll_cmn_config()
1582 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_lcpll_ropll_cmn_config()
1583 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_lcpll_ropll_cmn_config()
1584 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_lcpll_ropll_cmn_config()
1585 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1586 hdptx_write(hdptx, CMN_REG007A, 0x00); in hdptx_lcpll_ropll_cmn_config()
1587 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_lcpll_ropll_cmn_config()
1588 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_lcpll_ropll_cmn_config()
1589 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_lcpll_ropll_cmn_config()
1590 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_lcpll_ropll_cmn_config()
1591 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_lcpll_ropll_cmn_config()
1592 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_lcpll_ropll_cmn_config()
1593 hdptx_write(hdptx, CMN_REG0081, 0x09); in hdptx_lcpll_ropll_cmn_config()
1594 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_lcpll_ropll_cmn_config()
1595 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_lcpll_ropll_cmn_config()
1596 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_lcpll_ropll_cmn_config()
1597 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_lcpll_ropll_cmn_config()
1598 hdptx_write(hdptx, CMN_REG0086, 0x11); in hdptx_lcpll_ropll_cmn_config()
1599 hdptx_write(hdptx, CMN_REG0087, 0x0c); in hdptx_lcpll_ropll_cmn_config()
1600 hdptx_write(hdptx, CMN_REG0089, 0x00); in hdptx_lcpll_ropll_cmn_config()
1601 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_lcpll_ropll_cmn_config()
1602 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_lcpll_ropll_cmn_config()
1603 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_lcpll_ropll_cmn_config()
1604 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_lcpll_ropll_cmn_config()
1605 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_lcpll_ropll_cmn_config()
1606 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_lcpll_ropll_cmn_config()
1607 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_lcpll_ropll_cmn_config()
1608 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_lcpll_ropll_cmn_config()
1609 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_lcpll_ropll_cmn_config()
1610 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_lcpll_ropll_cmn_config()
1611 hdptx_write(hdptx, CMN_REG0095, 0x03); in hdptx_lcpll_ropll_cmn_config()
1612 hdptx_write(hdptx, CMN_REG0097, 0x00); in hdptx_lcpll_ropll_cmn_config()
1613 hdptx_write(hdptx, CMN_REG0099, 0x00); in hdptx_lcpll_ropll_cmn_config()
1614 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_lcpll_ropll_cmn_config()
1615 hdptx_write(hdptx, CMN_REG009B, 0x10); in hdptx_lcpll_ropll_cmn_config()
1617 hdptx_write(hdptx, CMN_REG009E, 0x03); in hdptx_lcpll_ropll_cmn_config()
1618 hdptx_write(hdptx, CMN_REG00A0, 0x60); in hdptx_lcpll_ropll_cmn_config()
1619 hdptx_write(hdptx, CMN_REG009F, 0xff); in hdptx_lcpll_ropll_cmn_config()
1630 u8 color_depth = (rate & COLOR_DEPTH_MASK) ? 1 : 0; in hdptx_lcpll_cmn_config()
1637 for (; cfg->bit_rate != ~0; cfg++) in hdptx_lcpll_cmn_config()
1641 if (cfg->bit_rate == ~0) { in hdptx_lcpll_cmn_config()
1653 hdptx_write(hdptx, CMN_REG0009, 0x0c); in hdptx_lcpll_cmn_config()
1654 hdptx_write(hdptx, CMN_REG000A, 0x83); in hdptx_lcpll_cmn_config()
1655 hdptx_write(hdptx, CMN_REG000B, 0x06); in hdptx_lcpll_cmn_config()
1656 hdptx_write(hdptx, CMN_REG000C, 0x20); in hdptx_lcpll_cmn_config()
1657 hdptx_write(hdptx, CMN_REG000D, 0xb8); in hdptx_lcpll_cmn_config()
1658 hdptx_write(hdptx, CMN_REG000E, 0x0f); in hdptx_lcpll_cmn_config()
1659 hdptx_write(hdptx, CMN_REG000F, 0x0f); in hdptx_lcpll_cmn_config()
1660 hdptx_write(hdptx, CMN_REG0010, 0x04); in hdptx_lcpll_cmn_config()
1661 hdptx_write(hdptx, CMN_REG0011, 0x00); in hdptx_lcpll_cmn_config()
1662 hdptx_write(hdptx, CMN_REG0012, 0x26); in hdptx_lcpll_cmn_config()
1663 hdptx_write(hdptx, CMN_REG0013, 0x22); in hdptx_lcpll_cmn_config()
1664 hdptx_write(hdptx, CMN_REG0014, 0x24); in hdptx_lcpll_cmn_config()
1665 hdptx_write(hdptx, CMN_REG0015, 0x77); in hdptx_lcpll_cmn_config()
1666 hdptx_write(hdptx, CMN_REG0016, 0x08); in hdptx_lcpll_cmn_config()
1667 hdptx_write(hdptx, CMN_REG0017, 0x00); in hdptx_lcpll_cmn_config()
1668 hdptx_write(hdptx, CMN_REG0018, 0x04); in hdptx_lcpll_cmn_config()
1669 hdptx_write(hdptx, CMN_REG0019, 0x48); in hdptx_lcpll_cmn_config()
1670 hdptx_write(hdptx, CMN_REG001A, 0x01); in hdptx_lcpll_cmn_config()
1671 hdptx_write(hdptx, CMN_REG001B, 0x00); in hdptx_lcpll_cmn_config()
1672 hdptx_write(hdptx, CMN_REG001C, 0x01); in hdptx_lcpll_cmn_config()
1673 hdptx_write(hdptx, CMN_REG001D, 0x64); in hdptx_lcpll_cmn_config()
1678 hdptx_write(hdptx, CMN_REG001F, 0x00); in hdptx_lcpll_cmn_config()
1683 hdptx_write(hdptx, CMN_REG0025, 0x10); in hdptx_lcpll_cmn_config()
1684 hdptx_write(hdptx, CMN_REG0026, 0x53); in hdptx_lcpll_cmn_config()
1685 hdptx_write(hdptx, CMN_REG0027, 0x01); in hdptx_lcpll_cmn_config()
1686 hdptx_write(hdptx, CMN_REG0028, 0x0d); in hdptx_lcpll_cmn_config()
1687 hdptx_write(hdptx, CMN_REG0029, 0x01); in hdptx_lcpll_cmn_config()
1693 hdptx_write(hdptx, CMN_REG002E, 0x02); in hdptx_lcpll_cmn_config()
1694 hdptx_write(hdptx, CMN_REG002F, 0x0d); in hdptx_lcpll_cmn_config()
1695 hdptx_write(hdptx, CMN_REG0030, 0x00); in hdptx_lcpll_cmn_config()
1696 hdptx_write(hdptx, CMN_REG0031, 0x20); in hdptx_lcpll_cmn_config()
1697 hdptx_write(hdptx, CMN_REG0032, 0x30); in hdptx_lcpll_cmn_config()
1698 hdptx_write(hdptx, CMN_REG0033, 0x0b); in hdptx_lcpll_cmn_config()
1699 hdptx_write(hdptx, CMN_REG0034, 0x23); in hdptx_lcpll_cmn_config()
1700 hdptx_write(hdptx, CMN_REG0035, 0x00); in hdptx_lcpll_cmn_config()
1701 hdptx_write(hdptx, CMN_REG0038, 0x00); in hdptx_lcpll_cmn_config()
1702 hdptx_write(hdptx, CMN_REG0039, 0x00); in hdptx_lcpll_cmn_config()
1703 hdptx_write(hdptx, CMN_REG003A, 0x00); in hdptx_lcpll_cmn_config()
1704 hdptx_write(hdptx, CMN_REG003B, 0x00); in hdptx_lcpll_cmn_config()
1705 hdptx_write(hdptx, CMN_REG003C, 0x80); in hdptx_lcpll_cmn_config()
1706 hdptx_write(hdptx, CMN_REG003D, 0x00); in hdptx_lcpll_cmn_config()
1707 hdptx_write(hdptx, CMN_REG003E, 0x0c); in hdptx_lcpll_cmn_config()
1708 hdptx_write(hdptx, CMN_REG003F, 0x83); in hdptx_lcpll_cmn_config()
1709 hdptx_write(hdptx, CMN_REG0040, 0x06); in hdptx_lcpll_cmn_config()
1710 hdptx_write(hdptx, CMN_REG0041, 0x20); in hdptx_lcpll_cmn_config()
1711 hdptx_write(hdptx, CMN_REG0042, 0xb8); in hdptx_lcpll_cmn_config()
1712 hdptx_write(hdptx, CMN_REG0043, 0x00); in hdptx_lcpll_cmn_config()
1713 hdptx_write(hdptx, CMN_REG0044, 0x46); in hdptx_lcpll_cmn_config()
1714 hdptx_write(hdptx, CMN_REG0045, 0x24); in hdptx_lcpll_cmn_config()
1715 hdptx_write(hdptx, CMN_REG0046, 0xff); in hdptx_lcpll_cmn_config()
1716 hdptx_write(hdptx, CMN_REG0047, 0x00); in hdptx_lcpll_cmn_config()
1717 hdptx_write(hdptx, CMN_REG0048, 0x44); in hdptx_lcpll_cmn_config()
1718 hdptx_write(hdptx, CMN_REG0049, 0xfa); in hdptx_lcpll_cmn_config()
1719 hdptx_write(hdptx, CMN_REG004A, 0x08); in hdptx_lcpll_cmn_config()
1720 hdptx_write(hdptx, CMN_REG004B, 0x00); in hdptx_lcpll_cmn_config()
1721 hdptx_write(hdptx, CMN_REG004C, 0x01); in hdptx_lcpll_cmn_config()
1722 hdptx_write(hdptx, CMN_REG004D, 0x64); in hdptx_lcpll_cmn_config()
1723 hdptx_write(hdptx, CMN_REG004E, 0x14); in hdptx_lcpll_cmn_config()
1724 hdptx_write(hdptx, CMN_REG004F, 0x00); in hdptx_lcpll_cmn_config()
1725 hdptx_write(hdptx, CMN_REG0050, 0x00); in hdptx_lcpll_cmn_config()
1726 hdptx_write(hdptx, CMN_REG0051, 0x00); in hdptx_lcpll_cmn_config()
1727 hdptx_write(hdptx, CMN_REG0055, 0x00); in hdptx_lcpll_cmn_config()
1728 hdptx_write(hdptx, CMN_REG0059, 0x11); in hdptx_lcpll_cmn_config()
1729 hdptx_write(hdptx, CMN_REG005A, 0x03); in hdptx_lcpll_cmn_config()
1730 hdptx_write(hdptx, CMN_REG005C, 0x05); in hdptx_lcpll_cmn_config()
1731 hdptx_write(hdptx, CMN_REG005D, 0x0c); in hdptx_lcpll_cmn_config()
1732 hdptx_write(hdptx, CMN_REG005E, 0x07); in hdptx_lcpll_cmn_config()
1733 hdptx_write(hdptx, CMN_REG005F, 0x01); in hdptx_lcpll_cmn_config()
1734 hdptx_write(hdptx, CMN_REG0060, 0x01); in hdptx_lcpll_cmn_config()
1735 hdptx_write(hdptx, CMN_REG0064, 0x07); in hdptx_lcpll_cmn_config()
1736 hdptx_write(hdptx, CMN_REG0065, 0x00); in hdptx_lcpll_cmn_config()
1737 hdptx_write(hdptx, CMN_REG0069, 0x00); in hdptx_lcpll_cmn_config()
1738 hdptx_write(hdptx, CMN_REG006B, 0x04); in hdptx_lcpll_cmn_config()
1739 hdptx_write(hdptx, CMN_REG006C, 0x00); in hdptx_lcpll_cmn_config()
1740 hdptx_write(hdptx, CMN_REG0070, 0x01); in hdptx_lcpll_cmn_config()
1741 hdptx_write(hdptx, CMN_REG0073, 0x30); in hdptx_lcpll_cmn_config()
1742 hdptx_write(hdptx, CMN_REG0074, 0x00); in hdptx_lcpll_cmn_config()
1743 hdptx_write(hdptx, CMN_REG0075, 0x20); in hdptx_lcpll_cmn_config()
1744 hdptx_write(hdptx, CMN_REG0076, 0x30); in hdptx_lcpll_cmn_config()
1745 hdptx_write(hdptx, CMN_REG0077, 0x08); in hdptx_lcpll_cmn_config()
1746 hdptx_write(hdptx, CMN_REG0078, 0x0c); in hdptx_lcpll_cmn_config()
1747 hdptx_write(hdptx, CMN_REG0079, 0x00); in hdptx_lcpll_cmn_config()
1748 hdptx_write(hdptx, CMN_REG007B, 0x00); in hdptx_lcpll_cmn_config()
1749 hdptx_write(hdptx, CMN_REG007C, 0x00); in hdptx_lcpll_cmn_config()
1750 hdptx_write(hdptx, CMN_REG007D, 0x00); in hdptx_lcpll_cmn_config()
1751 hdptx_write(hdptx, CMN_REG007E, 0x00); in hdptx_lcpll_cmn_config()
1752 hdptx_write(hdptx, CMN_REG007F, 0x00); in hdptx_lcpll_cmn_config()
1753 hdptx_write(hdptx, CMN_REG0080, 0x00); in hdptx_lcpll_cmn_config()
1754 hdptx_write(hdptx, CMN_REG0081, 0x09); in hdptx_lcpll_cmn_config()
1755 hdptx_write(hdptx, CMN_REG0082, 0x04); in hdptx_lcpll_cmn_config()
1756 hdptx_write(hdptx, CMN_REG0083, 0x24); in hdptx_lcpll_cmn_config()
1757 hdptx_write(hdptx, CMN_REG0084, 0x20); in hdptx_lcpll_cmn_config()
1758 hdptx_write(hdptx, CMN_REG0085, 0x03); in hdptx_lcpll_cmn_config()
1759 hdptx_write(hdptx, CMN_REG0086, 0x01); in hdptx_lcpll_cmn_config()
1764 hdptx_write(hdptx, CMN_REG0087, 0x0c); in hdptx_lcpll_cmn_config()
1765 hdptx_write(hdptx, CMN_REG0089, 0x02); in hdptx_lcpll_cmn_config()
1766 hdptx_write(hdptx, CMN_REG008A, 0x55); in hdptx_lcpll_cmn_config()
1767 hdptx_write(hdptx, CMN_REG008B, 0x25); in hdptx_lcpll_cmn_config()
1768 hdptx_write(hdptx, CMN_REG008C, 0x2c); in hdptx_lcpll_cmn_config()
1769 hdptx_write(hdptx, CMN_REG008D, 0x22); in hdptx_lcpll_cmn_config()
1770 hdptx_write(hdptx, CMN_REG008E, 0x14); in hdptx_lcpll_cmn_config()
1771 hdptx_write(hdptx, CMN_REG008F, 0x20); in hdptx_lcpll_cmn_config()
1772 hdptx_write(hdptx, CMN_REG0090, 0x00); in hdptx_lcpll_cmn_config()
1773 hdptx_write(hdptx, CMN_REG0091, 0x00); in hdptx_lcpll_cmn_config()
1774 hdptx_write(hdptx, CMN_REG0092, 0x00); in hdptx_lcpll_cmn_config()
1775 hdptx_write(hdptx, CMN_REG0093, 0x00); in hdptx_lcpll_cmn_config()
1776 hdptx_write(hdptx, CMN_REG0095, 0x00); in hdptx_lcpll_cmn_config()
1777 hdptx_write(hdptx, CMN_REG0097, 0x00); in hdptx_lcpll_cmn_config()
1778 hdptx_write(hdptx, CMN_REG0099, 0x00); in hdptx_lcpll_cmn_config()
1779 hdptx_write(hdptx, CMN_REG009A, 0x11); in hdptx_lcpll_cmn_config()
1780 hdptx_write(hdptx, CMN_REG009B, 0x10); in hdptx_lcpll_cmn_config()
1787 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1788 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1789 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1790 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1791 hdptx_write(hdptx, LNTOP_REG0200, 0x04); in hdptx_lcpll_ropll_frl_mode_config()
1792 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1793 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_lcpll_ropll_frl_mode_config()
1794 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_lcpll_ropll_frl_mode_config()
1795 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_lcpll_ropll_frl_mode_config()
1796 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_lcpll_ropll_frl_mode_config()
1797 hdptx_write(hdptx, LNTOP_REG0206, 0x05); in hdptx_lcpll_ropll_frl_mode_config()
1798 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1799 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1800 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1801 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1802 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1803 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1804 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1805 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1806 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1807 hdptx_write(hdptx, LANE_REG0312, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1808 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1809 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1810 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1811 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1812 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1813 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1814 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1815 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1816 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1817 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1818 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1819 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1820 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1821 hdptx_write(hdptx, LANE_REG0412, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1822 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1823 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1824 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1825 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1826 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1827 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1828 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1829 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1830 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1831 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1832 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1833 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1834 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1835 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1836 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1837 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1838 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1839 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1840 hdptx_write(hdptx, LANE_REG0512, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1841 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1842 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1843 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1844 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1845 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_lcpll_ropll_frl_mode_config()
1846 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_lcpll_ropll_frl_mode_config()
1847 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_lcpll_ropll_frl_mode_config()
1848 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1849 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1850 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_lcpll_ropll_frl_mode_config()
1851 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_lcpll_ropll_frl_mode_config()
1852 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1853 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_lcpll_ropll_frl_mode_config()
1854 hdptx_write(hdptx, LANE_REG0612, 0x3c); in hdptx_lcpll_ropll_frl_mode_config()
1855 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1856 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_lcpll_ropll_frl_mode_config()
1857 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_lcpll_ropll_frl_mode_config()
1858 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_lcpll_ropll_frl_mode_config()
1860 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1861 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1862 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1863 hdptx_write(hdptx, LANE_REG061E, 0x02); in hdptx_lcpll_ropll_frl_mode_config()
1865 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1866 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1867 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1868 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_lcpll_ropll_frl_mode_config()
1869 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1870 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1871 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1872 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_lcpll_ropll_frl_mode_config()
1873 hdptx_write(hdptx, LANE_REG0306, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1874 hdptx_write(hdptx, LANE_REG0406, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1875 hdptx_write(hdptx, LANE_REG0506, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1876 hdptx_write(hdptx, LANE_REG0606, 0xfc); in hdptx_lcpll_ropll_frl_mode_config()
1878 hdptx_write(hdptx, LANE_REG0305, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1879 hdptx_write(hdptx, LANE_REG0405, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1880 hdptx_write(hdptx, LANE_REG0505, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1881 hdptx_write(hdptx, LANE_REG0605, 0x4f); in hdptx_lcpll_ropll_frl_mode_config()
1882 hdptx_write(hdptx, LANE_REG0304, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1883 hdptx_write(hdptx, LANE_REG0404, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1884 hdptx_write(hdptx, LANE_REG0504, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1885 hdptx_write(hdptx, LANE_REG0604, 0x14); in hdptx_lcpll_ropll_frl_mode_config()
1895 hdptx_write(hdptx, SB_REG0114, 0x00); in hdptx_lcpll_frl_mode_config()
1896 hdptx_write(hdptx, SB_REG0115, 0x00); in hdptx_lcpll_frl_mode_config()
1897 hdptx_write(hdptx, SB_REG0116, 0x00); in hdptx_lcpll_frl_mode_config()
1898 hdptx_write(hdptx, SB_REG0117, 0x00); in hdptx_lcpll_frl_mode_config()
1899 hdptx_write(hdptx, LNTOP_REG0200, 0x04); in hdptx_lcpll_frl_mode_config()
1900 hdptx_write(hdptx, LNTOP_REG0201, 0x00); in hdptx_lcpll_frl_mode_config()
1901 hdptx_write(hdptx, LNTOP_REG0202, 0x00); in hdptx_lcpll_frl_mode_config()
1902 hdptx_write(hdptx, LNTOP_REG0203, 0xf0); in hdptx_lcpll_frl_mode_config()
1903 hdptx_write(hdptx, LNTOP_REG0204, 0xff); in hdptx_lcpll_frl_mode_config()
1904 hdptx_write(hdptx, LNTOP_REG0205, 0xff); in hdptx_lcpll_frl_mode_config()
1905 hdptx_write(hdptx, LNTOP_REG0206, 0x05); in hdptx_lcpll_frl_mode_config()
1906 hdptx_write(hdptx, LANE_REG0303, 0x0c); in hdptx_lcpll_frl_mode_config()
1907 hdptx_write(hdptx, LANE_REG0307, 0x20); in hdptx_lcpll_frl_mode_config()
1908 hdptx_write(hdptx, LANE_REG030A, 0x17); in hdptx_lcpll_frl_mode_config()
1909 hdptx_write(hdptx, LANE_REG030B, 0x77); in hdptx_lcpll_frl_mode_config()
1910 hdptx_write(hdptx, LANE_REG030C, 0x77); in hdptx_lcpll_frl_mode_config()
1911 hdptx_write(hdptx, LANE_REG030D, 0x77); in hdptx_lcpll_frl_mode_config()
1912 hdptx_write(hdptx, LANE_REG030E, 0x38); in hdptx_lcpll_frl_mode_config()
1913 hdptx_write(hdptx, LANE_REG0310, 0x03); in hdptx_lcpll_frl_mode_config()
1914 hdptx_write(hdptx, LANE_REG0311, 0x0f); in hdptx_lcpll_frl_mode_config()
1915 hdptx_write(hdptx, LANE_REG0312, 0x3c); in hdptx_lcpll_frl_mode_config()
1916 hdptx_write(hdptx, LANE_REG0316, 0x02); in hdptx_lcpll_frl_mode_config()
1917 hdptx_write(hdptx, LANE_REG031B, 0x01); in hdptx_lcpll_frl_mode_config()
1918 hdptx_write(hdptx, LANE_REG031F, 0x15); in hdptx_lcpll_frl_mode_config()
1919 hdptx_write(hdptx, LANE_REG0320, 0xa0); in hdptx_lcpll_frl_mode_config()
1920 hdptx_write(hdptx, LANE_REG0403, 0x0c); in hdptx_lcpll_frl_mode_config()
1921 hdptx_write(hdptx, LANE_REG0407, 0x20); in hdptx_lcpll_frl_mode_config()
1922 hdptx_write(hdptx, LANE_REG040A, 0x17); in hdptx_lcpll_frl_mode_config()
1923 hdptx_write(hdptx, LANE_REG040B, 0x77); in hdptx_lcpll_frl_mode_config()
1924 hdptx_write(hdptx, LANE_REG040C, 0x77); in hdptx_lcpll_frl_mode_config()
1925 hdptx_write(hdptx, LANE_REG040D, 0x77); in hdptx_lcpll_frl_mode_config()
1926 hdptx_write(hdptx, LANE_REG040E, 0x38); in hdptx_lcpll_frl_mode_config()
1927 hdptx_write(hdptx, LANE_REG0410, 0x03); in hdptx_lcpll_frl_mode_config()
1928 hdptx_write(hdptx, LANE_REG0411, 0x0f); in hdptx_lcpll_frl_mode_config()
1929 hdptx_write(hdptx, LANE_REG0412, 0x3c); in hdptx_lcpll_frl_mode_config()
1930 hdptx_write(hdptx, LANE_REG0416, 0x02); in hdptx_lcpll_frl_mode_config()
1931 hdptx_write(hdptx, LANE_REG041B, 0x01); in hdptx_lcpll_frl_mode_config()
1932 hdptx_write(hdptx, LANE_REG041F, 0x15); in hdptx_lcpll_frl_mode_config()
1933 hdptx_write(hdptx, LANE_REG0420, 0xa0); in hdptx_lcpll_frl_mode_config()
1934 hdptx_write(hdptx, LANE_REG0503, 0x0c); in hdptx_lcpll_frl_mode_config()
1935 hdptx_write(hdptx, LANE_REG0507, 0x20); in hdptx_lcpll_frl_mode_config()
1936 hdptx_write(hdptx, LANE_REG050A, 0x17); in hdptx_lcpll_frl_mode_config()
1937 hdptx_write(hdptx, LANE_REG050B, 0x77); in hdptx_lcpll_frl_mode_config()
1938 hdptx_write(hdptx, LANE_REG050C, 0x77); in hdptx_lcpll_frl_mode_config()
1939 hdptx_write(hdptx, LANE_REG050D, 0x77); in hdptx_lcpll_frl_mode_config()
1940 hdptx_write(hdptx, LANE_REG050E, 0x38); in hdptx_lcpll_frl_mode_config()
1941 hdptx_write(hdptx, LANE_REG0510, 0x03); in hdptx_lcpll_frl_mode_config()
1942 hdptx_write(hdptx, LANE_REG0511, 0x0f); in hdptx_lcpll_frl_mode_config()
1943 hdptx_write(hdptx, LANE_REG0512, 0x3c); in hdptx_lcpll_frl_mode_config()
1944 hdptx_write(hdptx, LANE_REG0516, 0x02); in hdptx_lcpll_frl_mode_config()
1945 hdptx_write(hdptx, LANE_REG051B, 0x01); in hdptx_lcpll_frl_mode_config()
1946 hdptx_write(hdptx, LANE_REG051F, 0x15); in hdptx_lcpll_frl_mode_config()
1947 hdptx_write(hdptx, LANE_REG0520, 0xa0); in hdptx_lcpll_frl_mode_config()
1948 hdptx_write(hdptx, LANE_REG0603, 0x0c); in hdptx_lcpll_frl_mode_config()
1949 hdptx_write(hdptx, LANE_REG0607, 0x20); in hdptx_lcpll_frl_mode_config()
1950 hdptx_write(hdptx, LANE_REG060A, 0x17); in hdptx_lcpll_frl_mode_config()
1951 hdptx_write(hdptx, LANE_REG060B, 0x77); in hdptx_lcpll_frl_mode_config()
1952 hdptx_write(hdptx, LANE_REG060C, 0x77); in hdptx_lcpll_frl_mode_config()
1953 hdptx_write(hdptx, LANE_REG060D, 0x77); in hdptx_lcpll_frl_mode_config()
1954 hdptx_write(hdptx, LANE_REG060E, 0x38); in hdptx_lcpll_frl_mode_config()
1955 hdptx_write(hdptx, LANE_REG0610, 0x03); in hdptx_lcpll_frl_mode_config()
1956 hdptx_write(hdptx, LANE_REG0611, 0x0f); in hdptx_lcpll_frl_mode_config()
1957 hdptx_write(hdptx, LANE_REG0612, 0x3c); in hdptx_lcpll_frl_mode_config()
1958 hdptx_write(hdptx, LANE_REG0616, 0x02); in hdptx_lcpll_frl_mode_config()
1959 hdptx_write(hdptx, LANE_REG061B, 0x01); in hdptx_lcpll_frl_mode_config()
1960 hdptx_write(hdptx, LANE_REG061F, 0x15); in hdptx_lcpll_frl_mode_config()
1961 hdptx_write(hdptx, LANE_REG0620, 0xa0); in hdptx_lcpll_frl_mode_config()
1963 hdptx_write(hdptx, LANE_REG031E, 0x02); in hdptx_lcpll_frl_mode_config()
1964 hdptx_write(hdptx, LANE_REG041E, 0x02); in hdptx_lcpll_frl_mode_config()
1965 hdptx_write(hdptx, LANE_REG051E, 0x02); in hdptx_lcpll_frl_mode_config()
1966 hdptx_write(hdptx, LANE_REG061E, 0x02); in hdptx_lcpll_frl_mode_config()
1968 hdptx_write(hdptx, LANE_REG0303, 0x2f); in hdptx_lcpll_frl_mode_config()
1969 hdptx_write(hdptx, LANE_REG0403, 0x2f); in hdptx_lcpll_frl_mode_config()
1970 hdptx_write(hdptx, LANE_REG0503, 0x2f); in hdptx_lcpll_frl_mode_config()
1971 hdptx_write(hdptx, LANE_REG0603, 0x2f); in hdptx_lcpll_frl_mode_config()
1972 hdptx_write(hdptx, LANE_REG0305, 0x03); in hdptx_lcpll_frl_mode_config()
1973 hdptx_write(hdptx, LANE_REG0405, 0x03); in hdptx_lcpll_frl_mode_config()
1974 hdptx_write(hdptx, LANE_REG0505, 0x03); in hdptx_lcpll_frl_mode_config()
1975 hdptx_write(hdptx, LANE_REG0605, 0x03); in hdptx_lcpll_frl_mode_config()
1976 hdptx_write(hdptx, LANE_REG0306, 0xfc); in hdptx_lcpll_frl_mode_config()
1977 hdptx_write(hdptx, LANE_REG0406, 0xfc); in hdptx_lcpll_frl_mode_config()
1978 hdptx_write(hdptx, LANE_REG0506, 0xfc); in hdptx_lcpll_frl_mode_config()
1979 hdptx_write(hdptx, LANE_REG0606, 0xfc); in hdptx_lcpll_frl_mode_config()
1981 hdptx_write(hdptx, LANE_REG0305, 0x4f); in hdptx_lcpll_frl_mode_config()
1982 hdptx_write(hdptx, LANE_REG0405, 0x4f); in hdptx_lcpll_frl_mode_config()
1983 hdptx_write(hdptx, LANE_REG0505, 0x4f); in hdptx_lcpll_frl_mode_config()
1984 hdptx_write(hdptx, LANE_REG0605, 0x4f); in hdptx_lcpll_frl_mode_config()
1985 hdptx_write(hdptx, LANE_REG0304, 0x14); in hdptx_lcpll_frl_mode_config()
1986 hdptx_write(hdptx, LANE_REG0404, 0x14); in hdptx_lcpll_frl_mode_config()
1987 hdptx_write(hdptx, LANE_REG0504, 0x14); in hdptx_lcpll_frl_mode_config()
1988 hdptx_write(hdptx, LANE_REG0604, 0x14); in hdptx_lcpll_frl_mode_config()
2002 dev_info(hdptx->dev, "bus_width:0x%x,bit_rate:%d\n", bus_width, bit_rate); in rockchip_hdptx_phy_power_on()
2022 hdptx_write(hdptx, LNTOP_REG0207, 0); in rockchip_hdptx_phy_power_off()
2024 return 0; in rockchip_hdptx_phy_power_off()
2065 for (; cfg->bit_rate != ~0; cfg++) in hdptx_phy_clk_round_rate()
2069 if (cfg->bit_rate == ~0 && !hdptx_phy_clk_pll_calc(bit_rate, NULL)) in hdptx_phy_clk_round_rate()
2100 return 0; in hdptx_phy_clk_enable()
2163 return 0; in rockchip_hdptx_phy_clk_register()
2167 return 0; in rockchip_hdptx_phy_clk_register()
2204 return 0; in rockchip_hdptx_phy_clk_register()
2224 if (hdptx->id < 0) in rockchip_hdptx_phy_probe()
2225 hdptx->id = 0; in rockchip_hdptx_phy_probe()
2227 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); in rockchip_hdptx_phy_probe()
2340 return 0; in rockchip_hdptx_phy_probe()