686 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq,  in csi_mipidphy_wr_ths_settle()  argument
713 	val = (val & ~0x7f) | hsfreq;  in csi_mipidphy_wr_ths_settle()
1166 	int i, hsfreq = 0;  in mipidphy_rx_stream_on()  local
1176 			hsfreq = hsfreq_ranges[i].cfg_bit;  in mipidphy_rx_stream_on()
1185 		hsfreq = hsfreq_ranges[i].cfg_bit;  in mipidphy_rx_stream_on()
1228 	hsfreq <<= 1;  in mipidphy_rx_stream_on()
1230 	mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);  in mipidphy_rx_stream_on()
1231 	mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, hsfreq);  in mipidphy_rx_stream_on()
1232 	mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, hsfreq);  in mipidphy_rx_stream_on()
1233 	mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, hsfreq);  in mipidphy_rx_stream_on()
1263 	int i, hsfreq = 0;  in mipidphy_txrx_stream_on()  local
1273 			hsfreq = hsfreq_ranges[i].cfg_bit;  in mipidphy_txrx_stream_on()
1282 		hsfreq = hsfreq_ranges[i].cfg_bit;  in mipidphy_txrx_stream_on()
1342 	hsfreq <<= 1;  in mipidphy_txrx_stream_on()
1344 	mipidphy1_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq);  in mipidphy_txrx_stream_on()
1388 	int i, hsfreq = 0;  in csi_mipidphy_stream_on()  local
1469 			hsfreq = hsfreq_ranges[i].cfg_bit;  in csi_mipidphy_stream_on()
1478 		hsfreq = hsfreq_ranges[i].cfg_bit;  in csi_mipidphy_stream_on()
1481 	csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_CLOCK);  in csi_mipidphy_stream_on()
1483 		csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA0);  in csi_mipidphy_stream_on()
1485 		csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA1);  in csi_mipidphy_stream_on()
1487 		csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA2);  in csi_mipidphy_stream_on()
1489 		csi_mipidphy_wr_ths_settle(priv, hsfreq, MIPI_DPHY_LANE_DATA3);  in csi_mipidphy_stream_on()