Lines Matching refs:inno
235 static void phy_update_bits(struct inno_video_phy *inno, in phy_update_bits() argument
241 orig = readl(inno->phy_base + reg); in phy_update_bits()
244 writel(tmp, inno->phy_base + reg); in phy_update_bits()
247 static void host_update_bits(struct inno_video_phy *inno, in host_update_bits() argument
252 orig = readl(inno->host_base + reg); in host_update_bits()
255 writel(tmp, inno->host_base + reg); in host_update_bits()
286 static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno) in inno_video_phy_mipi_mode_enable() argument
315 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_mipi_mode_enable()
318 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_video_phy_mipi_mode_enable()
319 REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv)); in inno_video_phy_mipi_mode_enable()
320 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_video_phy_mipi_mode_enable()
321 REG_FBDIV_HI_MASK, REG_FBDIV_HI(inno->pll.fbdiv >> 8)); in inno_video_phy_mipi_mode_enable()
322 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04, in inno_video_phy_mipi_mode_enable()
323 REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv)); in inno_video_phy_mipi_mode_enable()
325 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01, in inno_video_phy_mipi_mode_enable()
329 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01, in inno_video_phy_mipi_mode_enable()
332 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01, in inno_video_phy_mipi_mode_enable()
335 phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00, in inno_video_phy_mipi_mode_enable()
338 phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00, in inno_video_phy_mipi_mode_enable()
341 txbyteclkhs = inno->pll.rate / 8; in inno_video_phy_mipi_mode_enable()
348 ui = div_u64(PSEC_PER_SEC, inno->pll.rate); in inno_video_phy_mipi_mode_enable()
397 if (inno->pll.rate <= timings[i].rate) in inno_video_phy_mipi_mode_enable()
415 phy_update_bits(inno, i, 0x05, T_LPX_CNT_MASK, in inno_video_phy_mipi_mode_enable()
417 phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK, in inno_video_phy_mipi_mode_enable()
419 phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_MASK, in inno_video_phy_mipi_mode_enable()
421 phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK, in inno_video_phy_mipi_mode_enable()
423 phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_MASK, in inno_video_phy_mipi_mode_enable()
425 phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_MASK, in inno_video_phy_mipi_mode_enable()
427 phy_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK, in inno_video_phy_mipi_mode_enable()
429 phy_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK, in inno_video_phy_mipi_mode_enable()
431 phy_update_bits(inno, i, 0x0d, T_WAKEUP_CNT_LO_MASK, in inno_video_phy_mipi_mode_enable()
433 phy_update_bits(inno, i, 0x10, T_TA_GO_CNT_MASK, in inno_video_phy_mipi_mode_enable()
435 phy_update_bits(inno, i, 0x11, T_TA_SURE_CNT_MASK, in inno_video_phy_mipi_mode_enable()
437 phy_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK, in inno_video_phy_mipi_mode_enable()
442 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, in inno_video_phy_mipi_mode_enable()
447 static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno) in inno_video_phy_lvds_mode_enable() argument
455 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08, in inno_video_phy_lvds_mode_enable()
460 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_lvds_mode_enable()
463 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_video_phy_lvds_mode_enable()
465 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03, in inno_video_phy_lvds_mode_enable()
467 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04, in inno_video_phy_lvds_mode_enable()
469 phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc); in inno_video_phy_lvds_mode_enable()
471 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_lvds_mode_enable()
475 ret = readl_relaxed_poll_timeout(inno->host_base + DSI_PHY_STATUS, in inno_video_phy_lvds_mode_enable()
478 dev_err(inno->dev, "PLL is not lock\n"); in inno_video_phy_lvds_mode_enable()
480 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x1e, in inno_video_phy_lvds_mode_enable()
484 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_lvds_mode_enable()
488 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_lvds_mode_enable()
492 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_lvds_mode_enable()
496 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_lvds_mode_enable()
502 static void inno_video_phy_ttl_mode_enable(struct inno_video_phy *inno) in inno_video_phy_ttl_mode_enable() argument
505 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_ttl_mode_enable()
508 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_ttl_mode_enable()
512 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_ttl_mode_enable()
516 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_ttl_mode_enable()
520 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_ttl_mode_enable()
525 host_update_bits(inno, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK); in inno_video_phy_ttl_mode_enable()
530 struct inno_video_phy *inno = phy_get_drvdata(phy); in inno_video_phy_power_on() local
533 clk_prepare_enable(inno->pclk_host); in inno_video_phy_power_on()
534 clk_prepare_enable(inno->pclk_phy); in inno_video_phy_power_on()
535 pm_runtime_get_sync(inno->dev); in inno_video_phy_power_on()
538 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, in inno_video_phy_power_on()
541 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, in inno_video_phy_power_on()
546 inno_video_phy_mipi_mode_enable(inno); in inno_video_phy_power_on()
549 inno_video_phy_lvds_mode_enable(inno); in inno_video_phy_power_on()
552 inno_video_phy_ttl_mode_enable(inno); in inno_video_phy_power_on()
561 struct inno_video_phy *inno = phy_get_drvdata(phy); in inno_video_phy_power_off() local
563 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, 0); in inno_video_phy_power_off()
564 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01, in inno_video_phy_power_off()
567 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, in inno_video_phy_power_off()
569 phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, in inno_video_phy_power_off()
572 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, LVDS_LANE_EN_MASK, 0); in inno_video_phy_power_off()
573 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_power_off()
576 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_power_off()
580 pm_runtime_put(inno->dev); in inno_video_phy_power_off()
581 clk_disable_unprepare(inno->pclk_phy); in inno_video_phy_power_off()
582 clk_disable_unprepare(inno->pclk_host); in inno_video_phy_power_off()
599 static unsigned long inno_video_phy_pll_round_rate(struct inno_video_phy *inno, in inno_video_phy_pll_round_rate() argument
673 struct inno_video_phy *inno = hw_to_inno(hw); in inno_video_phy_pll_clk_round_rate() local
679 fout = inno_video_phy_pll_round_rate(inno, fin, rate, in inno_video_phy_pll_clk_round_rate()
682 dev_dbg(inno->dev, "fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n", in inno_video_phy_pll_clk_round_rate()
685 inno->pll.prediv = prediv; in inno_video_phy_pll_clk_round_rate()
686 inno->pll.fbdiv = fbdiv; in inno_video_phy_pll_clk_round_rate()
687 inno->pll.rate = fout; in inno_video_phy_pll_clk_round_rate()
696 struct inno_video_phy *inno = hw_to_inno(hw); in inno_video_phy_pll_clk_set_rate() local
698 inno->pll.rate = rate; in inno_video_phy_pll_clk_set_rate()
706 struct inno_video_phy *inno = hw_to_inno(hw); in inno_video_phy_pll_clk_recalc_rate() local
708 return inno->pll.rate; in inno_video_phy_pll_clk_recalc_rate()
717 static int inno_video_phy_pll_register(struct inno_video_phy *inno) in inno_video_phy_pll_register() argument
719 struct device *dev = inno->dev; in inno_video_phy_pll_register()
727 parent_name = __clk_get_name(inno->ref_clk); in inno_video_phy_pll_register()
736 inno->pll.hw.init = &init; in inno_video_phy_pll_register()
737 clk = devm_clk_register(dev, &inno->pll.hw); in inno_video_phy_pll_register()
747 static void inno_video_phy_pll_unregister(struct inno_video_phy *inno) in inno_video_phy_pll_unregister() argument
749 struct device *dev = inno->dev; in inno_video_phy_pll_unregister()
757 struct inno_video_phy *inno; in inno_video_phy_probe() local
763 inno = devm_kzalloc(dev, sizeof(*inno), GFP_KERNEL); in inno_video_phy_probe()
764 if (!inno) in inno_video_phy_probe()
767 inno->dev = dev; in inno_video_phy_probe()
768 platform_set_drvdata(pdev, inno); in inno_video_phy_probe()
776 inno->phy_base = devm_ioremap(dev, res->start, resource_size(res)); in inno_video_phy_probe()
777 if (!inno->phy_base) in inno_video_phy_probe()
786 inno->host_base = devm_ioremap(dev, res->start, resource_size(res)); in inno_video_phy_probe()
787 if (!inno->host_base) in inno_video_phy_probe()
790 inno->ref_clk = devm_clk_get(dev, "ref"); in inno_video_phy_probe()
791 if (IS_ERR(inno->ref_clk)) { in inno_video_phy_probe()
792 ret = PTR_ERR(inno->ref_clk); in inno_video_phy_probe()
797 inno->pclk_phy = devm_clk_get(dev, "pclk_phy"); in inno_video_phy_probe()
798 if (IS_ERR(inno->pclk_phy)) { in inno_video_phy_probe()
799 ret = PTR_ERR(inno->pclk_phy); in inno_video_phy_probe()
804 inno->pclk_host = devm_clk_get(dev, "pclk_host"); in inno_video_phy_probe()
805 if (IS_ERR(inno->pclk_host)) { in inno_video_phy_probe()
806 ret = PTR_ERR(inno->pclk_host); in inno_video_phy_probe()
811 inno->rst = devm_reset_control_get(dev, "rst"); in inno_video_phy_probe()
812 if (IS_ERR(inno->rst)) { in inno_video_phy_probe()
813 ret = PTR_ERR(inno->rst); in inno_video_phy_probe()
825 phy_set_drvdata(phy, inno); in inno_video_phy_probe()
834 ret = inno_video_phy_pll_register(inno); in inno_video_phy_probe()
845 struct inno_video_phy *inno = platform_get_drvdata(pdev); in inno_video_phy_remove() local
847 pm_runtime_disable(inno->dev); in inno_video_phy_remove()
848 inno_video_phy_pll_unregister(inno); in inno_video_phy_remove()