Lines Matching refs:REGISTER_PART_LVDS
227 REGISTER_PART_LVDS, enumerator
315 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_mipi_mode_enable()
460 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_lvds_mode_enable()
469 phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc); in inno_video_phy_lvds_mode_enable()
471 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_lvds_mode_enable()
484 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_lvds_mode_enable()
488 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_lvds_mode_enable()
492 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_lvds_mode_enable()
496 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_lvds_mode_enable()
505 phy_update_bits(inno, REGISTER_PART_LVDS, 0x03, in inno_video_phy_ttl_mode_enable()
508 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_ttl_mode_enable()
512 phy_update_bits(inno, REGISTER_PART_LVDS, 0x00, in inno_video_phy_ttl_mode_enable()
516 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_ttl_mode_enable()
520 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_ttl_mode_enable()
572 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, LVDS_LANE_EN_MASK, 0); in inno_video_phy_power_off()
573 phy_update_bits(inno, REGISTER_PART_LVDS, 0x01, in inno_video_phy_power_off()
576 phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, in inno_video_phy_power_off()