Lines Matching refs:clkout_ctl
229 struct usb2phy_reg clkout_ctl; member
472 } else if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare()
473 ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true); in rockchip_usb2phy_clk480m_prepare()
494 property_enable(base, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare()
506 return property_enabled(base, &rphy->phy_cfg->clkout_ctl); in rockchip_usb2phy_clk480m_prepared()
3177 .clkout_ctl = { 0x108, 4, 4, 1, 0 },
3233 .clkout_ctl = { 0x0190, 15, 15, 1, 0 },
3285 .clkout_ctl = { 0x0768, 4, 4, 1, 0 },
3331 .clkout_ctl = { 0x0808, 4, 4, 1, 0 },
3355 .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
3409 .clkout_ctl = { 0x108, 4, 4, 1, 0 },
3466 .clkout_ctl = { 0x0724, 15, 15, 1, 0 },
3485 .clkout_ctl = { 0x0724, 15, 15, 1, 0 },
3536 .clkout_ctl = { 0xe450, 4, 4, 1, 0 },
3588 .clkout_ctl = { 0xe460, 4, 4, 1, 0 },
3699 .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
3758 .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
3813 .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
3842 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
3896 .clkout_ctl = { 0x0000, 0, 0, 1, 0 },
3950 .clkout_ctl = { 0x0000, 0, 0, 0, 0 },
3972 .clkout_ctl = { 0x0000, 0, 0, 0, 0 },
3998 .clkout_ctl = { 0x0058, 4, 4, 1, 0 },
4043 .clkout_ctl = { 0x108, 4, 4, 1, 0 },