233 	const struct rockchip_chg_det_reg	chg_det;  member
1391 	property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);  in rockchip_chg_enable_dcd()
1392 	property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);  in rockchip_chg_enable_dcd()
1400 	property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);  in rockchip_chg_enable_primary_det()
1401 	property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);  in rockchip_chg_enable_primary_det()
1409 	property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);  in rockchip_chg_enable_secondary_det()
1410 	property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);  in rockchip_chg_enable_secondary_det()
1456 		property_enable(base, &rphy->phy_cfg->chg_det.chg_mode, true);  in rockchip_chg_detect_work()
1467 					  &rphy->phy_cfg->chg_det.dp_det);  in rockchip_chg_detect_work()
1485 					&rphy->phy_cfg->chg_det.cp_det);  in rockchip_chg_detect_work()
1520 					&rphy->phy_cfg->chg_det.dcp_det);  in rockchip_chg_detect_work()
1532 		if (rphy->phy_cfg->chg_det.chg_mode.offset !=  in rockchip_chg_detect_work()
1534 			property_enable(base, &rphy->phy_cfg->chg_det.chg_mode, false);  in rockchip_chg_detect_work()
3212 		.chg_det = {
3264 		.chg_det = {
3315 		.chg_det = {
3388 		.chg_det = {
3445 		.chg_det = {
3515 		.chg_det = {
3571 		.chg_det = {
3621 		.chg_det = {
3678 		.chg_det = {
3736 		.chg_det = {
3796 		.chg_det = {
3879 		.chg_det = {
3933 		.chg_det = {
4023 		.chg_det = {
4065 		.chg_det = {