phy/rockchip/phy-rockchip-inno-mipi-dphy.c

29 #define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))  macro
54 #define POWER_WORK_ENABLE		UPDATE(1, 1, 0)
55 #define POWER_WORK_DISABLE		UPDATE(2, 1, 0)
68 #define REG_FBDIV_HI(x)			UPDATE(x, 5, 5)
70 #define REG_PREDIV(x)			UPDATE(x, 4, 0)
73 #define REG_FBDIV_LO(x)			UPDATE(x, 7, 0)
76 #define CLK_LANE_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
79 #define LDO_OUTPUT_SET_HI(x)		UPDATE(x, 7, 7)
81 #define LANE_3_SKEW_PHASE_SET(x)	UPDATE(x, 6, 4)
83 #define LDO_OUTPUT_SET_LO(x)		UPDATE(x, 3, 3)
85 #define LANE_2_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
88 #define PRE_EMPHASIS_RANGE_SET_HI(x)	UPDATE(x, 7, 7)
90 #define LANE_1_SKEW_PHASE_SET(x)	UPDATE(x, 6, 4)
92 #define PRE_EMPHASIS_RANGE_SET_LO(x)	UPDATE(x, 3, 3)
94 #define LANE_0_SKEW_PHASE_SET(x)	UPDATE(x, 2, 0)
103 #define DATA_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
106 #define CLOCK_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
113 #define DATA_SAMPLE_PHASE_SET(x)	UPDATE(x, 7, 6)
131 #define T_LPX_CNT(x)			UPDATE(x, 5, 0)
134 #define T_HS_ZERO_CNT_HI(x)		UPDATE(x, 7, 7)
136 #define T_HS_PREPARE_CNT(x)		UPDATE(x, 6, 0)
139 #define T_HS_ZERO_CNT_LO(x)		UPDATE(x, 5, 0)
142 #define T_HS_TRAIL_CNT(x)		UPDATE(x, 6, 0)
145 #define T_HS_EXIT_CNT_LO(x)		UPDATE(x, 4, 0)
148 #define T_CLK_POST_CNT_LO(x)		UPDATE(x, 3, 0)
154 #define T_WAKEUP_CNT_HI(x)		UPDATE(x, 1, 0)
157 #define T_WAKEUP_CNT_LO(x)		UPDATE(x, 7, 0)
160 #define T_CLK_PRE_CNT(x)		UPDATE(x, 3, 0)
163 #define T_CLK_POST_HI(x)		UPDATE(x, 7, 6)
165 #define T_TA_GO_CNT(x)			UPDATE(x, 5, 0)
168 #define T_HS_EXIT_CNT_HI(x)		UPDATE(x, 6, 6)
170 #define T_TA_SURE_CNT(x)		UPDATE(x, 5, 0)
173 #define T_TA_WAIT_CNT(x)		UPDATE(x, 5, 0)