Lines Matching refs:qphy
1936 struct qmp_phy *qphy; member
2621 static int qcom_qmp_phy_serdes_init(struct qmp_phy *qphy) in qcom_qmp_phy_serdes_init() argument
2623 struct qcom_qmp *qmp = qphy->qmp; in qcom_qmp_phy_serdes_init()
2624 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_serdes_init()
2625 void __iomem *serdes = qphy->serdes; in qcom_qmp_phy_serdes_init()
2626 const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; in qcom_qmp_phy_serdes_init()
2685 static void qcom_qmp_phy_dp_aux_init(struct qmp_phy *qphy) in qcom_qmp_phy_dp_aux_init() argument
2689 qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL); in qcom_qmp_phy_dp_aux_init()
2694 qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); in qcom_qmp_phy_dp_aux_init()
2696 writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL); in qcom_qmp_phy_dp_aux_init()
2702 qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL); in qcom_qmp_phy_dp_aux_init()
2708 qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN); in qcom_qmp_phy_dp_aux_init()
2710 writel(0x00, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG0); in qcom_qmp_phy_dp_aux_init()
2711 writel(0x13, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG1); in qcom_qmp_phy_dp_aux_init()
2712 writel(0x24, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG2); in qcom_qmp_phy_dp_aux_init()
2713 writel(0x00, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG3); in qcom_qmp_phy_dp_aux_init()
2714 writel(0x0a, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG4); in qcom_qmp_phy_dp_aux_init()
2715 writel(0x26, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG5); in qcom_qmp_phy_dp_aux_init()
2716 writel(0x0a, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG6); in qcom_qmp_phy_dp_aux_init()
2717 writel(0x03, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG7); in qcom_qmp_phy_dp_aux_init()
2718 writel(0xbb, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG8); in qcom_qmp_phy_dp_aux_init()
2719 writel(0x03, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG9); in qcom_qmp_phy_dp_aux_init()
2720 qphy->dp_aux_cfg = 0; in qcom_qmp_phy_dp_aux_init()
2725 qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); in qcom_qmp_phy_dp_aux_init()
2742 static void qcom_qmp_phy_configure_dp_tx(struct qmp_phy *qphy) in qcom_qmp_phy_configure_dp_tx() argument
2744 const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; in qcom_qmp_phy_configure_dp_tx()
2774 writel(voltage_swing_cfg, qphy->tx + QSERDES_V3_TX_TX_DRV_LVL); in qcom_qmp_phy_configure_dp_tx()
2775 writel(pre_emphasis_cfg, qphy->tx + QSERDES_V3_TX_TX_EMP_POST1_LVL); in qcom_qmp_phy_configure_dp_tx()
2776 writel(voltage_swing_cfg, qphy->tx2 + QSERDES_V3_TX_TX_DRV_LVL); in qcom_qmp_phy_configure_dp_tx()
2777 writel(pre_emphasis_cfg, qphy->tx2 + QSERDES_V3_TX_TX_EMP_POST1_LVL); in qcom_qmp_phy_configure_dp_tx()
2779 writel(drvr_en, qphy->tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qcom_qmp_phy_configure_dp_tx()
2780 writel(bias_en, qphy->tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qcom_qmp_phy_configure_dp_tx()
2781 writel(drvr_en, qphy->tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qcom_qmp_phy_configure_dp_tx()
2782 writel(bias_en, qphy->tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qcom_qmp_phy_configure_dp_tx()
2788 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_dp_phy_configure() local
2790 memcpy(&qphy->dp_opts, dp_opts, sizeof(*dp_opts)); in qcom_qmp_dp_phy_configure()
2791 if (qphy->dp_opts.set_voltages) { in qcom_qmp_dp_phy_configure()
2792 qcom_qmp_phy_configure_dp_tx(qphy); in qcom_qmp_dp_phy_configure()
2793 qphy->dp_opts.set_voltages = 0; in qcom_qmp_dp_phy_configure()
2799 static int qcom_qmp_phy_configure_dp_phy(struct qmp_phy *qphy) in qcom_qmp_phy_configure_dp_phy() argument
2801 const struct qmp_phy_dp_clks *dp_clks = qphy->dp_clks; in qcom_qmp_phy_configure_dp_phy()
2802 const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts; in qcom_qmp_phy_configure_dp_phy()
2824 writel(val, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL); in qcom_qmp_phy_configure_dp_phy()
2826 writel(0x5c, qphy->pcs + QSERDES_V3_DP_PHY_MODE); in qcom_qmp_phy_configure_dp_phy()
2827 writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); in qcom_qmp_phy_configure_dp_phy()
2828 writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); in qcom_qmp_phy_configure_dp_phy()
2851 writel(phy_vco_div, qphy->pcs + QSERDES_V3_DP_PHY_VCO_DIV); in qcom_qmp_phy_configure_dp_phy()
2856 writel(0x04, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG2); in qcom_qmp_phy_configure_dp_phy()
2857 writel(0x01, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2858 writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2859 writel(0x01, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2860 writel(0x09, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2862 writel(0x20, qphy->serdes + QSERDES_V3_COM_RESETSM_CNTRL); in qcom_qmp_phy_configure_dp_phy()
2864 if (readl_poll_timeout(qphy->serdes + QSERDES_V3_COM_C_READY_STATUS, in qcom_qmp_phy_configure_dp_phy()
2871 writel(0x19, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2873 if (readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, in qcom_qmp_phy_configure_dp_phy()
2880 writel(0x18, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2882 writel(0x19, qphy->pcs + QSERDES_V3_DP_PHY_CFG); in qcom_qmp_phy_configure_dp_phy()
2884 return readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, in qcom_qmp_phy_configure_dp_phy()
2897 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_dp_phy_calibrate() local
2901 qphy->dp_aux_cfg++; in qcom_qmp_dp_phy_calibrate()
2902 qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); in qcom_qmp_dp_phy_calibrate()
2903 val = cfg1_settings[qphy->dp_aux_cfg]; in qcom_qmp_dp_phy_calibrate()
2905 writel(val, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG1); in qcom_qmp_dp_phy_calibrate()
2910 static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) in qcom_qmp_phy_com_init() argument
2912 struct qcom_qmp *qmp = qphy->qmp; in qcom_qmp_phy_com_init()
2913 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_com_init()
2914 void __iomem *serdes = qphy->serdes; in qcom_qmp_phy_com_init()
2915 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_com_init()
2945 qphy->cfg->reset_list[i]); in qcom_qmp_phy_com_init()
3007 static int qcom_qmp_phy_com_exit(struct qmp_phy *qphy) in qcom_qmp_phy_com_exit() argument
3009 struct qcom_qmp *qmp = qphy->qmp; in qcom_qmp_phy_com_exit()
3010 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_com_exit()
3011 void __iomem *serdes = qphy->serdes; in qcom_qmp_phy_com_exit()
3044 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_phy_init() local
3045 struct qcom_qmp *qmp = qphy->qmp; in qcom_qmp_phy_init()
3046 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_init()
3077 ret = qcom_qmp_phy_com_init(qphy); in qcom_qmp_phy_init()
3082 qcom_qmp_phy_dp_aux_init(qphy); in qcom_qmp_phy_init()
3089 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_phy_power_on() local
3090 struct qcom_qmp *qmp = qphy->qmp; in qcom_qmp_phy_power_on()
3091 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_power_on()
3092 void __iomem *tx = qphy->tx; in qcom_qmp_phy_power_on()
3093 void __iomem *rx = qphy->rx; in qcom_qmp_phy_power_on()
3094 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_power_on()
3095 void __iomem *pcs_misc = qphy->pcs_misc; in qcom_qmp_phy_power_on()
3100 qcom_qmp_phy_serdes_init(qphy); in qcom_qmp_phy_power_on()
3103 ret = reset_control_deassert(qphy->lane_rst); in qcom_qmp_phy_power_on()
3106 qphy->index); in qcom_qmp_phy_power_on()
3111 ret = clk_prepare_enable(qphy->pipe_clk); in qcom_qmp_phy_power_on()
3122 qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs, in qcom_qmp_phy_power_on()
3127 qcom_qmp_phy_configure_dp_tx(qphy); in qcom_qmp_phy_power_on()
3133 qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs, in qcom_qmp_phy_power_on()
3138 qcom_qmp_phy_configure_dp_phy(qphy); in qcom_qmp_phy_power_on()
3186 clk_disable_unprepare(qphy->pipe_clk); in qcom_qmp_phy_power_on()
3189 reset_control_assert(qphy->lane_rst); in qcom_qmp_phy_power_on()
3196 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_phy_power_off() local
3197 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_power_off()
3199 clk_disable_unprepare(qphy->pipe_clk); in qcom_qmp_phy_power_off()
3203 writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL); in qcom_qmp_phy_power_off()
3207 qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qcom_qmp_phy_power_off()
3210 qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); in qcom_qmp_phy_power_off()
3214 qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qcom_qmp_phy_power_off()
3217 qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL, in qcom_qmp_phy_power_off()
3227 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_phy_exit() local
3228 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_exit()
3231 reset_control_assert(qphy->lane_rst); in qcom_qmp_phy_exit()
3233 qcom_qmp_phy_com_exit(qphy); in qcom_qmp_phy_exit()
3266 struct qmp_phy *qphy = phy_get_drvdata(phy); in qcom_qmp_phy_set_mode() local
3268 qphy->mode = mode; in qcom_qmp_phy_set_mode()
3273 static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy) in qcom_qmp_phy_enable_autonomous_mode() argument
3275 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_enable_autonomous_mode()
3276 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_enable_autonomous_mode()
3277 void __iomem *pcs_misc = qphy->pcs_misc; in qcom_qmp_phy_enable_autonomous_mode()
3280 if (qphy->mode == PHY_MODE_USB_HOST_SS || in qcom_qmp_phy_enable_autonomous_mode()
3281 qphy->mode == PHY_MODE_USB_DEVICE_SS) in qcom_qmp_phy_enable_autonomous_mode()
3302 static void qcom_qmp_phy_disable_autonomous_mode(struct qmp_phy *qphy) in qcom_qmp_phy_disable_autonomous_mode() argument
3304 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_disable_autonomous_mode()
3305 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_disable_autonomous_mode()
3306 void __iomem *pcs_misc = qphy->pcs_misc; in qcom_qmp_phy_disable_autonomous_mode()
3323 struct qmp_phy *qphy = qmp->phys[0]; in qcom_qmp_phy_runtime_suspend() local
3324 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_runtime_suspend()
3326 dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qphy->mode); in qcom_qmp_phy_runtime_suspend()
3337 qcom_qmp_phy_enable_autonomous_mode(qphy); in qcom_qmp_phy_runtime_suspend()
3339 clk_disable_unprepare(qphy->pipe_clk); in qcom_qmp_phy_runtime_suspend()
3348 struct qmp_phy *qphy = qmp->phys[0]; in qcom_qmp_phy_runtime_resume() local
3349 const struct qmp_phy_cfg *cfg = qphy->cfg; in qcom_qmp_phy_runtime_resume()
3352 dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qphy->mode); in qcom_qmp_phy_runtime_resume()
3369 ret = clk_prepare_enable(qphy->pipe_clk); in qcom_qmp_phy_runtime_resume()
3376 qcom_qmp_phy_disable_autonomous_mode(qphy); in qcom_qmp_phy_runtime_resume()
3568 const struct qmp_phy *qphy; in qcom_qmp_dp_pixel_clk_recalc_rate() local
3572 qphy = dp_clks->qphy; in qcom_qmp_dp_pixel_clk_recalc_rate()
3573 dp_opts = &qphy->dp_opts; in qcom_qmp_dp_pixel_clk_recalc_rate()
3612 const struct qmp_phy *qphy; in qcom_qmp_dp_link_clk_recalc_rate() local
3616 qphy = dp_clks->qphy; in qcom_qmp_dp_link_clk_recalc_rate()
3617 dp_opts = &qphy->dp_opts; in qcom_qmp_dp_link_clk_recalc_rate()
3652 static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy, in phy_dp_clks_register() argument
3663 dp_clks->qphy = qphy; in phy_dp_clks_register()
3664 qphy->dp_clks = dp_clks; in phy_dp_clks_register()
3731 struct qmp_phy *qphy; in qcom_qmp_phy_create() local
3736 qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); in qcom_qmp_phy_create()
3737 if (!qphy) in qcom_qmp_phy_create()
3740 qphy->cfg = cfg; in qcom_qmp_phy_create()
3741 qphy->serdes = serdes; in qcom_qmp_phy_create()
3748 qphy->tx = of_iomap(np, 0); in qcom_qmp_phy_create()
3749 if (!qphy->tx) in qcom_qmp_phy_create()
3752 qphy->rx = of_iomap(np, 1); in qcom_qmp_phy_create()
3753 if (!qphy->rx) in qcom_qmp_phy_create()
3756 qphy->pcs = of_iomap(np, 2); in qcom_qmp_phy_create()
3757 if (!qphy->pcs) in qcom_qmp_phy_create()
3767 qphy->tx2 = of_iomap(np, 3); in qcom_qmp_phy_create()
3768 qphy->rx2 = of_iomap(np, 4); in qcom_qmp_phy_create()
3769 if (!qphy->tx2 || !qphy->rx2) { in qcom_qmp_phy_create()
3774 qphy->pcs_misc = qphy->tx2; in qcom_qmp_phy_create()
3775 qphy->tx2 = qphy->tx + QMP_PHY_LEGACY_LANE_STRIDE; in qcom_qmp_phy_create()
3776 qphy->rx2 = qphy->rx + QMP_PHY_LEGACY_LANE_STRIDE; in qcom_qmp_phy_create()
3779 qphy->pcs_misc = of_iomap(np, 5); in qcom_qmp_phy_create()
3783 qphy->pcs_misc = of_iomap(np, 3); in qcom_qmp_phy_create()
3786 if (!qphy->pcs_misc) in qcom_qmp_phy_create()
3797 qphy->pipe_clk = devm_get_clk_from_child(dev, np, prop_name); in qcom_qmp_phy_create()
3798 if (IS_ERR(qphy->pipe_clk)) { in qcom_qmp_phy_create()
3801 ret = PTR_ERR(qphy->pipe_clk); in qcom_qmp_phy_create()
3808 qphy->pipe_clk = NULL; in qcom_qmp_phy_create()
3814 qphy->lane_rst = of_reset_control_get(np, prop_name); in qcom_qmp_phy_create()
3815 if (IS_ERR(qphy->lane_rst)) { in qcom_qmp_phy_create()
3817 return PTR_ERR(qphy->lane_rst); in qcom_qmp_phy_create()
3820 qphy->lane_rst); in qcom_qmp_phy_create()
3839 qphy->phy = generic_phy; in qcom_qmp_phy_create()
3840 qphy->index = id; in qcom_qmp_phy_create()
3841 qphy->qmp = qmp; in qcom_qmp_phy_create()
3842 qmp->phys[id] = qphy; in qcom_qmp_phy_create()
3843 phy_set_drvdata(generic_phy, qphy); in qcom_qmp_phy_create()