290 	void __iomem *phyd; /* include u3phyd_bank2 */  member
430 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_CDR1);  in u3_phy_instance_init()
433 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_CDR1);  in u3_phy_instance_init()
435 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_LFPS1);  in u3_phy_instance_init()
438 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_LFPS1);  in u3_phy_instance_init()
440 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RXDET1);  in u3_phy_instance_init()
443 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET1);  in u3_phy_instance_init()
445 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RXDET2);  in u3_phy_instance_init()
448 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET2);  in u3_phy_instance_init()
686 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RXDET1);  in pcie_phy_instance_init()
689 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET1);  in pcie_phy_instance_init()
691 	tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RXDET2);  in pcie_phy_instance_init()
694 	writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RXDET2);  in pcie_phy_instance_init()
736 	void __iomem *phyd = u3_banks->phyd;  in sata_phy_instance_init()  local
740 	tmp = readl(phyd + ANA_RG_CTRL_SIGNAL6);  in sata_phy_instance_init()
743 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL6);  in sata_phy_instance_init()
745 	tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL4);  in sata_phy_instance_init()
748 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL4);  in sata_phy_instance_init()
750 	tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL5);  in sata_phy_instance_init()
753 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL5);  in sata_phy_instance_init()
755 	tmp = readl(phyd + ANA_RG_CTRL_SIGNAL4);  in sata_phy_instance_init()
758 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL4);  in sata_phy_instance_init()
760 	tmp = readl(phyd + PHYD_CTRL_SIGNAL_MODE4);  in sata_phy_instance_init()
763 	writel(tmp, phyd + PHYD_CTRL_SIGNAL_MODE4);  in sata_phy_instance_init()
765 	tmp = readl(phyd + PHYD_DESIGN_OPTION2);  in sata_phy_instance_init()
768 	writel(tmp, phyd + PHYD_DESIGN_OPTION2);  in sata_phy_instance_init()
770 	tmp = readl(phyd + PHYD_DESIGN_OPTION9);  in sata_phy_instance_init()
775 	writel(tmp, phyd + PHYD_DESIGN_OPTION9);  in sata_phy_instance_init()
777 	tmp = readl(phyd + ANA_RG_CTRL_SIGNAL1);  in sata_phy_instance_init()
780 	writel(tmp, phyd + ANA_RG_CTRL_SIGNAL1);  in sata_phy_instance_init()
782 	tmp = readl(phyd + ANA_EQ_EYE_CTRL_SIGNAL1);  in sata_phy_instance_init()
785 	writel(tmp, phyd + ANA_EQ_EYE_CTRL_SIGNAL1);  in sata_phy_instance_init()
806 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
810 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
834 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;  in phy_v2_banks_init()