325 	struct hw_perf_event *hwc = &event->hw;  in init_cntr_base_l3c()  local
332 	hwc->config_base = (unsigned long)tx2_pmu->base  in init_cntr_base_l3c()
334 	hwc->event_base =  (unsigned long)tx2_pmu->base  in init_cntr_base_l3c()
341 	struct hw_perf_event *hwc = &event->hw;  in init_cntr_base_dmc()  local
347 	hwc->config_base = (unsigned long)tx2_pmu->base  in init_cntr_base_dmc()
350 	hwc->event_base = (unsigned long)tx2_pmu->base  in init_cntr_base_dmc()
357 	struct hw_perf_event *hwc = &event->hw;  in init_cntr_base_ccpi2()  local
362 	hwc->config_base = (unsigned long)tx2_pmu->base  in init_cntr_base_ccpi2()
364 	hwc->event_base =  (unsigned long)tx2_pmu->base;  in init_cntr_base_ccpi2()
370 	struct hw_perf_event *hwc = &event->hw;  in uncore_start_event_l3c()  local
378 	reg_writel(val, hwc->config_base);  in uncore_start_event_l3c()
379 	local64_set(&hwc->prev_count, 0);  in uncore_start_event_l3c()
380 	reg_writel(0, hwc->event_base);  in uncore_start_event_l3c()
391 	struct hw_perf_event *hwc = &event->hw;  in uncore_start_event_dmc()  local
405 	val = reg_readl(hwc->config_base);  in uncore_start_event_dmc()
408 	reg_writel(val, hwc->config_base);  in uncore_start_event_dmc()
409 	local64_set(&hwc->prev_count, 0);  in uncore_start_event_dmc()
410 	reg_writel(0, hwc->event_base);  in uncore_start_event_dmc()
416 	struct hw_perf_event *hwc = &event->hw;  in uncore_stop_event_dmc()  local
425 	val = reg_readl(hwc->config_base);  in uncore_stop_event_dmc()
427 	reg_writel(val, hwc->config_base);  in uncore_stop_event_dmc()
433 	struct hw_perf_event *hwc = &event->hw;  in uncore_start_event_ccpi2()  local
445 			GET_EVENTID(event, emask)), hwc->config_base);  in uncore_start_event_ccpi2()
451 			hwc->event_base + CCPI2_PERF_CTL);  in uncore_start_event_ccpi2()
457 	struct hw_perf_event *hwc = &event->hw;  in uncore_stop_event_ccpi2()  local
460 	reg_writel(0, hwc->event_base + CCPI2_PERF_CTL);  in uncore_stop_event_ccpi2()
466 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_update()  local
480 				hwc->event_base + CCPI2_COUNTER_SEL);  in tx2_uncore_event_update()
481 		new = reg_readl(hwc->event_base + CCPI2_COUNTER_DATA_H);  in tx2_uncore_event_update()
483 			reg_readl(hwc->event_base + CCPI2_COUNTER_DATA_L);  in tx2_uncore_event_update()
484 		prev = local64_xchg(&hwc->prev_count, new);  in tx2_uncore_event_update()
487 		new = reg_readl(hwc->event_base);  in tx2_uncore_event_update()
488 		prev = local64_xchg(&hwc->prev_count, new);  in tx2_uncore_event_update()
574 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_init()  local
601 	hwc->config = event->attr.config;  in tx2_uncore_event_init()
612 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_start()  local
615 	hwc->state = 0;  in tx2_uncore_event_start()
636 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_stop()  local
639 	if (hwc->state & PERF_HES_UPTODATE)  in tx2_uncore_event_stop()
644 	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);  in tx2_uncore_event_stop()
645 	hwc->state |= PERF_HES_STOPPED;  in tx2_uncore_event_stop()
648 		hwc->state |= PERF_HES_UPTODATE;  in tx2_uncore_event_stop()
654 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_add()  local
660 	hwc->idx  = alloc_counter(tx2_pmu);  in tx2_uncore_event_add()
661 	if (hwc->idx < 0)  in tx2_uncore_event_add()
664 	tx2_pmu->events[hwc->idx] = event;  in tx2_uncore_event_add()
668 	hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;  in tx2_uncore_event_add()
678 	struct hw_perf_event *hwc = &event->hw;  in tx2_uncore_event_del()  local
688 	tx2_pmu->events[hwc->idx] = NULL;  in tx2_uncore_event_del()
689 	hwc->idx = -1;  in tx2_uncore_event_del()