204 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_update()  local
207 	u32 idx = hwc->idx;  in smmu_pmu_event_update()
210 		prev = local64_read(&hwc->prev_count);  in smmu_pmu_event_update()
212 	} while (local64_cmpxchg(&hwc->prev_count, prev, now) != prev);  in smmu_pmu_event_update()
222 				struct hw_perf_event *hwc)  in smmu_pmu_set_period()  argument
224 	u32 idx = hwc->idx;  in smmu_pmu_set_period()
247 	local64_set(&hwc->prev_count, new);  in smmu_pmu_set_period()
345 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_init()  local
355 	if (hwc->sample_period) {  in smmu_pmu_event_init()
393 	hwc->idx = -1;  in smmu_pmu_event_init()
407 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_start()  local
408 	int idx = hwc->idx;  in smmu_pmu_event_start()
410 	hwc->state = 0;  in smmu_pmu_event_start()
412 	smmu_pmu_set_period(smmu_pmu, hwc);  in smmu_pmu_event_start()
420 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_stop()  local
421 	int idx = hwc->idx;  in smmu_pmu_event_stop()
423 	if (hwc->state & PERF_HES_STOPPED)  in smmu_pmu_event_stop()
429 	hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;  in smmu_pmu_event_stop()
434 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_add()  local
442 	hwc->idx = idx;  in smmu_pmu_event_add()
443 	hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;  in smmu_pmu_event_add()
445 	local64_set(&hwc->prev_count, 0);  in smmu_pmu_event_add()
460 	struct hw_perf_event *hwc = &event->hw;  in smmu_pmu_event_del()  local
462 	int idx = hwc->idx;  in smmu_pmu_event_del()
621 		struct hw_perf_event *hwc;  in smmu_pmu_handle_irq()  local
627 		hwc = &event->hw;  in smmu_pmu_handle_irq()
629 		smmu_pmu_set_period(smmu_pmu, hwc);  in smmu_pmu_handle_irq()