Lines Matching refs:l1ss

179 	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP,  in aspm_calc_l1ss_info()
181 pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP, in aspm_calc_l1ss_info()
217 pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, &pctl1); in aspm_calc_l1ss_info()
218 pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, &pctl2); in aspm_calc_l1ss_info()
219 pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, &cctl1); in aspm_calc_l1ss_info()
220 pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL2, &cctl2); in aspm_calc_l1ss_info()
231 pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1, in aspm_calc_l1ss_info()
233 pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1, in aspm_calc_l1ss_info()
238 pci_write_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, ctl2); in aspm_calc_l1ss_info()
239 pci_write_config_dword(child, child->l1ss + PCI_L1SS_CTL2, ctl2); in aspm_calc_l1ss_info()
242 pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1, in aspm_calc_l1ss_info()
246 pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1, in aspm_calc_l1ss_info()
249 pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1, in aspm_calc_l1ss_info()
254 pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1, 0, in aspm_calc_l1ss_info()
256 pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1, 0, in aspm_calc_l1ss_info()
301 pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP, in pcie_aspm_ext_is_rc_ep_l1ss_capable()
303 pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP, in pcie_aspm_ext_is_rc_ep_l1ss_capable()