1 // SPDX-License-Identifier: GPL-2.0-only
19 	u32 ret = -1;  in rockchip_pcie_pcie_access_cap()
45 		return -EINVAL;  in rockchip_pcie_pcie_access_cap()
99 static bool rockchip_pcie_bus_aspm_enable_rc_ep(struct pci_dev *child, struct pci_dev *parent, bool…  in rockchip_pcie_bus_aspm_enable_rc_ep()  argument
105 		ret = rockchip_pcie_bus_aspm_enable_dev("RC", parent, enable);  in rockchip_pcie_bus_aspm_enable_rc_ep()
106 		ret = rockchip_pcie_bus_aspm_enable_dev("EP", child, enable);  in rockchip_pcie_bus_aspm_enable_rc_ep()
109 		ret = rockchip_pcie_bus_aspm_enable_dev("EP", child, enable);  in rockchip_pcie_bus_aspm_enable_rc_ep()
110 		ret = rockchip_pcie_bus_aspm_enable_dev("RC", parent, enable);  in rockchip_pcie_bus_aspm_enable_rc_ep()
169 static void aspm_calc_l1ss_info(struct pci_dev *child, struct pci_dev *parent)  in aspm_calc_l1ss_info()  argument
179 	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP,  in aspm_calc_l1ss_info()
181 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP,  in aspm_calc_l1ss_info()
195 	if (calc_l1ss_pwron(parent, scale1, val1) >  in aspm_calc_l1ss_info()
196 	    calc_l1ss_pwron(child, scale2, val2)) {  in aspm_calc_l1ss_info()
198 		t_power_on = calc_l1ss_pwron(parent, scale1, val1);  in aspm_calc_l1ss_info()
201 		t_power_on = calc_l1ss_pwron(child, scale2, val2);  in aspm_calc_l1ss_info()
209 	 * Based on PCIe r3.1, sec 5.5.3.3.1, Figures 5-16 and 5-17, and  in aspm_calc_l1ss_info()
210 	 * Table 5-11.  T(POWER_OFF) is at most 2us and T(L1.2) is at  in aspm_calc_l1ss_info()
217 	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, &pctl1);  in aspm_calc_l1ss_info()
218 	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, &pctl2);  in aspm_calc_l1ss_info()
219 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, &cctl1);  in aspm_calc_l1ss_info()
220 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL2, &cctl2);  in aspm_calc_l1ss_info()
231 		pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
233 		pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
238 	pci_write_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, ctl2);  in aspm_calc_l1ss_info()
239 	pci_write_config_dword(child, child->l1ss + PCI_L1SS_CTL2, ctl2);  in aspm_calc_l1ss_info()
242 	pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
246 	pci_clear_and_set_dword(parent,	parent->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
249 	pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1,  in aspm_calc_l1ss_info()
254 		pci_clear_and_set_dword(parent, parent->l1ss + PCI_L1SS_CTL1, 0,  in aspm_calc_l1ss_info()
256 		pci_clear_and_set_dword(child, child->l1ss + PCI_L1SS_CTL1, 0,  in aspm_calc_l1ss_info()
296 bool pcie_aspm_ext_is_rc_ep_l1ss_capable(struct pci_dev *child, struct pci_dev *parent)  in pcie_aspm_ext_is_rc_ep_l1ss_capable()  argument
301 	pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP,  in pcie_aspm_ext_is_rc_ep_l1ss_capable()
303 	pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP,  in pcie_aspm_ext_is_rc_ep_l1ss_capable()
318 void pcie_aspm_ext_l1ss_enable(struct pci_dev *child, struct pci_dev *parent, bool enable)  in pcie_aspm_ext_l1ss_enable()  argument
323 	ret = rockchip_pcie_bus_aspm_enable_rc_ep(child, parent, false);  in pcie_aspm_ext_l1ss_enable()
327 		if (parent->ltr_path)  in pcie_aspm_ext_l1ss_enable()
328 			pcie_capability_set_word(parent, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_LTR_EN);  in pcie_aspm_ext_l1ss_enable()
331 		aspm_calc_l1ss_info(child, parent);  in pcie_aspm_ext_l1ss_enable()
332 		rockchip_pcie_bus_l1ss_enable_dev("RC", parent, enable);  in pcie_aspm_ext_l1ss_enable()
333 		rockchip_pcie_bus_l1ss_enable_dev("EP", child, enable);  in pcie_aspm_ext_l1ss_enable()
336 		rockchip_pcie_bus_l1ss_enable_dev("EP", child, enable);  in pcie_aspm_ext_l1ss_enable()
337 		rockchip_pcie_bus_l1ss_enable_dev("RC", parent, enable);  in pcie_aspm_ext_l1ss_enable()
342 		rockchip_pcie_bus_aspm_enable_rc_ep(child, parent, true);  in pcie_aspm_ext_l1ss_enable()